From 423fb3468dd46b17db9e719c4b3b8b0b5bb6ede8 Mon Sep 17 00:00:00 2001 From: Nilaan Gunabalachandran Date: Tue, 29 Oct 2019 13:46:38 -0400 Subject: [PATCH] disp: msm: sde: update clk rate for perf mode This updates the mdp clock rate immediately, instead of waiting for the next frame trigger. Change-Id: I5d58a1f1200fff143b363e89e8c49f6e7d8d14c7 Signed-off-by: Nilaan Gunabalachandran --- msm/sde/sde_core_perf.c | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/msm/sde/sde_core_perf.c b/msm/sde/sde_core_perf.c index 3efd37746cce..c8d3b0c8f70e 100644 --- a/msm/sde/sde_core_perf.c +++ b/msm/sde/sde_core_perf.c @@ -992,6 +992,7 @@ static ssize_t _sde_core_perf_mode_write(struct file *file, struct sde_perf_cfg *cfg = &perf->catalog->perf; u32 perf_mode = 0; char buf[10]; + int ret = 0; if (!perf) return -ENODEV; @@ -1017,6 +1018,13 @@ static ssize_t _sde_core_perf_mode_write(struct file *file, perf->perf_tune.min_core_clk = perf->max_core_clk_rate; perf->perf_tune.min_bus_vote = (u64) cfg->max_bw_high * 1000; + + ret = sde_power_clk_set_rate(perf->phandle, + perf->clk_name, perf->max_core_clk_rate); + if (ret) + SDE_ERROR("failed to set %s clock rate %llu\n", + perf->clk_name, + perf->max_core_clk_rate); DRM_INFO("minimum performance mode\n"); } else if (perf_mode == SDE_PERF_MODE_NORMAL) { /* reset the perf tune params to 0 */