clk: renesas: r8a7796: Add FDP clock

This patch adds FDP1-0 clock to the R8A7796 SoC.

Signed-off-by: ABE Hiroshige <[email protected]>
Signed-off-by: Takeshi Kihara <[email protected]>
[geert: s/fdp0/fdp1-0/]
Signed-off-by: Geert Uytterhoeven <[email protected]>
Acked-by: Laurent Pinchart <[email protected]>
This commit is contained in:
ABE Hiroshige 2017-12-14 22:50:55 +09:00 • committed by Geert Uytterhoeven
commit a115f6362c

View file

@ -115,6 +115,7 @@ static const struct cpg_core_clk r8a7796_core_clks[] __initconst = {
};
static const struct mssr_mod_clk r8a7796_mod_clks[] __initconst = {
DEF_MOD("fdp1-0", 119, R8A7796_CLK_S0D1),
DEF_MOD("scif5", 202, R8A7796_CLK_S3D4),
DEF_MOD("scif4", 203, R8A7796_CLK_S3D4),
DEF_MOD("scif3", 204, R8A7796_CLK_S3D4),