From a1b161fca6cd23a8fea111b685c772e975a227a0 Mon Sep 17 00:00:00 2001 From: Yuanfang Zhang Date: Wed, 17 Nov 2021 18:41:45 +0800 Subject: [PATCH] byte-cntr: Compatible with ETR sg buff mode In ETR sg buff mode, at most 4K data can be obtained at a time. This change to support this mode. Change-Id: I26da71e7210f0a85dbd969c6ff047598a1cbddcd Signed-off-by: Yuanfang Zhang --- drivers/hwtracing/coresight/coresight-byte-cntr.c | 4 ++-- drivers/hwtracing/coresight/coresight-byte-cntr.h | 2 +- drivers/hwtracing/coresight/coresight-tmc.c | 2 +- 3 files changed, 4 insertions(+), 4 deletions(-) diff --git a/drivers/hwtracing/coresight/coresight-byte-cntr.c b/drivers/hwtracing/coresight/coresight-byte-cntr.c index c26294f1615c..07250b388b56 100644 --- a/drivers/hwtracing/coresight/coresight-byte-cntr.c +++ b/drivers/hwtracing/coresight/coresight-byte-cntr.c @@ -22,7 +22,7 @@ #define USB_SG_NUM (USB_BLK_SIZE / PAGE_SIZE) #define USB_BUF_NUM 255 #define USB_TIME_OUT (5 * HZ) -#define PCIE_BLK_SIZE 32768 +#define PCIE_BLK_SIZE 4096 static struct tmc_drvdata *tmcdrvdata; @@ -766,7 +766,7 @@ static void etr_pcie_write_work_fn(struct work_struct *work) if (!req) break; - tmc_etr_read_bytes(byte_cntr_data, (loff_t *)&byte_cntr_data->offset, + tmc_etr_read_bytes(byte_cntr_data, &byte_cntr_data->offset, PCIE_BLK_SIZE, &actual, &buf); if (actual <= 0) { diff --git a/drivers/hwtracing/coresight/coresight-byte-cntr.h b/drivers/hwtracing/coresight/coresight-byte-cntr.h index 96c664f9c18e..0ac7bd2d8a83 100644 --- a/drivers/hwtracing/coresight/coresight-byte-cntr.h +++ b/drivers/hwtracing/coresight/coresight-byte-cntr.h @@ -30,7 +30,7 @@ struct byte_cntr { struct mutex usb_bypass_lock; struct mutex byte_cntr_lock; struct coresight_csr *csr; - unsigned long offset; + loff_t offset; u32 pcie_out_chan; struct mhi_dev_client *out_handle; struct work_struct pcie_open_work; diff --git a/drivers/hwtracing/coresight/coresight-tmc.c b/drivers/hwtracing/coresight/coresight-tmc.c index ef29709b2903..05a7cbfd63ec 100644 --- a/drivers/hwtracing/coresight/coresight-tmc.c +++ b/drivers/hwtracing/coresight/coresight-tmc.c @@ -628,7 +628,7 @@ static int tmc_probe(struct amba_device *adev, const struct amba_id *id) if (drvdata->config_type == TMC_CONFIG_TYPE_ETR) { drvdata->out_mode = TMC_ETR_OUT_MODE_MEM; - drvdata->pcie_path = TMC_ETR_PCIE_HW_PATH; + drvdata->pcie_path = TMC_ETR_PCIE_SW_PATH; drvdata->size = tmc_etr_get_default_buffer_size(dev); } else { drvdata->size = readl_relaxed(drvdata->base + TMC_RSZ) * 4;