From a267a11e945b01e789b75366d4729abd77bd1d5a Mon Sep 17 00:00:00 2001 From: Vatsal Bucha Date: Fri, 18 Oct 2019 12:40:47 +0530 Subject: [PATCH] ASoC: wcd938x: Disable ADC mode for tx at power down after record ADC mode for tx 0,1,2,3 is not disabled at power down after record causing noise during next headset record. Disable ADC mode to resolve noise. Change-Id: I0a98b06318b55cfce20c6a90fecd71d83dce28c5 Signed-off-by: Vatsal Bucha --- asoc/codecs/wcd938x/wcd938x.c | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/asoc/codecs/wcd938x/wcd938x.c b/asoc/codecs/wcd938x/wcd938x.c index 04954d9f9d75..aa3d62321104 100644 --- a/asoc/codecs/wcd938x/wcd938x.c +++ b/asoc/codecs/wcd938x/wcd938x.c @@ -1626,18 +1626,30 @@ static int wcd938x_enable_req(struct snd_soc_dapm_widget *w, case SND_SOC_DAPM_POST_PMD: switch (w->shift) { case 0: + snd_soc_component_update_bits(component, + WCD938X_DIGITAL_CDC_TX_ANA_MODE_0_1, 0x0F, + 0x00); snd_soc_component_update_bits(component, WCD938X_DIGITAL_CDC_DIG_CLK_CTL, 0x10, 0x00); break; case 1: + snd_soc_component_update_bits(component, + WCD938X_DIGITAL_CDC_TX_ANA_MODE_0_1, 0xF0, + 0x00); snd_soc_component_update_bits(component, WCD938X_DIGITAL_CDC_DIG_CLK_CTL, 0x20, 0x00); break; case 2: + snd_soc_component_update_bits(component, + WCD938X_DIGITAL_CDC_TX_ANA_MODE_2_3, 0x0F, + 0x00); snd_soc_component_update_bits(component, WCD938X_DIGITAL_CDC_DIG_CLK_CTL, 0x40, 0x00); break; case 3: + snd_soc_component_update_bits(component, + WCD938X_DIGITAL_CDC_TX_ANA_MODE_2_3, 0xF0, + 0x00); snd_soc_component_update_bits(component, WCD938X_DIGITAL_CDC_DIG_CLK_CTL, 0x80, 0x00); break;