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clk: imx6q: optionally get CCM inputs via standard clock handles
When specifying external clock inputs to the CCM the current code requires the clocks to be in a "clocks" child node of the DT root. This is not really conformant with DT best practices. To avoid the need to deviate from those best practices, allow the clock inputs to be specified via standard clock handles. This is in line with how drivers of the later CCM driver revisions on newer i.MX SoCs handle this. As we can't retroactively change the DT binding, allow this as an option with a fallback to the old way of how this has been handled. Signed-off-by: Lucas Stach <[email protected]> Acked-by: Rob Herring <[email protected]> Reviewed-by: Dong Aisheng <[email protected]> Signed-off-by: Stephen Boyd <[email protected]>
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2 changed files with 20 additions and 5 deletions
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@ -414,12 +414,24 @@ static void __init imx6q_clocks_init(struct device_node *ccm_node)
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int ret;
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clk[IMX6QDL_CLK_DUMMY] = imx_clk_fixed("dummy", 0);
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clk[IMX6QDL_CLK_CKIL] = imx_obtain_fixed_clock("ckil", 0);
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clk[IMX6QDL_CLK_CKIH] = imx_obtain_fixed_clock("ckih1", 0);
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clk[IMX6QDL_CLK_OSC] = imx_obtain_fixed_clock("osc", 0);
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clk[IMX6QDL_CLK_CKIL] = of_clk_get_by_name(ccm_node, "ckil");
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if (IS_ERR(clk[IMX6QDL_CLK_CKIL]))
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clk[IMX6QDL_CLK_CKIL] = imx_obtain_fixed_clock("ckil", 0);
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clk[IMX6QDL_CLK_CKIH] = of_clk_get_by_name(ccm_node, "ckih1");
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if (IS_ERR(clk[IMX6QDL_CLK_CKIH]))
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clk[IMX6QDL_CLK_CKIH] = imx_obtain_fixed_clock("ckih1", 0);
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clk[IMX6QDL_CLK_OSC] = of_clk_get_by_name(ccm_node, "osc");
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if (IS_ERR(clk[IMX6QDL_CLK_OSC]))
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clk[IMX6QDL_CLK_OSC] = imx_obtain_fixed_clock("osc", 0);
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/* Clock source from external clock via CLK1/2 PADs */
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clk[IMX6QDL_CLK_ANACLK1] = imx_obtain_fixed_clock("anaclk1", 0);
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clk[IMX6QDL_CLK_ANACLK2] = imx_obtain_fixed_clock("anaclk2", 0);
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clk[IMX6QDL_CLK_ANACLK1] = of_clk_get_by_name(ccm_node, "anaclk1");
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if (IS_ERR(clk[IMX6QDL_CLK_ANACLK1]))
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clk[IMX6QDL_CLK_ANACLK1] = imx_obtain_fixed_clock("anaclk1", 0);
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clk[IMX6QDL_CLK_ANACLK2] = of_clk_get_by_name(ccm_node, "anaclk2");
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if (IS_ERR(clk[IMX6QDL_CLK_ANACLK2]))
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clk[IMX6QDL_CLK_ANACLK2] = imx_obtain_fixed_clock("anaclk2", 0);
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np = of_find_compatible_node(NULL, NULL, "fsl,imx6q-anatop");
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anatop_base = base = of_iomap(np, 0);
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