diff --git a/drivers/platform/msm/ipa/ipa_v3/ipa_debugfs.c b/drivers/platform/msm/ipa/ipa_v3/ipa_debugfs.c index ed234b69e82c..4cae77a34cb5 100644 --- a/drivers/platform/msm/ipa/ipa_v3/ipa_debugfs.c +++ b/drivers/platform/msm/ipa/ipa_v3/ipa_debugfs.c @@ -96,6 +96,7 @@ const char *ipa3_hdr_proc_type_name[] = { __stringify(IPA_HDR_PROC_L2TP_HEADER_ADD), __stringify(IPA_HDR_PROC_L2TP_HEADER_REMOVE), __stringify(IPA_HDR_PROC_ETHII_TO_ETHII_EX), + __stringify(IPA_HDR_PROC_SET_DSCP), }; static struct dentry *dent; diff --git a/drivers/platform/msm/ipa/ipa_v3/ipahal/ipahal.c b/drivers/platform/msm/ipa/ipa_v3/ipahal/ipahal.c index 4a6d3b533ffe..4fdd04437455 100644 --- a/drivers/platform/msm/ipa/ipa_v3/ipahal/ipahal.c +++ b/drivers/platform/msm/ipa/ipa_v3/ipahal/ipahal.c @@ -1477,6 +1477,9 @@ static int ipahal_cp_proc_ctx_to_hw_buff_v3(enum ipa_hdr_proc_type type, case IPA_HDR_PROC_802_3_TO_802_3: ctx->cmd.value = IPA_HDR_UCP_802_3_TO_802_3; break; + case IPA_HDR_PROC_SET_DSCP: + ctx->cmd.value = IPA_HDR_UCP_SET_DSCP; + break; default: IPAHAL_ERR("unknown ipa_hdr_proc_type %d", type); WARN_ON(1); @@ -1522,6 +1525,9 @@ static int ipahal_get_proc_ctx_needed_len_v3(enum ipa_hdr_proc_type type) case IPA_HDR_PROC_ETHII_TO_ETHII_EX: ret = sizeof(struct ipa_hw_hdr_proc_ctx_add_hdr_cmd_seq_ex); break; + case IPA_HDR_PROC_SET_DSCP: + ret = sizeof(struct ipa_hw_hdr_proc_ctx_add_hdr_cmd_seq); + break; default: /* invalid value to make sure failure */ IPAHAL_ERR_RL("invalid ipa_hdr_proc_type %d\n", type); diff --git a/drivers/platform/msm/ipa/ipa_v3/ipahal/ipahal_i.h b/drivers/platform/msm/ipa/ipa_v3/ipahal/ipahal_i.h index 4702b2b70d68..c298e1749272 100644 --- a/drivers/platform/msm/ipa/ipa_v3/ipahal/ipahal_i.h +++ b/drivers/platform/msm/ipa/ipa_v3/ipahal/ipahal_i.h @@ -675,6 +675,7 @@ union ipa_pkt_status_hw { #define IPA_HDR_UCP_L2TP_UDP_HEADER_ADD 12 #define IPA_HDR_UCP_L2TP_UDP_HEADER_REMOVE 13 #define IPA_HDR_UCP_ETHII_TO_ETHII_EX 14 +#define IPA_HDR_UCP_SET_DSCP 16 /* Processing context TLV type */ #define IPA_PROC_CTX_TLV_TYPE_END 0