mirror of
https://github.com/BobTheBlinker/android_kernel_motorola_sm6375.git
synced 2026-10-15 09:14:18 -04:00
Merge remote-tracking branch 'origin/wlan-cmn.driver.lnx.1.0-dev' into wlan-cmn.driver.lnx.2.0-dev
* origin/wlan-cmn.driver.lnx.1.0-dev: qcacmn: Add bus_id memeber to qdf_device Release 5.1.0.22K qcacmn: Initialize ce ring base address high registers for adrastea qcacmn: Fix Q_TARGET_ACCESS in hif_fastpath_resume Release 5.1.0.22J qcacmn: Compilation fix in DP layer caused due to transport layer qcacmn: Compilation fixes for AP135 platform Release 5.1.0.22I qcacmn: Fix compilation with WMI_INTERFACE_EVENT_LOGGING disabled Release 5.1.0.22H qcacmn: Add unit test framework to validate WLAN suspend/resume features Release 5.1.0.22G qcacmn: Remove unnecessary locking during WMI detach Release 5.1.0.22F qcacmn: CL 1597848 - update fw common interface files Release 5.1.0.22E qcacmn: Correct len size of oem data request
This commit is contained in:
commit
a37dba09d2
19 changed files with 176 additions and 48 deletions
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@ -1,2 +1,2 @@
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Current Component wlan-cmn.driver.lnx.1.0 version 5.1.0.22D
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Current Component wlan-cmn.driver.lnx.1.0 version 5.1.0.22K
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Matches Component wlan-cld3.driver.lnx.1.1 version 5.1.0.22C
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@ -38,7 +38,7 @@
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/* Need to rename the function to reflect the functionality "show" / "display"
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* WIN -- to figure out whether to change OSIF to converge (not an immediate AI)
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* */
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#if QCA_OL_11AC_FAST_PATH
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#if WLAN_FEATURE_FASTPATH
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int ol_txrx_host_stats_get(
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ol_txrx_vdev_handle vdev,
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struct ol_txrx_stats_req *req);
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@ -82,7 +82,7 @@ ol_txrx_disable_enhanced_stats(ol_txrx_pdev_handle pdev);
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uint32_t *ol_txrx_get_stats_base(ol_txrx_pdev_handle pdev,
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uint32_t *stats_base, uint32_t msg_len, uint8_t type);
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#endif
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#endif /* QCA_OL_11AC_FAST_PATH*/
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#endif /* WLAN_FEATURE_FASTPATH*/
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#if (HOST_SW_TSO_ENABLE || HOST_SW_TSO_SG_ENABLE)
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void
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ol_tx_print_tso_stats(
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@ -110,15 +110,15 @@ void
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ol_rst_rx_cksum_stats(ol_txrx_vdev_handle vdev);
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#endif /* RX_CHECKSUM_OFFLOAD */
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#if (ATH_SUPPORT_IQUE && QCA_OL_11AC_FAST_PATH)
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#if (ATH_SUPPORT_IQUE && WLAN_FEATURE_FASTPATH)
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A_STATUS
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ol_txrx_host_me_stats(ol_txrx_vdev_handle vdev);
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#endif /* QCA_OL_11AC_FAST_PATH */
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#endif /* WLAN_FEATURE_FASTPATH */
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#if PEER_FLOW_CONTROL
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extern void
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ol_txrx_per_peer_stats(struct ol_txrx_pdev_t *pdev, char *addr);
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#endif
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#if QCA_OL_11AC_FAST_PATH && PEER_FLOW_CONTROL
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#if WLAN_FEATURE_FASTPATH && PEER_FLOW_CONTROL
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int ol_txrx_host_msdu_ttl_stats(
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ol_txrx_vdev_handle vdev,
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struct ol_txrx_stats_req *req);
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@ -615,6 +615,11 @@ uint32_t hif_set_nss_wifiol_mode(struct hif_opaque_softc *osc,
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int32_t hif_get_nss_wifiol_bypass_nw_process(struct hif_opaque_softc *osc);
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#endif
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#ifdef WLAN_SUSPEND_RESUME_TEST
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typedef void (*hdd_fake_resume_callback)(uint32_t val);
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void hif_fake_apps_suspend(hdd_fake_resume_callback callback);
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#endif
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#ifdef __cplusplus
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}
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#endif
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@ -1,5 +1,5 @@
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/*
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* Copyright (c) 2015 The Linux Foundation. All rights reserved.
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* Copyright (c) 2015-2016 The Linux Foundation. All rights reserved.
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*
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* Previously licensed under the ISC license by Qualcomm Atheros, Inc.
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*
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@ -1413,9 +1413,9 @@
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#define ADRASTEA_SR_BA_OFFSET (ADRASTEA_A_WCSS_HM_A_WIFI_APB_1_A_WFSS_CE0_SR_BA_LOW\
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- ADRASTEA_CE0_BASE_ADDRESS)
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#define ADRASTEA_SR_BA_ADDRESS_HIGH_OFFSET \
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(ADRASTEA_A_WCSS_HM_A_WIFI_APB_1_A_WFSS_CE0_SR_BA_HIGH \
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- ADRASTEA_CE0_BASE_ADDRESS)
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#define ADRASTEA_SR_BA_HIGH_OFFSET \
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(ADRASTEA_A_WCSS_HM_A_WIFI_APB_1_A_WFSS_CE0_SR_BA_HIGH \
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- ADRASTEA_CE0_BASE_ADDRESS)
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#define ADRASTEA_SR_SIZE_OFFSET (ADRASTEA_A_WCSS_HM_A_WIFI_APB_1_A_WFSS_CE0_SR_SIZE \
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- ADRASTEA_CE0_BASE_ADDRESS)
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@ -1429,8 +1429,9 @@
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#define ADRASTEA_DR_BA_OFFSET (ADRASTEA_A_WCSS_HM_A_WIFI_APB_1_A_WFSS_CE0_DR_BA_LOW\
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- ADRASTEA_CE0_BASE_ADDRESS)
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#define ADRASTEA_DR_BA_ADDRESS_HIGH_OFFSET (ADRASTEA_A_WCSS_HM_A_WIFI_APB_1_A_WFSS_CE0_DR_BA_HIGH\
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- ADRASTEA_CE0_BASE_ADDRESS)
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#define ADRASTEA_DR_BA_HIGH_OFFSET \
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(ADRASTEA_A_WCSS_HM_A_WIFI_APB_1_A_WFSS_CE0_DR_BA_HIGH\
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- ADRASTEA_CE0_BASE_ADDRESS)
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#define ADRASTEA_DR_SIZE_OFFSET (ADRASTEA_A_WCSS_HM_A_WIFI_APB_1_A_WFSS_CE0_DR_SIZE\
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- ADRASTEA_CE0_BASE_ADDRESS)
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@ -2216,10 +2217,12 @@ struct ce_reg_def adrastea_ce_targetdef = {
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.d_HOST_IE_ADDRESS = ADRASTEA_HOST_IE_OFFSET,
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.d_HOST_IE_COPY_COMPLETE_MASK = ADRASTEA_HOST_IE_COPY_COMPLETE_MASK,
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.d_SR_BA_ADDRESS = ADRASTEA_SR_BA_OFFSET,
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.d_SR_BA_ADDRESS_HIGH = ADRASTEA_SR_BA_HIGH_OFFSET,
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.d_SR_SIZE_ADDRESS = ADRASTEA_SR_SIZE_OFFSET,
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.d_CE_CTRL1_ADDRESS = ADRASTEA_CE_CTRL1_OFFSET,
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.d_CE_CTRL1_DMAX_LENGTH_MASK = ADRASTEA_CE_CTRL1_DMAX_LENGTH_MASK,
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.d_DR_BA_ADDRESS = ADRASTEA_DR_BA_OFFSET,
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.d_DR_BA_ADDRESS_HIGH = ADRASTEA_DR_BA_HIGH_OFFSET,
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.d_DR_SIZE_ADDRESS = ADRASTEA_DR_SIZE_OFFSET,
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.d_CE_CMD_REGISTER = ADRASTEA_CE_CMD_REGISTER_OFFSET,
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.d_CE_MSI_ADDRESS = MISSING_FOR_ADRASTEA,
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@ -2736,7 +2736,7 @@ int hif_dump_ce_registers(struct hif_softc *scn)
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{
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struct hif_opaque_softc *hif_hdl = GET_HIF_OPAQUE_HDL(scn);
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uint32_t ce_reg_address = CE0_BASE_ADDRESS;
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uint32_t ce_reg_values[CE_COUNT_MAX][CE_USEFUL_SIZE >> 2];
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uint32_t ce_reg_values[CE_USEFUL_SIZE >> 2];
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uint32_t ce_reg_word_size = CE_USEFUL_SIZE >> 2;
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uint16_t i;
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QDF_STATUS status;
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@ -2748,7 +2748,7 @@ int hif_dump_ce_registers(struct hif_softc *scn)
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}
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status = hif_diag_read_mem(hif_hdl, ce_reg_address,
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(uint8_t *) &ce_reg_values[i][0],
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(uint8_t *) &ce_reg_values[0],
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ce_reg_word_size * sizeof(uint32_t));
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if (status != QDF_STATUS_SUCCESS) {
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@ -2757,7 +2757,7 @@ int hif_dump_ce_registers(struct hif_softc *scn)
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}
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HIF_ERROR("CE%d Registers:", i);
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qdf_trace_hex_dump(QDF_MODULE_ID_HIF, QDF_TRACE_LEVEL_DEBUG,
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(uint8_t *) &ce_reg_values[i][0],
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(uint8_t *) &ce_reg_values[0],
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ce_reg_word_size * sizeof(uint32_t));
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}
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return 0;
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@ -351,14 +351,14 @@ unsigned int hif_get_dst_ring_read_index(struct hif_softc *scn,
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#define CE_SRC_RING_BYTE_SWAP_SET(scn, CE_ctrl_addr, n) \
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A_TARGET_WRITE(scn, (CE_ctrl_addr) + CE_CTRL1_ADDRESS, \
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(A_TARGET_READ((targid), \
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(A_TARGET_READ(scn, \
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(CE_ctrl_addr) + CE_CTRL1_ADDRESS) \
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& ~CE_CTRL1_SRC_RING_BYTE_SWAP_EN_MASK) | \
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CE_CTRL1_SRC_RING_BYTE_SWAP_EN_SET(n))
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#define CE_DEST_RING_BYTE_SWAP_SET(scn, CE_ctrl_addr, n) \
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A_TARGET_WRITE(scn, (CE_ctrl_addr)+CE_CTRL1_ADDRESS, \
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(A_TARGET_READ((targid), \
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(A_TARGET_READ(scn, \
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(CE_ctrl_addr) + CE_CTRL1_ADDRESS) \
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& ~CE_CTRL1_DST_RING_BYTE_SWAP_EN_MASK) | \
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CE_CTRL1_DST_RING_BYTE_SWAP_EN_SET(n))
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@ -243,6 +243,61 @@ void ce_tasklet_kill(struct hif_softc *scn)
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qdf_atomic_set(&scn->active_tasklet_cnt, 0);
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}
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#ifdef WLAN_SUSPEND_RESUME_TEST
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static bool g_hif_apps_fake_suspended;
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static hdd_fake_resume_callback hdd_fake_aps_resume;
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static void hif_wlan_resume_work_handler(struct work_struct *work)
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{
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hdd_fake_aps_resume(0);
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}
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static DECLARE_WORK(hif_resume_work, hif_wlan_resume_work_handler);
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/**
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* hif_fake_apps_suspend(): Suspend WLAN
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*
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* Set the fake suspend flag such that hif knows that it will need
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* to fake the aps resume process using the hdd_fake_aps_resume
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*
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* Return: none
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*/
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void hif_fake_apps_suspend(hdd_fake_resume_callback callback)
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{
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hdd_fake_aps_resume = callback;
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g_hif_apps_fake_suspended = true;
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}
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/**
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* hif_fake_aps_resume(): check if WLAN resume is needed
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*
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* Return: true if a fake apps resume has been been triggered
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* returns false if regular interrupt processing is needed
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*/
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static bool hif_fake_aps_resume(void)
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{
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if (g_hif_apps_fake_suspended) {
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g_hif_apps_fake_suspended = false;
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schedule_work(&hif_resume_work);
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return true;
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} else {
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return false;
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}
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}
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#else
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/**
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* hif_fake_aps_resume(): check if WLAN resume is needed
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*
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* Return: always false if WLAN_SUSPEND_RESUME_TEST is not defined
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*/
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static bool hif_fake_aps_resume(void)
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{
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return false;
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}
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#endif /* End of WLAN_SUSPEND_RESUME_TEST */
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/**
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* hif_snoc_interrupt_handler() - hif_snoc_interrupt_handler
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* @irq: irq coming from kernel
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@ -341,6 +396,13 @@ irqreturn_t ce_dispatch_interrupt(int ce_id,
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qdf_atomic_inc(&scn->active_tasklet_cnt);
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hif_record_ce_desc_event(scn, ce_id, HIF_IRQ_EVENT, NULL, NULL, 0);
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hif_ce_increment_interrupt_count(hif_ce_state, ce_id);
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if (unlikely(hif_fake_aps_resume())) {
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HIF_ERROR("received resume interrupt");
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hif_irq_enable(scn, ce_id);
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return IRQ_HANDLED;
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}
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|
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if (hif_napi_enabled(hif_hdl, ce_id))
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hif_napi_schedule(hif_hdl, ce_id);
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else
|
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|
|
|
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|
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@ -2910,16 +2910,17 @@ static void hif_fastpath_resume(struct hif_opaque_softc *hif_ctx)
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return;
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|
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if (scn->fastpath_mode_on) {
|
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if (Q_TARGET_ACCESS_BEGIN(scn)) {
|
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ce_state = scn->ce_id_to_state[CE_HTT_H2T_MSG];
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qdf_spin_lock_bh(&ce_state->ce_index_lock);
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if (Q_TARGET_ACCESS_BEGIN(scn) < 0)
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return;
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|
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/*war_ce_src_ring_write_idx_set */
|
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CE_SRC_RING_WRITE_IDX_SET(scn, ce_state->ctrl_addr,
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ce_state->src_ring->write_index);
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qdf_spin_unlock_bh(&ce_state->ce_index_lock);
|
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Q_TARGET_ACCESS_END(scn);
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}
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ce_state = scn->ce_id_to_state[CE_HTT_H2T_MSG];
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qdf_spin_lock_bh(&ce_state->ce_index_lock);
|
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|
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/*war_ce_src_ring_write_idx_set */
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CE_SRC_RING_WRITE_IDX_SET(scn, ce_state->ctrl_addr,
|
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ce_state->src_ring->write_index);
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qdf_spin_unlock_bh(&ce_state->ce_index_lock);
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Q_TARGET_ACCESS_END(scn);
|
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}
|
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}
|
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#else
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|
|
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|
|
@ -298,7 +298,11 @@ QDF_STATUS hif_ahb_enable_bus(struct hif_softc *ol_sc,
|
|||
goto err_cleanup1;
|
||||
}
|
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|
||||
#if LINUX_VERSION_CODE >= KERNEL_VERSION(3, 9, 0)
|
||||
ret = dma_set_mask_and_coherent(dev, DMA_BIT_MASK(32));
|
||||
#else
|
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ret = dma_set_coherent_mask(dev, DMA_BIT_MASK(32));
|
||||
#endif
|
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if (ret) {
|
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HIF_ERROR("%s: failed to set dma mask error = %d",
|
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__func__, ret);
|
||||
|
|
@ -306,7 +310,11 @@ QDF_STATUS hif_ahb_enable_bus(struct hif_softc *ol_sc,
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}
|
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|
||||
/* Arrange for access to Target SoC registers. */
|
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#if LINUX_VERSION_CODE >= KERNEL_VERSION(3, 9, 0)
|
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mem = devm_ioremap_resource(&pdev->dev, memres);
|
||||
#else
|
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mem = devm_request_and_ioremap(&pdev->dev, memres);
|
||||
#endif
|
||||
if (IS_ERR(mem)) {
|
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HIF_INFO("ath: ioremap error\n");
|
||||
ret = PTR_ERR(mem);
|
||||
|
|
|
|||
|
|
@ -32,11 +32,13 @@
|
|||
#include "if_ahb.h"
|
||||
|
||||
#include <linux/clk.h>
|
||||
#include <linux/reset.h>
|
||||
#include <linux/of_address.h>
|
||||
#include <linux/platform_device.h>
|
||||
#include <linux/device.h>
|
||||
#include <linux/of.h>
|
||||
#if LINUX_VERSION_CODE >= KERNEL_VERSION(3, 9, 0)
|
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#include <linux/reset.h>
|
||||
#endif
|
||||
|
||||
/**
|
||||
* clk_enable_disable() - Enable/disable clock
|
||||
|
|
@ -115,6 +117,7 @@ int hif_ahb_clk_enable_disable(struct device *dev, int enable)
|
|||
*
|
||||
* Return : zero on success, non-zero incase of error.
|
||||
*/
|
||||
#if LINUX_VERSION_CODE >= KERNEL_VERSION(3, 9, 0)
|
||||
int hif_ahb_enable_radio(struct hif_pci_softc *sc,
|
||||
struct platform_device *pdev,
|
||||
const struct platform_device_id *id)
|
||||
|
|
@ -237,8 +240,17 @@ int hif_ahb_enable_radio(struct hif_pci_softc *sc,
|
|||
|
||||
err_reset:
|
||||
return -EIO;
|
||||
|
||||
}
|
||||
#else
|
||||
int hif_ahb_enable_radio(struct hif_pci_softc *sc,
|
||||
struct platform_device *pdev,
|
||||
const struct platform_device_id *id)
|
||||
{
|
||||
qdf_print("%s:%d:Reset routines not available in kernel version.\n",
|
||||
__func__, __LINE__);
|
||||
return -EIO;
|
||||
}
|
||||
#endif
|
||||
|
||||
/* "wifi_core_warm" is the other reset type */
|
||||
#define AHB_RESET_TYPE "wifi_core_cold"
|
||||
|
|
@ -252,6 +264,7 @@ err_reset:
|
|||
*
|
||||
* Return : n/a.
|
||||
*/
|
||||
#if LINUX_VERSION_CODE >= KERNEL_VERSION(3, 9, 0)
|
||||
void hif_ahb_device_reset(struct hif_softc *scn)
|
||||
{
|
||||
struct reset_control *resetctl = NULL;
|
||||
|
|
@ -367,6 +380,13 @@ void hif_ahb_device_reset(struct hif_softc *scn)
|
|||
iounmap(mem_tcsr);
|
||||
HIF_INFO("Reset complete for wifi core id : %d\n", wifi_core_id);
|
||||
}
|
||||
#else
|
||||
void hif_ahb_device_reset(struct hif_softc *scn)
|
||||
{
|
||||
qdf_print("%s:%d:Reset routines not available in kernel version.\n",
|
||||
__func__, __LINE__);
|
||||
}
|
||||
#endif
|
||||
|
||||
|
||||
|
||||
|
|
|
|||
|
|
@ -220,7 +220,11 @@ QDF_STATUS hif_snoc_enable_bus(struct hif_softc *ol_sc,
|
|||
int ret;
|
||||
int hif_type;
|
||||
int target_type;
|
||||
#if LINUX_VERSION_CODE >= KERNEL_VERSION(3, 9, 0)
|
||||
ret = dma_set_mask_and_coherent(dev, DMA_BIT_MASK(37));
|
||||
#else
|
||||
ret = dma_set_coherent_mask(dev, DMA_BIT_MASK(37));
|
||||
#endif
|
||||
if (ret) {
|
||||
HIF_ERROR("%s: failed to set dma mask error = %d",
|
||||
__func__, ret);
|
||||
|
|
|
|||
|
|
@ -185,6 +185,9 @@ struct __qdf_device {
|
|||
__qdf_os_intr func;
|
||||
struct __qdf_mempool_ctxt *mem_pool[MAX_MEM_POOLS];
|
||||
enum qdf_bus_type bus_type;
|
||||
#ifdef CONFIG_MCL
|
||||
const struct hif_bus_id *bid;
|
||||
#endif
|
||||
};
|
||||
typedef struct __qdf_device *__qdf_device_t;
|
||||
|
||||
|
|
|
|||
|
|
@ -687,3 +687,17 @@ unsigned long qdf_mc_timer_get_system_time(void)
|
|||
return tv.tv_sec * 1000 + tv.tv_usec / 1000;
|
||||
}
|
||||
EXPORT_SYMBOL(qdf_mc_timer_get_system_time);
|
||||
|
||||
/**
|
||||
* qdf_timer_module_deinit() - Deinitializes a QDF timer module.
|
||||
*
|
||||
* This API deinitializes the QDF timer module.
|
||||
* Return: none
|
||||
*/
|
||||
void qdf_timer_module_deinit(void)
|
||||
{
|
||||
QDF_TRACE(QDF_MODULE_ID_QDF, QDF_TRACE_LEVEL_INFO_HIGH,
|
||||
"De-Initializing the QDF MC timer module");
|
||||
qdf_mutex_destroy(&persistent_timer_count_lock);
|
||||
}
|
||||
EXPORT_SYMBOL(qdf_timer_module_deinit);
|
||||
|
|
|
|||
|
|
@ -112,9 +112,19 @@ void *wmi_unified_attach(void *scn_handle,
|
|||
bool use_cookie, struct wmi_rx_ops *ops);
|
||||
|
||||
|
||||
/**
|
||||
* wmi_mgmt_cmd_record() - Wrapper function for mgmt command logging macro
|
||||
*
|
||||
* @wmi_handle: wmi handle
|
||||
* @cmd: mgmt command
|
||||
* @header: pointer to 802.11 header
|
||||
* @vdev_id: vdev id
|
||||
* @chanfreq: channel frequency
|
||||
*
|
||||
* Return: none
|
||||
*/
|
||||
void wmi_mgmt_cmd_record(wmi_unified_t wmi_handle, WMI_CMD_ID cmd,
|
||||
uint32_t type, uint32_t subtype,
|
||||
uint32_t vdev_id, uint32_t chanfreq);
|
||||
void *header, uint32_t vdev_id, uint32_t chanfreq);
|
||||
|
||||
/**
|
||||
* detach for unified WMI
|
||||
|
|
@ -629,7 +639,7 @@ QDF_STATUS wmi_unified_nat_keepalive_en_cmd(void *wmi_hdl, uint8_t vdev_id);
|
|||
QDF_STATUS wmi_unified_csa_offload_enable(void *wmi_hdl, uint8_t vdev_id);
|
||||
|
||||
QDF_STATUS wmi_unified_start_oem_data_cmd(void *wmi_hdl,
|
||||
uint8_t data_len,
|
||||
uint32_t data_len,
|
||||
uint8_t *data);
|
||||
|
||||
QDF_STATUS wmi_unified_dfs_phyerr_filter_offload_en_cmd(void *wmi_hdl,
|
||||
|
|
|
|||
|
|
@ -518,7 +518,7 @@ QDF_STATUS (*send_wow_sta_ra_filter_cmd)(wmi_unified_t wmi_handle,
|
|||
QDF_STATUS (*send_nat_keepalive_en_cmd)(wmi_unified_t wmi_handle, uint8_t vdev_id);
|
||||
|
||||
QDF_STATUS (*send_start_oem_data_cmd)(wmi_unified_t wmi_handle,
|
||||
uint8_t data_len,
|
||||
uint32_t data_len,
|
||||
uint8_t *data);
|
||||
|
||||
QDF_STATUS
|
||||
|
|
|
|||
|
|
@ -364,7 +364,7 @@ QDF_STATUS send_csa_offload_enable_cmd_tlv(wmi_unified_t wmi_handle,
|
|||
uint8_t vdev_id);
|
||||
|
||||
QDF_STATUS send_start_oem_data_cmd_tlv(wmi_unified_t wmi_handle,
|
||||
uint8_t data_len,
|
||||
uint32_t data_len,
|
||||
uint8_t *data);
|
||||
|
||||
QDF_STATUS
|
||||
|
|
|
|||
|
|
@ -892,20 +892,21 @@ static QDF_STATUS wmi_debugfs_init(wmi_unified_t wmi_handle)
|
|||
*
|
||||
* @wmi_handle: wmi handle
|
||||
* @cmd: mgmt command
|
||||
* @type: 802.11 frame type
|
||||
* @subtype: 802.11 fram subtype
|
||||
* @header: pointer to 802.11 header
|
||||
* @vdev_id: vdev id
|
||||
* @chanfreq: channel frequency
|
||||
*
|
||||
* Return: none
|
||||
*/
|
||||
void wmi_mgmt_cmd_record(wmi_unified_t wmi_handle, WMI_CMD_ID cmd,
|
||||
uint32_t type, uint32_t subtype,
|
||||
uint32_t vdev_id, uint32_t chanfreq)
|
||||
void *header, uint32_t vdev_id, uint32_t chanfreq)
|
||||
{
|
||||
qdf_spin_lock_bh(&wmi_handle->log_info.wmi_record_lock);
|
||||
|
||||
WMI_MGMT_COMMAND_RECORD(cmd, type, subtype, vdev_id, chanfreq);
|
||||
WMI_MGMT_COMMAND_RECORD(cmd,
|
||||
((struct wmi_command_header *)header)->type,
|
||||
((struct wmi_command_header *)header)->sub_type,
|
||||
vdev_id, chanfreq);
|
||||
|
||||
qdf_spin_unlock_bh(&wmi_handle->log_info.wmi_record_lock);
|
||||
}
|
||||
|
|
@ -920,8 +921,7 @@ void wmi_mgmt_cmd_record(wmi_unified_t wmi_handle, WMI_CMD_ID cmd,
|
|||
*/
|
||||
static void wmi_debugfs_remove(wmi_unified_t wmi_handle) { }
|
||||
void wmi_mgmt_cmd_record(wmi_unified_t wmi_handle, WMI_CMD_ID cmd,
|
||||
uint32_t type, uint32_t subtype,
|
||||
uint32_t vdev_id, uint32_t chanfreq) { }
|
||||
void *header, uint32_t vdev_id, uint32_t chanfreq) { }
|
||||
#endif /*WMI_INTERFACE_EVENT_LOGGING */
|
||||
|
||||
int wmi_get_host_credits(wmi_unified_t wmi_handle);
|
||||
|
|
@ -1581,6 +1581,8 @@ static uint8_t *wmi_id_to_name(WMI_CMD_ID wmi_command)
|
|||
CASE_RETURN_STRING(WMI_PDEV_SET_REORDER_TIMEOUT_VAL_CMDID);
|
||||
CASE_RETURN_STRING(WMI_PEER_SET_RX_BLOCKSIZE_CMDID);
|
||||
CASE_RETURN_STRING(WMI_PDEV_SET_WAKEUP_CONFIG_CMDID);
|
||||
CASE_RETURN_STRING(WMI_PDEV_GET_ANTDIV_STATUS_CMDID);
|
||||
CASE_RETURN_STRING(WMI_PEER_ANTDIV_INFO_REQ_CMDID);
|
||||
}
|
||||
|
||||
return "Invalid WMI cmd";
|
||||
|
|
@ -2219,7 +2221,6 @@ void wmi_unified_detach(struct wmi_unified *wmi_handle)
|
|||
|
||||
wmi_debugfs_remove(wmi_handle);
|
||||
|
||||
qdf_spin_lock_bh(&wmi_handle->eventq_lock);
|
||||
buf = qdf_nbuf_queue_remove(&wmi_handle->event_queue);
|
||||
while (buf) {
|
||||
qdf_nbuf_free(buf);
|
||||
|
|
@ -2230,7 +2231,6 @@ void wmi_unified_detach(struct wmi_unified *wmi_handle)
|
|||
wmi_log_buffer_free(wmi_handle);
|
||||
#endif
|
||||
|
||||
qdf_spin_unlock_bh(&wmi_handle->eventq_lock);
|
||||
qdf_spinlock_destroy(&wmi_handle->eventq_lock);
|
||||
qdf_spinlock_destroy(&wmi_handle->ctx_lock);
|
||||
OS_FREE(wmi_handle);
|
||||
|
|
|
|||
|
|
@ -2264,7 +2264,7 @@ QDF_STATUS wmi_unified_csa_offload_enable(void *wmi_hdl, uint8_t vdev_id)
|
|||
* Return: QDF_STATUS_SUCCESS on success and QDF_STATUS_E_FAILURE for failure
|
||||
*/
|
||||
QDF_STATUS wmi_unified_start_oem_data_cmd(void *wmi_hdl,
|
||||
uint8_t data_len,
|
||||
uint32_t data_len,
|
||||
uint8_t *data)
|
||||
{
|
||||
wmi_unified_t wmi_handle = (wmi_unified_t) wmi_hdl;
|
||||
|
|
|
|||
|
|
@ -1641,9 +1641,7 @@ QDF_STATUS send_mgmt_cmd_tlv(wmi_unified_t wmi_handle,
|
|||
cmd->buf_len = bufp_len;
|
||||
|
||||
wmi_mgmt_cmd_record(wmi_handle, WMI_MGMT_TX_SEND_CMDID,
|
||||
((struct wmi_command_header *)bufp)->type,
|
||||
((struct wmi_command_header *)bufp)->sub_type,
|
||||
cmd->vdev_id, cmd->chanfreq);
|
||||
bufp, cmd->vdev_id, cmd->chanfreq);
|
||||
|
||||
if (wmi_unified_cmd_send(wmi_handle, buf, cmd_len,
|
||||
WMI_MGMT_TX_SEND_CMDID)) {
|
||||
|
|
@ -6774,7 +6772,7 @@ QDF_STATUS send_csa_offload_enable_cmd_tlv(wmi_unified_t wmi_handle,
|
|||
* Return: CDF status
|
||||
*/
|
||||
QDF_STATUS send_start_oem_data_cmd_tlv(wmi_unified_t wmi_handle,
|
||||
uint8_t data_len,
|
||||
uint32_t data_len,
|
||||
uint8_t *data)
|
||||
{
|
||||
wmi_buf_t buf;
|
||||
|
|
|
|||
Loading…
Reference in a new issue