A-Team_Digital_Solutions/android_kernel_motorola_sm6375
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Merge "ARM: dts: msm: Fix compilation warnings for auto GVM device tree"

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This commit is contained in:
qctecmdr 2021-04-20 16:15:50 -07:00 • committed by Gerrit - the friendly Code Review server
commit a39320f6bc
15 changed files with 18 additions and 43 deletions
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1
qcom/direwolf-vm.dtsi
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@ -1,4 +1,3 @@
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/clock/qcom,gcc-direwolf.h>
#include "quin-vm-common.dtsi"

3
qcom/pm6155-vm.dtsi
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@ -1,4 +1,3 @@
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/spmi/spmi.h>
#include <dt-bindings/iio/qcom,spmi-vadc.h>
@ -6,7 +5,7 @@
qcom,pm6155@0 {
compatible = "qcom,spmi-pmic";
reg = <0 SPMI_USID>;
#address-cells = <2>;
#address-cells = <1>;
#size-cells = <0>;
pm6155_1_gpios: pinctrl@c000 {

2
qcom/pm8150-vm.dtsi
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@ -1,7 +1,5 @@
#include <dt-bindings/clock/qcom,rpmh.h>
#include <dt-bindings/input/input.h>
#include <dt-bindings/input/qcom,qpnp-power-on.h>
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/spmi/spmi.h>
#include <dt-bindings/iio/qcom,spmi-vadc.h>

2
qcom/pm8195-vm.dtsi
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@ -1,7 +1,5 @@
#include <dt-bindings/clock/qcom,rpmh.h>
#include <dt-bindings/input/input.h>
#include <dt-bindings/input/qcom,qpnp-power-on.h>
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/spmi/spmi.h>
#include <dt-bindings/iio/qcom,spmi-vadc.h>

15
qcom/quin-vm-common.dtsi
View file

@ -1,5 +1,8 @@
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/arm/msm/msm_ion_ids.h>
#include <dt-bindings/clock/qcom,rpmh.h>
#include <dt-bindings/regulator/qcom,rpmh-regulator-levels.h>
/ {
#address-cells = <2>;
@ -97,6 +100,8 @@
intc: vgic@0 {
qvm,vdev = "gic";
#interrupt-cells = <3>;
interrupt-controller;
};
dummycc: qcom,dummycc {
@ -108,7 +113,7 @@
gcc: virtio_clock@1c200000 {
compatible = "virtio,mmio";
reg = <0x1c200000 0x1000>;
interrupts = <0 48 IRQ_TYPE_LEVEL_HIGH>;
interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>;
#clock-cells = <1>;
#reset-cells = <1>;
};
@ -116,14 +121,14 @@
scc: virtio_clock@1c300000 {
compatible = "virtio,mmio";
reg = <0x1c300000 0x1000>;
interrupts = <0 49 IRQ_TYPE_LEVEL_HIGH>;
interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>;
#clock-cells = <1>;
};
regulator: virtio_regulator@1c700000 {
compatible = "virtio,mmio";
reg = <0x1c700000 0x1000>;
interrupts = <0 42 IRQ_TYPE_LEVEL_HIGH>;
interrupts = <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>;
};
msm_ion: qcom,ion {
@ -292,8 +297,8 @@
compatible = "qcom,msm-watchdog";
reg = <0x17c10000 0x1000>;
reg-names = "wdt-base";
interrupts = <0 0 IRQ_TYPE_LEVEL_HIGH>,
<0 1 IRQ_TYPE_LEVEL_HIGH>;
interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>;
qcom,bark-time = <11000>;
qcom,pet-time = <9360>;
qcom,ipi-ping;

3
qcom/sa6155p-vm-pcie.dtsi
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@ -1,6 +1,3 @@
#include <dt-bindings/clock/qcom,gcc-sm6150.h>
#include <dt-bindings/clock/qcom,rpmh.h>
&soc {
pcie0: qcom,pcie@1c08000 {
compatible = "qcom,pci-msm";

2
qcom/sa6155p-vm-usb.dtsi
View file

@ -1,5 +1,3 @@
#include <dt-bindings/clock/qcom,gcc-sm6150.h>
#include <dt-bindings/clock/qcom,rpmh.h>
#include <dt-bindings/phy/qcom,sm8150-qmp-usb3.h>
&soc {

4
qcom/sa6155p-vm.dtsi
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@ -1,9 +1,5 @@
#include <dt-bindings/clock/qcom,gcc-sm6150.h>
#include <dt-bindings/clock/qcom,scc-sm6150.h>
#include <dt-bindings/regulator/qcom,rpmh-regulator.h>
#include <dt-bindings/regulator/qcom,rpmh-regulator-levels.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/gpio/gpio.h>
#include "quin-vm-common.dtsi"
/ {

4
qcom/sa8155-vm-pcie.dtsi
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@ -1,7 +1,3 @@
#include <dt-bindings/clock/qcom,gcc-sm8150.h>
#include <dt-bindings/clock/qcom,rpmh.h>
&soc {
pcie0: qcom,pcie@1c00000 {
compatible = "qcom,pci-msm";

2
qcom/sa8155-vm-usb.dtsi
View file

@ -1,5 +1,3 @@
#include <dt-bindings/clock/qcom,gcc-sm8150.h>
#include <dt-bindings/clock/qcom,rpmh.h>
#include <dt-bindings/phy/qcom,sm8150-qmp-usb3.h>
&soc {

4
qcom/sa8155-vm.dtsi
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@ -1,9 +1,5 @@
#include <dt-bindings/clock/qcom,gcc-sm8150.h>
#include <dt-bindings/clock/qcom,scc-sm8150.h>
#include <dt-bindings/regulator/qcom,rpmh-regulator.h>
#include <dt-bindings/regulator/qcom,rpmh-regulator-levels.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/gpio/gpio.h>
#include "quin-vm-common.dtsi"
/ {

9
qcom/sa8195-vm-pcie.dtsi
View file

@ -1,6 +1,3 @@
#include <dt-bindings/clock/qcom,gcc-scshrike.h>
#include <dt-bindings/clock/qcom,rpmh.h>
&soc {
pcie0: qcom,pcie@1c00000 {
compatible = "qcom,pci-msm";
@ -221,6 +218,8 @@
status = "disabled";
pcie_rc0: pcie_rc0 {
#address-cells = <5>;
#size-cells = <0>;
reg = <0 0 0 0 0>;
pci-ids = "17cb:0109";
};
@ -523,6 +522,8 @@
status = "disabled";
pcie_rc1: pcie_rc1 {
#address-cells = <5>;
#size-cells = <0>;
reg = <0 0 0 0 0>;
pci-ids = "17cb:0109";
};
@ -827,6 +828,8 @@
pcie_rc2: pcie_rc2 {
reg = <0 0 0 0 0>;
pci-ids = "17cb:0109";
#address-cells = <5>;
#size-cells = <0>;
};
};

2
qcom/sa8195-vm-ufs.dtsi
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@ -1,5 +1,3 @@
#include <dt-bindings/clock/qcom,rpmh.h>
&regulator {
L17A: pm8195_1_l17: regulator-pm8195-1-l17 {
regulator-name = "ldoa17";

3
qcom/sa8195-vm-usb.dtsi
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@ -1,6 +1,5 @@
#include <dt-bindings/clock/qcom,gcc-scshrike.h>
#include <dt-bindings/phy/qcom,sm8150-qmp-usb3.h>
#include <dt-bindings/clock/qcom,rpmh.h>
&soc {
/* Primary USB port related controller */
usb0: ssusb@a600000 {

5
qcom/sa8195-vm.dtsi
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@ -1,10 +1,5 @@
#include <dt-bindings/clock/qcom,gcc-scshrike.h>
#include <dt-bindings/clock/qcom,scc-sm8150.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/regulator/qcom,rpmh-regulator.h>
#include <dt-bindings/regulator/qcom,rpmh-regulator-levels.h>
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/interconnect/qcom,scshrike.h>
#include "quin-vm-common.dtsi"
/ {