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cnss2: Add code to address boot timer debug corner case
To handle corner case where mhi power on success and the boot debug timer handler execution(i.e dumping register) runs parellel. Even-though the timer is deleted as soon as mhi is powered on, as this handler is still running it is armed again. Use del_timer_sync which makes sure the timer is not queued and the handler is not running upon its exit. Change-Id: Ie428f3e8af8870018dfed99a5472afca14116bb3 Signed-off-by: Mohammed Siddiq <quic_msiddiq@quicinc.com>
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@ -1918,7 +1918,7 @@ int cnss_pci_start_mhi(struct cnss_pci_data *pci_priv)
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jiffies + msecs_to_jiffies(BOOT_DEBUG_TIMEOUT_MS));
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ret = cnss_pci_set_mhi_state(pci_priv, CNSS_MHI_POWER_ON);
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del_timer(&pci_priv->boot_debug_timer);
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del_timer_sync(&pci_priv->boot_debug_timer);
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if (ret == 0)
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cnss_wlan_adsp_pc_enable(pci_priv, false);
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