From a439c170348c65146c4a7a26799c7b293d1e5c7c Mon Sep 17 00:00:00 2001
From: Manikandan Mohan <manikand@codeaurora.org>
Date: Wed, 29 Jul 2020 17:23:40 -0700
Subject: [PATCH] qcacld-3.0: Add support for PCIE gen switch

Add PLD layer functions to facilitate PCIE gen switch using
cnss platform driver APIs.

Change-Id: Ie1a3273fa8949131937f43d3551cb500a033d59d
CRs-fixed: 2744991
---
 core/pld/inc/pld_common.h | 12 ++++++++++++
 core/pld/src/pld_common.c | 15 +++++++++++++++
 core/pld/src/pld_pcie.h   | 20 ++++++++++++++++++++
 3 files changed, 47 insertions(+)

diff --git a/core/pld/inc/pld_common.h b/core/pld/inc/pld_common.h
index cf55cd5bb239..58bbafb4da6c 100644
--- a/core/pld/inc/pld_common.h
+++ b/core/pld/inc/pld_common.h
@@ -440,6 +440,18 @@ int pld_get_fw_files_for_target(struct device *dev,
 				u32 target_type, u32 target_version);
 int pld_prevent_l1(struct device *dev);
 void pld_allow_l1(struct device *dev);
+
+/**
+ * pld_set_pcie_gen_speed() - Set PCIE gen speed
+ * @dev: device
+ * @pcie_gen_speed: Required PCIE gen speed
+ *
+ * Send required PCIE Gen speed to platform driver
+ *
+ * Return: 0 for success. Negative error codes.
+ */
+int pld_set_pcie_gen_speed(struct device *dev, u8 pcie_gen_speed);
+
 void pld_is_pci_link_down(struct device *dev);
 int pld_shadow_control(struct device *dev, bool enable);
 void pld_schedule_recovery_work(struct device *dev,
diff --git a/core/pld/src/pld_common.c b/core/pld/src/pld_common.c
index b91f1b791c16..aa353165285b 100644
--- a/core/pld/src/pld_common.c
+++ b/core/pld/src/pld_common.c
@@ -642,6 +642,21 @@ void pld_allow_l1(struct device *dev)
 	}
 }
 
+int pld_set_pcie_gen_speed(struct device *dev, u8 pcie_gen_speed)
+{
+	int ret = -EINVAL;
+
+	switch (pld_get_bus_type(dev)) {
+	case PLD_BUS_TYPE_PCIE:
+		ret = pld_pcie_set_gen_speed(dev, pcie_gen_speed);
+		break;
+	default:
+		pr_err("Invalid device type\n");
+		break;
+	}
+	return ret;
+}
+
 /**
  * pld_is_pci_link_down() - Notification for pci link down event
  * @dev: device
diff --git a/core/pld/src/pld_pcie.h b/core/pld/src/pld_pcie.h
index d6ce4dc7d49a..3f910cc174a4 100644
--- a/core/pld/src/pld_pcie.h
+++ b/core/pld/src/pld_pcie.h
@@ -171,6 +171,12 @@ static inline void pld_pcie_allow_l1(struct device *dev)
 {
 }
 
+static inline int pld_pcie_set_gen_speed(struct device *dev, u8 pcie_gen_speed)
+{
+	return 0;
+}
+
+
 static inline void pld_pcie_link_down(struct device *dev)
 {
 }
@@ -448,6 +454,20 @@ static inline void pld_pcie_allow_l1(struct device *dev)
 	cnss_pci_allow_l1(dev);
 }
 
+/**
+ * pld_pcie_set_gen_speed() - Wrapper for platform API to set PCIE gen speed
+ * @dev: device
+ * @pcie_gen_speed: PCIE gen speed required
+ *
+ * Send required PCIE Gen speed to platform driver
+ *
+ * Return: 0 for success. Negative error codes.
+ */
+static inline int pld_pcie_set_gen_speed(struct device *dev, u8 pcie_gen_speed)
+{
+	return cnss_set_pcie_gen_speed(dev, pcie_gen_speed);
+}
+
 static inline void pld_pcie_link_down(struct device *dev)
 {
 	cnss_pci_link_down(dev);