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CLK: Pistachio: Register external clock gates
Register the clock gates for the external audio and ethernet reference clocks provided by the top-level general control block. Signed-off-by: Damien Horsley <[email protected]> Signed-off-by: Andrew Bresticker <[email protected]> Cc: Mike Turquette <[email protected]> Cc: Stephen Boyd <[email protected]> Cc: [email protected] Cc: [email protected] Cc: [email protected] Cc: Ezequiel Garcia <[email protected]> Cc: James Hartley <[email protected]> Cc: James Hogan <[email protected]> Acked-by: Stephen Boyd <[email protected]> Patchwork: https://patchwork.linux-mips.org/patch/9321/ Signed-off-by: Ralf Baechle <[email protected]>
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@ -306,3 +306,24 @@ static void __init pistachio_cr_periph_init(struct device_node *np)
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}
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CLK_OF_DECLARE(pistachio_cr_periph, "img,pistachio-cr-periph",
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pistachio_cr_periph_init);
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static struct pistachio_gate pistachio_ext_gates[] __initdata = {
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GATE(EXT_CLK_ENET_IN, "enet_clk_in_gate", "enet_clk_in", 0x58, 5),
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GATE(EXT_CLK_AUDIO_IN, "audio_clk_in_gate", "audio_clk_in", 0x58, 8)
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};
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static void __init pistachio_cr_top_init(struct device_node *np)
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{
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struct pistachio_clk_provider *p;
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p = pistachio_clk_alloc_provider(np, EXT_CLK_NR_CLKS);
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if (!p)
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return;
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pistachio_clk_register_gate(p, pistachio_ext_gates,
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ARRAY_SIZE(pistachio_ext_gates));
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pistachio_clk_register_provider(p);
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}
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CLK_OF_DECLARE(pistachio_cr_top, "img,pistachio-cr-top",
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pistachio_cr_top_init);
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