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soc: swr-mstr: Reset swr only during init or ssr
Reset swr only during init or ssr-pdr scenarios. Do not reset swr during clock stop, which would result in bad state of master and cause error interrupts. Change-Id: I88e071921409a5b5797aeedb8e7cb57cb5d5bb9a Signed-off-by: Ramprasad Katkam <katkam@codeaurora.org>
This commit is contained in:
parent
63f4815535
commit
a4c747b6d5
3 changed files with 42 additions and 10 deletions
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@ -1,5 +1,5 @@
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// SPDX-License-Identifier: GPL-2.0-only
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/* Copyright (c) 2018, The Linux Foundation. All rights reserved.
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/* Copyright (c) 2018-2019, The Linux Foundation. All rights reserved.
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*/
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#include <linux/module.h>
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@ -332,6 +332,7 @@ struct rx_macro_priv {
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u16 prim_int_users[INTERP_MAX];
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int rx_mclk_users;
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int swr_clk_users;
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bool reset_swr;
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int clsh_users;
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int rx_mclk_cnt;
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bool is_native_on;
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@ -1183,6 +1184,8 @@ static int rx_macro_event_handler(struct snd_soc_component *component,
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break;
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case BOLERO_MACRO_EVT_SSR_UP:
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rx_priv->dev_up = true;
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/* reset swr after ssr/pdr */
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rx_priv->reset_swr = true;
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/* enable&disable MCLK_MUX1 to reset GFMUX reg */
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bolero_request_clock(rx_priv->dev,
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RX_MACRO, MCLK_MUX1, true);
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@ -3088,15 +3091,18 @@ static int rx_swrm_clock(void *handle, bool enable)
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__func__);
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goto exit;
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}
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regmap_update_bits(regmap,
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BOLERO_CDC_RX_CLK_RST_CTRL_SWR_CONTROL,
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0x02, 0x02);
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if (rx_priv->reset_swr)
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regmap_update_bits(regmap,
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BOLERO_CDC_RX_CLK_RST_CTRL_SWR_CONTROL,
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0x02, 0x02);
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regmap_update_bits(regmap,
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BOLERO_CDC_RX_CLK_RST_CTRL_SWR_CONTROL,
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0x01, 0x01);
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regmap_update_bits(regmap,
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BOLERO_CDC_RX_CLK_RST_CTRL_SWR_CONTROL,
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0x02, 0x00);
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if (rx_priv->reset_swr)
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regmap_update_bits(regmap,
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BOLERO_CDC_RX_CLK_RST_CTRL_SWR_CONTROL,
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0x02, 0x00);
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rx_priv->reset_swr = false;
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msm_cdc_pinctrl_select_active_state(
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rx_priv->rx_swr_gpio_p);
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}
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@ -3444,6 +3450,7 @@ static int rx_macro_probe(struct platform_device *pdev)
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return -ENOMEM;
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}
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rx_priv->rx_mclk_mode_muxsel = muxsel_io;
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rx_priv->reset_swr = true;
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INIT_WORK(&rx_priv->rx_macro_add_child_devices_work,
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rx_macro_add_child_devices);
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rx_priv->swr_plat_data.handle = (void *) rx_priv;
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@ -1,5 +1,5 @@
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// SPDX-License-Identifier: GPL-2.0-only
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/* Copyright (c) 2018, The Linux Foundation. All rights reserved.
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/* Copyright (c) 2018-2019, The Linux Foundation. All rights reserved.
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*/
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#include <linux/module.h>
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@ -127,6 +127,7 @@ struct tx_macro_priv {
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bool dec_active[NUM_DECIMATORS];
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int tx_mclk_users;
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int swr_clk_users;
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bool reset_swr;
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struct clk *tx_core_clk;
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struct clk *tx_npl_clk;
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struct mutex mclk_lock;
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@ -317,6 +318,8 @@ static int tx_macro_event_handler(struct snd_soc_component *component,
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SWR_DEVICE_DOWN, NULL);
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break;
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case BOLERO_MACRO_EVT_SSR_UP:
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/* reset swr after ssr/pdr */
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tx_priv->reset_swr = true;
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swrm_wcd_notify(
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tx_priv->swr_ctrl_data[0].tx_swr_pdev,
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SWR_DEVICE_SSR_UP, NULL);
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@ -1426,9 +1429,18 @@ static int tx_macro_swrm_clock(void *handle, bool enable)
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__func__);
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goto exit;
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}
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if (tx_priv->reset_swr)
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regmap_update_bits(regmap,
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BOLERO_CDC_TX_CLK_RST_CTRL_SWR_CONTROL,
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0x02, 0x02);
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regmap_update_bits(regmap,
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BOLERO_CDC_TX_CLK_RST_CTRL_SWR_CONTROL,
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0x01, 0x01);
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if (tx_priv->reset_swr)
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regmap_update_bits(regmap,
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BOLERO_CDC_TX_CLK_RST_CTRL_SWR_CONTROL,
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0x02, 0x00);
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tx_priv->reset_swr = false;
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regmap_update_bits(regmap,
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BOLERO_CDC_TX_CLK_RST_CTRL_SWR_CONTROL,
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0x1C, 0x0C);
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@ -1799,7 +1811,7 @@ static int tx_macro_probe(struct platform_device *pdev)
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sample_rate, tx_priv) == TX_MACRO_DMIC_SAMPLE_RATE_UNDEFINED)
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return -EINVAL;
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}
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tx_priv->reset_swr = true;
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INIT_WORK(&tx_priv->tx_macro_add_child_devices_work,
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tx_macro_add_child_devices);
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tx_priv->swr_plat_data.handle = (void *) tx_priv;
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@ -1,5 +1,5 @@
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// SPDX-License-Identifier: GPL-2.0-only
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/* Copyright (c) 2018, The Linux Foundation. All rights reserved.
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/* Copyright (c) 2018-2019, The Linux Foundation. All rights reserved.
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*/
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#include <linux/module.h>
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@ -192,6 +192,7 @@ struct wsa_macro_priv {
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u16 prim_int_users[WSA_MACRO_RX1 + 1];
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u16 wsa_mclk_users;
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u16 swr_clk_users;
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bool reset_swr;
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unsigned int vi_feed_value;
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struct mutex mclk_lock;
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struct mutex swr_clk_lock;
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@ -929,6 +930,8 @@ static int wsa_macro_event_handler(struct snd_soc_component *component,
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SWR_DEVICE_DOWN, NULL);
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break;
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case BOLERO_MACRO_EVT_SSR_UP:
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/* reset swr after ssr/pdr */
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wsa_priv->reset_swr = true;
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swrm_wcd_notify(
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wsa_priv->swr_ctrl_data[0].wsa_swr_pdev,
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SWR_DEVICE_SSR_UP, NULL);
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@ -2568,9 +2571,18 @@ static int wsa_swrm_clock(void *handle, bool enable)
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__func__);
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goto exit;
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}
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if (wsa_priv->reset_swr)
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regmap_update_bits(regmap,
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BOLERO_CDC_WSA_CLK_RST_CTRL_SWR_CONTROL,
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0x02, 0x02);
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regmap_update_bits(regmap,
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BOLERO_CDC_WSA_CLK_RST_CTRL_SWR_CONTROL,
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0x01, 0x01);
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if (wsa_priv->reset_swr)
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regmap_update_bits(regmap,
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BOLERO_CDC_WSA_CLK_RST_CTRL_SWR_CONTROL,
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0x02, 0x00);
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wsa_priv->reset_swr = false;
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regmap_update_bits(regmap,
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BOLERO_CDC_WSA_CLK_RST_CTRL_SWR_CONTROL,
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0x1C, 0x0C);
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@ -2834,6 +2846,7 @@ static int wsa_macro_probe(struct platform_device *pdev)
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return -EINVAL;
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}
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wsa_priv->wsa_io_base = wsa_io_base;
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wsa_priv->reset_swr = true;
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INIT_WORK(&wsa_priv->wsa_macro_add_child_devices_work,
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wsa_macro_add_child_devices);
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wsa_priv->swr_plat_data.handle = (void *) wsa_priv;
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