soc: swr-mstr: Reset swr only during init or ssr

Reset swr only during init or ssr-pdr scenarios.
Do not reset swr during clock stop, which would
result in bad state of master and cause error
interrupts.

Change-Id: I88e071921409a5b5797aeedb8e7cb57cb5d5bb9a
Signed-off-by: Ramprasad Katkam <katkam@codeaurora.org>
This commit is contained in:
Ramprasad Katkam 2018-12-11 19:15:53 +05:30 • committed by Meng Wang
commit a4c747b6d5
3 changed files with 42 additions and 10 deletions

View file

@ -1,5 +1,5 @@
// SPDX-License-Identifier: GPL-2.0-only
/* Copyright (c) 2018, The Linux Foundation. All rights reserved.
/* Copyright (c) 2018-2019, The Linux Foundation. All rights reserved.
*/
#include <linux/module.h>
@ -332,6 +332,7 @@ struct rx_macro_priv {
u16 prim_int_users[INTERP_MAX];
int rx_mclk_users;
int swr_clk_users;
bool reset_swr;
int clsh_users;
int rx_mclk_cnt;
bool is_native_on;
@ -1183,6 +1184,8 @@ static int rx_macro_event_handler(struct snd_soc_component *component,
break;
case BOLERO_MACRO_EVT_SSR_UP:
rx_priv->dev_up = true;
/* reset swr after ssr/pdr */
rx_priv->reset_swr = true;
/* enable&disable MCLK_MUX1 to reset GFMUX reg */
bolero_request_clock(rx_priv->dev,
RX_MACRO, MCLK_MUX1, true);
@ -3088,15 +3091,18 @@ static int rx_swrm_clock(void *handle, bool enable)
__func__);
goto exit;
}
regmap_update_bits(regmap,
BOLERO_CDC_RX_CLK_RST_CTRL_SWR_CONTROL,
0x02, 0x02);
if (rx_priv->reset_swr)
regmap_update_bits(regmap,
BOLERO_CDC_RX_CLK_RST_CTRL_SWR_CONTROL,
0x02, 0x02);
regmap_update_bits(regmap,
BOLERO_CDC_RX_CLK_RST_CTRL_SWR_CONTROL,
0x01, 0x01);
regmap_update_bits(regmap,
BOLERO_CDC_RX_CLK_RST_CTRL_SWR_CONTROL,
0x02, 0x00);
if (rx_priv->reset_swr)
regmap_update_bits(regmap,
BOLERO_CDC_RX_CLK_RST_CTRL_SWR_CONTROL,
0x02, 0x00);
rx_priv->reset_swr = false;
msm_cdc_pinctrl_select_active_state(
rx_priv->rx_swr_gpio_p);
}
@ -3444,6 +3450,7 @@ static int rx_macro_probe(struct platform_device *pdev)
return -ENOMEM;
}
rx_priv->rx_mclk_mode_muxsel = muxsel_io;
rx_priv->reset_swr = true;
INIT_WORK(&rx_priv->rx_macro_add_child_devices_work,
rx_macro_add_child_devices);
rx_priv->swr_plat_data.handle = (void *) rx_priv;

View file

@ -1,5 +1,5 @@
// SPDX-License-Identifier: GPL-2.0-only
/* Copyright (c) 2018, The Linux Foundation. All rights reserved.
/* Copyright (c) 2018-2019, The Linux Foundation. All rights reserved.
*/
#include <linux/module.h>
@ -127,6 +127,7 @@ struct tx_macro_priv {
bool dec_active[NUM_DECIMATORS];
int tx_mclk_users;
int swr_clk_users;
bool reset_swr;
struct clk *tx_core_clk;
struct clk *tx_npl_clk;
struct mutex mclk_lock;
@ -317,6 +318,8 @@ static int tx_macro_event_handler(struct snd_soc_component *component,
SWR_DEVICE_DOWN, NULL);
break;
case BOLERO_MACRO_EVT_SSR_UP:
/* reset swr after ssr/pdr */
tx_priv->reset_swr = true;
swrm_wcd_notify(
tx_priv->swr_ctrl_data[0].tx_swr_pdev,
SWR_DEVICE_SSR_UP, NULL);
@ -1426,9 +1429,18 @@ static int tx_macro_swrm_clock(void *handle, bool enable)
__func__);
goto exit;
}
if (tx_priv->reset_swr)
regmap_update_bits(regmap,
BOLERO_CDC_TX_CLK_RST_CTRL_SWR_CONTROL,
0x02, 0x02);
regmap_update_bits(regmap,
BOLERO_CDC_TX_CLK_RST_CTRL_SWR_CONTROL,
0x01, 0x01);
if (tx_priv->reset_swr)
regmap_update_bits(regmap,
BOLERO_CDC_TX_CLK_RST_CTRL_SWR_CONTROL,
0x02, 0x00);
tx_priv->reset_swr = false;
regmap_update_bits(regmap,
BOLERO_CDC_TX_CLK_RST_CTRL_SWR_CONTROL,
0x1C, 0x0C);
@ -1799,7 +1811,7 @@ static int tx_macro_probe(struct platform_device *pdev)
sample_rate, tx_priv) == TX_MACRO_DMIC_SAMPLE_RATE_UNDEFINED)
return -EINVAL;
}
tx_priv->reset_swr = true;
INIT_WORK(&tx_priv->tx_macro_add_child_devices_work,
tx_macro_add_child_devices);
tx_priv->swr_plat_data.handle = (void *) tx_priv;

View file

@ -1,5 +1,5 @@
// SPDX-License-Identifier: GPL-2.0-only
/* Copyright (c) 2018, The Linux Foundation. All rights reserved.
/* Copyright (c) 2018-2019, The Linux Foundation. All rights reserved.
*/
#include <linux/module.h>
@ -192,6 +192,7 @@ struct wsa_macro_priv {
u16 prim_int_users[WSA_MACRO_RX1 + 1];
u16 wsa_mclk_users;
u16 swr_clk_users;
bool reset_swr;
unsigned int vi_feed_value;
struct mutex mclk_lock;
struct mutex swr_clk_lock;
@ -929,6 +930,8 @@ static int wsa_macro_event_handler(struct snd_soc_component *component,
SWR_DEVICE_DOWN, NULL);
break;
case BOLERO_MACRO_EVT_SSR_UP:
/* reset swr after ssr/pdr */
wsa_priv->reset_swr = true;
swrm_wcd_notify(
wsa_priv->swr_ctrl_data[0].wsa_swr_pdev,
SWR_DEVICE_SSR_UP, NULL);
@ -2568,9 +2571,18 @@ static int wsa_swrm_clock(void *handle, bool enable)
__func__);
goto exit;
}
if (wsa_priv->reset_swr)
regmap_update_bits(regmap,
BOLERO_CDC_WSA_CLK_RST_CTRL_SWR_CONTROL,
0x02, 0x02);
regmap_update_bits(regmap,
BOLERO_CDC_WSA_CLK_RST_CTRL_SWR_CONTROL,
0x01, 0x01);
if (wsa_priv->reset_swr)
regmap_update_bits(regmap,
BOLERO_CDC_WSA_CLK_RST_CTRL_SWR_CONTROL,
0x02, 0x00);
wsa_priv->reset_swr = false;
regmap_update_bits(regmap,
BOLERO_CDC_WSA_CLK_RST_CTRL_SWR_CONTROL,
0x1C, 0x0C);
@ -2834,6 +2846,7 @@ static int wsa_macro_probe(struct platform_device *pdev)
return -EINVAL;
}
wsa_priv->wsa_io_base = wsa_io_base;
wsa_priv->reset_swr = true;
INIT_WORK(&wsa_priv->wsa_macro_add_child_devices_work,
wsa_macro_add_child_devices);
wsa_priv->swr_plat_data.handle = (void *) wsa_priv;