mirror of
https://github.com/BobTheBlinker/android_kernel_motorola_sm6375.git
synced 2026-10-09 21:59:12 -04:00
qcacld-3.0: Fix IPA backward compatibility
Fix IPA WDI 1.0 update for overwrite of previous commit and use only QCA_WIFI_3_0 build flag for qcacld-3.0. Change-Id: I3bff4a4e10102e97aeb57fb0f67d48933e0bae9b CRs-fixed: 994144
This commit is contained in:
Rajeev Kumar
Gerrit - the friendly Code Review server
parent
249ea8d5c7
commit
a4d80b5879
4 changed files with 99 additions and 103 deletions
4
Kbuild
4
Kbuild
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@ -946,10 +946,6 @@ CDEFINES += -DADRASTEA_SHADOW_REGISTERS
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CDEFINES += -DADRASTEA_RRI_ON_DDR
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endif
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ifneq (y,$(filter y,$(CONFIG_CNSS_EOS) $(CONFIG_ICNSS) $(CONFIG_CNSS_ADRASTEA)))
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CDEFINES += -DQCA_WIFI_2_0
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endif
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ifeq ($(CONFIG_WLAN_FASTPATH), y)
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CDEFINES += -DWLAN_FEATURE_FASTPATH
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endif
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@ -650,100 +650,7 @@ htt_h2t_aggr_cfg_msg(struct htt_pdev_t *pdev,
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* Return: 0 success
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* A_NO_MEMORY No memory fail
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*/
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#ifdef QCA_WIFI_2_0
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/* Rome Support only WDI 1.0 */
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int htt_h2t_ipa_uc_rsc_cfg_msg(struct htt_pdev_t *pdev)
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{
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struct htt_htc_pkt *pkt;
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qdf_nbuf_t msg;
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uint32_t *msg_word;
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pkt = htt_htc_pkt_alloc(pdev);
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if (!pkt)
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return A_NO_MEMORY;
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/* show that this is not a tx frame download
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* (not required, but helpful)
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*/
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pkt->msdu_id = HTT_TX_COMPL_INV_MSDU_ID;
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pkt->pdev_ctxt = NULL; /* not used during send-done callback */
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/* reserve room for HTC header */
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msg = qdf_nbuf_alloc(pdev->osdev, HTT_MSG_BUF_SIZE(HTT_WDI_IPA_CFG_SZ),
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HTC_HEADER_LEN + HTC_HDR_ALIGNMENT_PADDING, 4,
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false);
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if (!msg) {
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htt_htc_pkt_free(pdev, pkt);
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return A_NO_MEMORY;
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}
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/* set the length of the message */
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qdf_nbuf_put_tail(msg, HTT_WDI_IPA_CFG_SZ);
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/* fill in the message contents */
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msg_word = (uint32_t *) qdf_nbuf_data(msg);
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/* rewind beyond alignment pad to get to the HTC header reserved area */
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qdf_nbuf_push_head(msg, HTC_HDR_ALIGNMENT_PADDING);
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*msg_word = 0;
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HTT_WDI_IPA_CFG_TX_PKT_POOL_SIZE_SET(*msg_word,
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pdev->ipa_uc_tx_rsc.alloc_tx_buf_cnt);
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HTT_H2T_MSG_TYPE_SET(*msg_word, HTT_H2T_MSG_TYPE_WDI_IPA_CFG);
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msg_word++;
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*msg_word = 0;
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HTT_WDI_IPA_CFG_TX_COMP_RING_BASE_ADDR_SET(*msg_word,
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(unsigned int)pdev->ipa_uc_tx_rsc.tx_comp_base.paddr);
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msg_word++;
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*msg_word = 0;
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HTT_WDI_IPA_CFG_TX_COMP_RING_SIZE_SET(*msg_word,
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(unsigned int)ol_cfg_ipa_uc_tx_max_buf_cnt(pdev->ctrl_pdev));
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msg_word++;
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*msg_word = 0;
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HTT_WDI_IPA_CFG_TX_COMP_WR_IDX_ADDR_SET(*msg_word,
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(unsigned int)pdev->ipa_uc_tx_rsc.tx_comp_idx_paddr);
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msg_word++;
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*msg_word = 0;
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HTT_WDI_IPA_CFG_TX_CE_WR_IDX_ADDR_SET(*msg_word,
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(unsigned int)pdev->ipa_uc_tx_rsc.tx_ce_idx.paddr);
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msg_word++;
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*msg_word = 0;
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HTT_WDI_IPA_CFG_RX_IND_RING_BASE_ADDR_SET(*msg_word,
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(unsigned int)pdev->ipa_uc_rx_rsc.rx_ind_ring_base.paddr);
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msg_word++;
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*msg_word = 0;
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HTT_WDI_IPA_CFG_RX_IND_RING_SIZE_SET(*msg_word,
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(unsigned int)ol_cfg_ipa_uc_rx_ind_ring_size(pdev->ctrl_pdev));
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msg_word++;
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*msg_word = 0;
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HTT_WDI_IPA_CFG_RX_IND_RD_IDX_ADDR_SET(*msg_word,
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(unsigned int)pdev->ipa_uc_rx_rsc.rx_ipa_prc_done_idx.paddr);
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msg_word++;
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*msg_word = 0;
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HTT_WDI_IPA_CFG_RX_IND_WR_IDX_ADDR_SET(*msg_word,
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(unsigned int)pdev->ipa_uc_rx_rsc.rx_rdy_idx_paddr);
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SET_HTC_PACKET_INFO_TX(&pkt->htc_pkt,
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htt_h2t_send_complete_free_netbuf,
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qdf_nbuf_data(msg),
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qdf_nbuf_len(msg),
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pdev->htc_endpoint,
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HTC_TX_PACKET_TAG_RUNTIME_PUT);
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SET_HTC_PACKET_NET_BUF_CONTEXT(&pkt->htc_pkt, msg);
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htc_send_pkt(pdev->htc_pdev, &pkt->htc_pkt);
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return A_OK;
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}
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#else
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#ifdef QCA_WIFI_3_0
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int htt_h2t_ipa_uc_rsc_cfg_msg(struct htt_pdev_t *pdev)
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{
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struct htt_htc_pkt *pkt;
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@ -887,6 +794,99 @@ int htt_h2t_ipa_uc_rsc_cfg_msg(struct htt_pdev_t *pdev)
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return A_OK;
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}
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#else
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/* Rome Support only WDI 1.0 */
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int htt_h2t_ipa_uc_rsc_cfg_msg(struct htt_pdev_t *pdev)
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{
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struct htt_htc_pkt *pkt;
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qdf_nbuf_t msg;
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uint32_t *msg_word;
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pkt = htt_htc_pkt_alloc(pdev);
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if (!pkt)
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return A_NO_MEMORY;
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/* show that this is not a tx frame download
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* (not required, but helpful)
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*/
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pkt->msdu_id = HTT_TX_COMPL_INV_MSDU_ID;
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pkt->pdev_ctxt = NULL; /* not used during send-done callback */
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/* reserve room for HTC header */
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msg = qdf_nbuf_alloc(pdev->osdev, HTT_MSG_BUF_SIZE(HTT_WDI_IPA_CFG_SZ),
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HTC_HEADER_LEN + HTC_HDR_ALIGNMENT_PADDING, 4,
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false);
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if (!msg) {
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htt_htc_pkt_free(pdev, pkt);
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return A_NO_MEMORY;
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}
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/* set the length of the message */
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qdf_nbuf_put_tail(msg, HTT_WDI_IPA_CFG_SZ);
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/* fill in the message contents */
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msg_word = (uint32_t *) qdf_nbuf_data(msg);
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/* rewind beyond alignment pad to get to the HTC header reserved area */
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qdf_nbuf_push_head(msg, HTC_HDR_ALIGNMENT_PADDING);
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*msg_word = 0;
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HTT_WDI_IPA_CFG_TX_PKT_POOL_SIZE_SET(*msg_word,
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pdev->ipa_uc_tx_rsc.alloc_tx_buf_cnt);
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HTT_H2T_MSG_TYPE_SET(*msg_word, HTT_H2T_MSG_TYPE_WDI_IPA_CFG);
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msg_word++;
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*msg_word = 0;
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HTT_WDI_IPA_CFG_TX_COMP_RING_BASE_ADDR_SET(*msg_word,
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(unsigned int)pdev->ipa_uc_tx_rsc.tx_comp_base.paddr);
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msg_word++;
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*msg_word = 0;
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HTT_WDI_IPA_CFG_TX_COMP_RING_SIZE_SET(*msg_word,
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(unsigned int)ol_cfg_ipa_uc_tx_max_buf_cnt(pdev->ctrl_pdev));
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msg_word++;
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*msg_word = 0;
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HTT_WDI_IPA_CFG_TX_COMP_WR_IDX_ADDR_SET(*msg_word,
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(unsigned int)pdev->ipa_uc_tx_rsc.tx_comp_idx_paddr);
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msg_word++;
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*msg_word = 0;
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HTT_WDI_IPA_CFG_TX_CE_WR_IDX_ADDR_SET(*msg_word,
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(unsigned int)pdev->ipa_uc_tx_rsc.tx_ce_idx.paddr);
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msg_word++;
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*msg_word = 0;
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HTT_WDI_IPA_CFG_RX_IND_RING_BASE_ADDR_SET(*msg_word,
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(unsigned int)pdev->ipa_uc_rx_rsc.rx_ind_ring_base.paddr);
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msg_word++;
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*msg_word = 0;
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HTT_WDI_IPA_CFG_RX_IND_RING_SIZE_SET(*msg_word,
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(unsigned int)ol_cfg_ipa_uc_rx_ind_ring_size(pdev->ctrl_pdev));
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msg_word++;
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*msg_word = 0;
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HTT_WDI_IPA_CFG_RX_IND_RD_IDX_ADDR_SET(*msg_word,
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(unsigned int)pdev->ipa_uc_rx_rsc.rx_ipa_prc_done_idx.paddr);
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msg_word++;
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*msg_word = 0;
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HTT_WDI_IPA_CFG_RX_IND_WR_IDX_ADDR_SET(*msg_word,
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(unsigned int)pdev->ipa_uc_rx_rsc.rx_rdy_idx_paddr);
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SET_HTC_PACKET_INFO_TX(&pkt->htc_pkt,
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htt_h2t_send_complete_free_netbuf,
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qdf_nbuf_data(msg),
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qdf_nbuf_len(msg),
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pdev->htc_endpoint,
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HTC_TX_PACKET_TAG_RUNTIME_PUT);
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SET_HTC_PACKET_NET_BUF_CONTEXT(&pkt->htc_pkt, msg);
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htc_send_pkt(pdev->htc_pdev, &pkt->htc_pkt);
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return A_OK;
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}
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#endif
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/**
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@ -2294,7 +2294,7 @@ int htt_rx_ipa_uc_alloc_wdi2_rsc(struct htt_pdev_t *pdev,
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qdf_mem_alloc_consistent(
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pdev->osdev, pdev->osdev->dev,
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rx_ind_ring_elements *
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sizeof(struct ipa_uc_rx_ring_elem_t),
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sizeof(qdf_dma_addr_t),
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&pdev->ipa_uc_rx_rsc.rx2_ind_ring_base.paddr);
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if (!pdev->ipa_uc_rx_rsc.rx2_ind_ring_base.vaddr) {
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qdf_print("%s: RX IND RING alloc fail", __func__);
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@ -2303,7 +2303,7 @@ int htt_rx_ipa_uc_alloc_wdi2_rsc(struct htt_pdev_t *pdev,
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/* RX indication ring size, by bytes */
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pdev->ipa_uc_rx_rsc.rx2_ind_ring_size =
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rx_ind_ring_elements * sizeof(struct ipa_uc_rx_ring_elem_t);
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rx_ind_ring_elements * sizeof(qdf_dma_addr_t);
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qdf_mem_zero(pdev->ipa_uc_rx_rsc.rx2_ind_ring_base.vaddr,
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pdev->ipa_uc_rx_rsc.rx2_ind_ring_size);
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@ -847,7 +847,7 @@ void htt_tx_desc_display(void *tx_desc)
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#endif
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#ifdef IPA_OFFLOAD
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#ifdef QCA_WIFI_2_0
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#ifdef QCA_WIFI_3_0
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/**
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* htt_tx_ipa_uc_wdi_tx_buf_alloc() - Alloc WDI TX buffers
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* @pdev: htt context
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@ -859,65 +859,6 @@ void htt_tx_desc_display(void *tx_desc)
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*
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* Return: 0 success
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*/
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int htt_tx_ipa_uc_wdi_tx_buf_alloc(struct htt_pdev_t *pdev,
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unsigned int uc_tx_buf_sz,
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unsigned int uc_tx_buf_cnt,
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unsigned int uc_tx_partition_base)
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{
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unsigned int tx_buffer_count;
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qdf_nbuf_t buffer_vaddr;
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qdf_dma_addr_t buffer_paddr;
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uint32_t *header_ptr;
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uint32_t *ring_vaddr;
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#define IPA_UC_TX_BUF_FRAG_DESC_OFFSET 16
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#define IPA_UC_TX_BUF_FRAG_HDR_OFFSET 32
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ring_vaddr = pdev->ipa_uc_tx_rsc.tx_comp_base.vaddr;
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/* Allocate TX buffers as many as possible */
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for (tx_buffer_count = 0;
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tx_buffer_count < (uc_tx_buf_cnt - 1); tx_buffer_count++) {
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buffer_vaddr = qdf_nbuf_alloc(pdev->osdev,
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uc_tx_buf_sz, 0, 4, false);
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if (!buffer_vaddr) {
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qdf_print("%s: TX BUF alloc fail, loop index: %d",
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__func__, tx_buffer_count);
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return tx_buffer_count;
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}
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/* Init buffer */
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qdf_mem_zero(qdf_nbuf_data(buffer_vaddr), uc_tx_buf_sz);
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header_ptr = (uint32_t *) qdf_nbuf_data(buffer_vaddr);
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/* HTT control header */
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*header_ptr = HTT_IPA_UC_OFFLOAD_TX_HEADER_DEFAULT;
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header_ptr++;
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/* PKT ID */
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*header_ptr |= ((uint16_t) uc_tx_partition_base +
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tx_buffer_count) << 16;
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qdf_nbuf_map(pdev->osdev, buffer_vaddr, QDF_DMA_BIDIRECTIONAL);
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buffer_paddr = qdf_nbuf_get_frag_paddr(buffer_vaddr, 0);
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header_ptr++;
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*header_ptr = (uint32_t) (buffer_paddr +
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IPA_UC_TX_BUF_FRAG_DESC_OFFSET);
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header_ptr++;
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*header_ptr = 0xFFFFFFFF;
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/* FRAG Header */
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header_ptr++;
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*header_ptr = buffer_paddr + IPA_UC_TX_BUF_FRAG_HDR_OFFSET;
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*ring_vaddr = buffer_paddr;
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pdev->ipa_uc_tx_rsc.tx_buf_pool_vaddr_strg[tx_buffer_count] =
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buffer_vaddr;
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/* Memory barrier to ensure actual value updated */
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ring_vaddr++;
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}
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return tx_buffer_count;
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}
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#else
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int htt_tx_ipa_uc_wdi_tx_buf_alloc(struct htt_pdev_t *pdev,
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unsigned int uc_tx_buf_sz,
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unsigned int uc_tx_buf_cnt,
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@ -988,6 +929,65 @@ int htt_tx_ipa_uc_wdi_tx_buf_alloc(struct htt_pdev_t *pdev,
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}
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return tx_buffer_count;
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}
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#else
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int htt_tx_ipa_uc_wdi_tx_buf_alloc(struct htt_pdev_t *pdev,
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unsigned int uc_tx_buf_sz,
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unsigned int uc_tx_buf_cnt,
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unsigned int uc_tx_partition_base)
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{
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unsigned int tx_buffer_count;
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qdf_nbuf_t buffer_vaddr;
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qdf_dma_addr_t buffer_paddr;
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uint32_t *header_ptr;
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uint32_t *ring_vaddr;
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#define IPA_UC_TX_BUF_FRAG_DESC_OFFSET 16
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#define IPA_UC_TX_BUF_FRAG_HDR_OFFSET 32
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ring_vaddr = pdev->ipa_uc_tx_rsc.tx_comp_base.vaddr;
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/* Allocate TX buffers as many as possible */
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for (tx_buffer_count = 0;
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tx_buffer_count < (uc_tx_buf_cnt - 1); tx_buffer_count++) {
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buffer_vaddr = qdf_nbuf_alloc(pdev->osdev,
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uc_tx_buf_sz, 0, 4, false);
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if (!buffer_vaddr) {
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qdf_print("%s: TX BUF alloc fail, loop index: %d",
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__func__, tx_buffer_count);
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return tx_buffer_count;
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}
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/* Init buffer */
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qdf_mem_zero(qdf_nbuf_data(buffer_vaddr), uc_tx_buf_sz);
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header_ptr = (uint32_t *) qdf_nbuf_data(buffer_vaddr);
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/* HTT control header */
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*header_ptr = HTT_IPA_UC_OFFLOAD_TX_HEADER_DEFAULT;
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header_ptr++;
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/* PKT ID */
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*header_ptr |= ((uint16_t) uc_tx_partition_base +
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tx_buffer_count) << 16;
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qdf_nbuf_map(pdev->osdev, buffer_vaddr, QDF_DMA_BIDIRECTIONAL);
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buffer_paddr = qdf_nbuf_get_frag_paddr(buffer_vaddr, 0);
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header_ptr++;
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*header_ptr = (uint32_t) (buffer_paddr +
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IPA_UC_TX_BUF_FRAG_DESC_OFFSET);
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header_ptr++;
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*header_ptr = 0xFFFFFFFF;
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/* FRAG Header */
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header_ptr++;
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*header_ptr = buffer_paddr + IPA_UC_TX_BUF_FRAG_HDR_OFFSET;
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*ring_vaddr = buffer_paddr;
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pdev->ipa_uc_tx_rsc.tx_buf_pool_vaddr_strg[tx_buffer_count] =
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buffer_vaddr;
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/* Memory barrier to ensure actual value updated */
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ring_vaddr++;
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}
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return tx_buffer_count;
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}
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#endif
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/**
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