From a51192b3f0cd3137b6c8576dbfab34d2f34d69aa Mon Sep 17 00:00:00 2001 From: Yu Wu Date: Tue, 20 Jul 2021 18:34:22 +0800 Subject: [PATCH] ARM: dts: msm: remove the t-clk-post and t-clk-pre timings for blair QRD The qcom,mdss-dsi-t-clk-post and qcom,mdss-dsi-t-clk-pre panel properties are not required for DSI ctrl v2.3.0 and above, using DSI phy v4.0.0 and above. As the Blair is reusing the display nodes from the Holi target, these two properties are getting included automatically. If these properties are defined, the DSI ctrl programs the DSI_CLKOUT_TIMING_CTRL register for all the DSI PHY versions, that is not recommended as per the DSI HPG. We don't need these two for the Blair, remove them. Change-Id: Ic4e1a3a306e4aa191cd7cb3b6017cd3b2f226e8e --- display/blair-sde-display-qrd.dtsi | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/display/blair-sde-display-qrd.dtsi b/display/blair-sde-display-qrd.dtsi index e8d21a2f08c7..e12529ae97cf 100644 --- a/display/blair-sde-display-qrd.dtsi +++ b/display/blair-sde-display-qrd.dtsi @@ -1,6 +1,8 @@ /* Should extend holi-sde-display-qrd-pm6125.dtsi */ &dsi_r66451_amoled_cmd { + /delete-property/ qcom,mdss-dsi-t-clk-post; + /delete-property/ qcom,mdss-dsi-t-clk-pre; qcom,mdss-dsi-display-timings { timing@0 { qcom,mdss-dsi-panel-phy-timings = [00 10 04 04 1E 1E 04 @@ -20,6 +22,8 @@ }; &dsi_r66451_amoled_video { + /delete-property/ qcom,mdss-dsi-t-clk-post; + /delete-property/ qcom,mdss-dsi-t-clk-pre; qcom,mdss-dsi-display-timings { timing@0 { qcom,mdss-dsi-panel-phy-timings = [00 1C 08 07 23 22 07 @@ -29,6 +33,8 @@ }; &dsi_r66451_amoled_90hz_cmd { + /delete-property/ qcom,mdss-dsi-t-clk-post; + /delete-property/ qcom,mdss-dsi-t-clk-pre; qcom,mdss-dsi-display-timings { timing@0 { qcom,mdss-dsi-panel-phy-timings = [00 10 04 04 1E 1E 04 @@ -43,6 +49,8 @@ }; &dsi_r66451_amoled_90hz_video { + /delete-property/ qcom,mdss-dsi-t-clk-post; + /delete-property/ qcom,mdss-dsi-t-clk-pre; qcom,mdss-dsi-display-timings { timing@0 { qcom,mdss-dsi-panel-phy-timings = [00 16 06 05 20 1F 06 @@ -52,6 +60,8 @@ }; &dsi_r66451_amoled_60hz_video { + /delete-property/ qcom,mdss-dsi-t-clk-post; + /delete-property/ qcom,mdss-dsi-t-clk-pre; qcom,mdss-dsi-display-timings { timing@0 { qcom,mdss-dsi-panel-phy-timings = [00 10 04 04 1E 1E 04