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Devicetree updates for 3.7
- Import of latest upstream device tree compiler (dtc) - New function of_get_child_by_name - Support for #size-cells of 0 and #addr-cells of >2 - Couple of DT binding documentation updates -----BEGIN PGP SIGNATURE----- Version: GnuPG v1.4.11 (GNU/Linux) iQEcBAABAgAGBQJQbF9eAAoJEMhvYp4jgsXiMVAH/3AsqH/ksWFO48L2342WhPzv JLP2YJQ+X2E3fi4sIXWDOAHXgSsKcKYiUqRJNpebdAzfK+/HCdtV594GXP9MfUdq 05ByUBa728wNPHiQitbtwLu+MN0ot1icXeHB+Gx8LuVrJnW/iJv/FHa6QU+cc9ct jxnDu8Lfp4ja4rFWq56c5vda6ecP5nVIyAPZ40z9Q6QioL0BxJ4axQ8mW6lxG0SH BxOzCppxxShU3O52typ29UORfTDfFPFmskLuJPxGThI4HWaIfpBc55wKKw8P2SR0 2/uK+TJw/UTsDwB/IIzbane4AIScj7ZdRjN1T132DcX9e/aDaZhDMNoG3TSE6kQ= =CZiW -----END PGP SIGNATURE----- Merge tag 'dt-for-3.7' of git://sources.calxeda.com/kernel/linux Pull devicetree updates from Rob Herring: - Import of latest upstream device tree compiler (dtc) - New function of_get_child_by_name - Support for #size-cells of 0 and #addr-cells of >2 - Couple of DT binding documentation updates Fix up trivial conflicts due to of_get_child_by_name() having been added next to the new of_get_next_available_child(). * tag 'dt-for-3.7' of git://sources.calxeda.com/kernel/linux: MAINTAINERS: add scripts/dtc under Devicetree maintainers dtc: import latest upstream dtc dt: Document general interrupt controller bindings dt/s3c64xx/spi: Use of_get_child_by_name to get a named child dt: introduce of_get_child_by_name to get child node by name of: i2c: add support for wakeup-source property of/address: Handle #address-cells > 2 specially DT: export of_irq_to_resource_table() devicetree: serial: Add documentation for imx serial devicetree: pwm: mxs-pwm.txt: Fix reg field annotation of: Allow busses with #size-cells=0
This commit is contained in:
Linus Torvalds
commit
a54dfb1a84
42 changed files with 4057 additions and 712 deletions
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Specifying interrupt information for devices
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============================================
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1) Interrupt client nodes
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-------------------------
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Nodes that describe devices which generate interrupts must contain an
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"interrupts" property. This property must contain a list of interrupt
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specifiers, one per output interrupt. The format of the interrupt specifier is
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determined by the interrupt controller to which the interrupts are routed; see
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section 2 below for details.
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The "interrupt-parent" property is used to specify the controller to which
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interrupts are routed and contains a single phandle referring to the interrupt
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controller node. This property is inherited, so it may be specified in an
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interrupt client node or in any of its parent nodes.
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2) Interrupt controller nodes
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-----------------------------
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A device is marked as an interrupt controller with the "interrupt-controller"
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property. This is a empty, boolean property. An additional "#interrupt-cells"
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property defines the number of cells needed to specify a single interrupt.
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It is the responsibility of the interrupt controller's binding to define the
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length and format of the interrupt specifier. The following two variants are
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commonly used:
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a) one cell
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-----------
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The #interrupt-cells property is set to 1 and the single cell defines the
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index of the interrupt within the controller.
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Example:
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vic: intc@10140000 {
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compatible = "arm,versatile-vic";
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interrupt-controller;
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#interrupt-cells = <1>;
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reg = <0x10140000 0x1000>;
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};
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sic: intc@10003000 {
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compatible = "arm,versatile-sic";
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interrupt-controller;
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#interrupt-cells = <1>;
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reg = <0x10003000 0x1000>;
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interrupt-parent = <&vic>;
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interrupts = <31>; /* Cascaded to vic */
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};
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b) two cells
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------------
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The #interrupt-cells property is set to 2 and the first cell defines the
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index of the interrupt within the controller, while the second cell is used
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to specify any of the following flags:
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- bits[3:0] trigger type and level flags
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1 = low-to-high edge triggered
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2 = high-to-low edge triggered
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4 = active high level-sensitive
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8 = active low level-sensitive
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Example:
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i2c@7000c000 {
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gpioext: gpio-adnp@41 {
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compatible = "ad,gpio-adnp";
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reg = <0x41>;
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interrupt-parent = <&gpio>;
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interrupts = <160 1>;
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gpio-controller;
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#gpio-cells = <1>;
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interrupt-controller;
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#interrupt-cells = <2>;
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nr-gpios = <64>;
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};
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sx8634@2b {
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compatible = "smtc,sx8634";
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reg = <0x2b>;
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interrupt-parent = <&gpioext>;
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interrupts = <3 0x8>;
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#address-cells = <1>;
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#size-cells = <0>;
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threshold = <0x40>;
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sensitivity = <7>;
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};
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};
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@ -11,7 +11,7 @@ Example:
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pwm: pwm@80064000 {
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compatible = "fsl,imx28-pwm", "fsl,imx23-pwm";
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reg = <0x80064000 2000>;
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reg = <0x80064000 0x2000>;
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#pwm-cells = <2>;
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fsl,pwm-number = <8>;
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};
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35
Documentation/devicetree/bindings/serial/fsl-imx-uart.txt
Normal file
35
Documentation/devicetree/bindings/serial/fsl-imx-uart.txt
Normal file
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* Freescale i.MX UART controller
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Required properties:
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- compatible : should be "fsl,imx21-uart"
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- reg : Address and length of the register set for the device
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- interrupts : Should contain UART interrupt number
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Optional properties:
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- fsl,uart-has-rtscts: indicate that RTS/CTS signals are used
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Note: Each uart controller should have an alias correctly numbered
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in "aliases" node.
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Example:
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- From imx51.dtsi:
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aliases {
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serial0 = &uart1;
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serial1 = &uart2;
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serial2 = &uart3;
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};
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uart1: serial@73fbc000 {
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compatible = "fsl,imx51-uart", "fsl,imx21-uart";
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reg = <0x73fbc000 0x4000>;
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interrupts = <31>;
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status = "disabled";
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}
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- From imx51-babbage.dts:
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uart1: serial@73fbc000 {
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fsl,uart-has-rtscts;
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status = "okay";
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};
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