From a571bf18b71c5fcb875fd26e3cd1749a06fd9894 Mon Sep 17 00:00:00 2001 From: Akshata Sahukar Date: Thu, 9 May 2019 00:00:50 -0700 Subject: [PATCH] msm: vidc: fix in UBWC LP5 Configuration Default UBWC configuration for LPDDR5 is corrected. Highest Bank Bit is set to 16. Change-Id: I0fb18279ae32d34a7f3bada6d05a72c5935430dd Signed-off-by: Akshata Sahukar --- msm/vidc/msm_vidc_platform.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/msm/vidc/msm_vidc_platform.c b/msm/vidc/msm_vidc_platform.c index 12ae94da85f5..61ba6e5a4e2b 100644 --- a/msm/vidc/msm_vidc_platform.c +++ b/msm/vidc/msm_vidc_platform.c @@ -779,7 +779,7 @@ static struct msm_vidc_efuse_data sdm670_efuse_data[] = { /* Default UBWC config for LPDDR5 */ static struct msm_vidc_ubwc_config_data kona_ubwc_data[] = { - UBWC_CONFIG(1, 1, 1, 0, 0, 0, 8, 32, 15, 0, 0), + UBWC_CONFIG(1, 1, 1, 0, 0, 0, 8, 32, 16, 0, 0), }; static struct msm_vidc_platform_data default_data = {