mirror of
https://github.com/BobTheBlinker/android_kernel_motorola_sm6375.git
synced 2026-10-14 00:24:41 -04:00
arm64/dt: Add Cyprus 5G IP68 initial dts
1.blair-cypfr-common-overlay.dtsi is copied from blair-mtp.dtsi of date 2021-06-02 17:56:14 2.AAdd NFC initialized config https://gerrit.mot.com/#/c/2008259/ has removed nfc from base dts, so add NFC config in blair-cypfr-common-overlay.dtsi just l(CR) holi-denver-common-overlay.dtsi to avoid build error. Change-Id: Icbe6ad737473d1e41fddb56d71372399c8082912 Reviewed-on: https://gerrit.mot.com/2045705 SME-Granted: SME Approvals Granted SLTApproved: Slta Waiver Tested-by: Jira Key Reviewed-by: Xiaofeng Wang <wangxf14@motorola.com> Reviewed-by: Huosheng Liao <liaohs@motorola.com> Submit-Approved: Jira Key
This commit is contained in:
jixj
panyq6
parent
78168a9b6f
commit
a604d0a239
4 changed files with 151 additions and 178 deletions
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@ -74,11 +74,11 @@ holi-cypfq-dvt1-overlay.dtbo-base := holi-moto-base.dtb
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holi-cypfq-dvt2-overlay.dtbo-base := holi-moto-base.dtb
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dtbo-$(CONFIG_CYPFR_DTB) += \
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holi-cypfr-evb-overlay.dtbo \
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holi-cypfr-evt-overlay.dtbo
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blair-cypfr-evb-overlay.dtbo \
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blair-cypfr-evt-overlay.dtbo
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holi-cypfr-evb-overlay.dtbo-base := holi-moto-base.dtb
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holi-cypfr-evt-overlay.dtbo-base := holi-moto-base.dtb
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blair-cypfr-evb-overlay.dtbo-base := blair-moto-base.dtb
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blair-cypfr-evt-overlay.dtbo-base := blair-moto-base.dtb
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dtbo-$(CONFIG_MILANF_DTB) += \
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blair-milanf-evb1-overlay.dtbo \
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@ -9,110 +9,18 @@
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include "holi-pm6125-moto-common-overlay.dtsi"
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#include "blair-nopmi-moto-common-overlay.dtsi"
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#include "holi-audio-wcd9370-aw882xx-overlay.dtsi"
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#include "holi-audio-overlay.dtsi"
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/input/linux-event-codes.h>
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#include "cypfq-fps-overlay.dtsi"
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#include "holi-pmic-overlay-pm6125.dtsi"
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#include "holi-thermal-overlay-pm6125.dtsi"
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#include "display/holi-sde-display-mtp-pm6125.dtsi"
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#include "camera/blair-camera-sensor-mot-cypfr-overlay.dtsi"
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#include "display/blair-sde-display-mtp.dtsi"
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&wcd937x_codec {
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cdc-vdd-rxtx-supply = <&L9A>;
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cdc-vddpx-supply = <&L9A>;
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qcom,cdc-static-supplies = "cdc-vdd-rxtx",
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"cdc-vddpx";
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/*
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* Overriding cdc-vdd-mic-bias-supply to dummy value
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* to avoid compilation errors as BOB is not definied
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* for pm6125
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*/
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cdc-vdd-mic-bias-supply = <>;
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};
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/* Dummy LDO reference */
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&sdhc_1 {
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status = "ok"
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pinctrl-names = "default", "sleep";
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pinctrl-0 = <&sdc1_on>;
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pinctrl-1 = <&sdc1_off>;
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vdd-supply = <&L24A>;
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qcom,vdd-voltage-level = <2960000 2960000>;
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qcom,vdd-current-level = <0 570000>;
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vdd-io-supply = <&L11A>;
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qcom,vdd-io-always-on;
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qcom,vdd-io-lpm-sup;
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qcom,vdd-io-voltage-level = <1800000 1800000>;
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qcom,vdd-io-current-level = <0 325000>;
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};
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&sdhc_2 {
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status = "ok"
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pinctrl-names = "default", "sleep";
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pinctrl-0 = <&sdc2_on>;
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pinctrl-1 = <&sdc2_off>;
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vdd-supply = <&L22A>;
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qcom,vdd-voltage-level = <2960000 2960000>;
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qcom,vdd-current-level = <0 800000>;
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vdd-io-supply = <&L5A>;
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qcom,vdd-io-voltage-level = <1800000 2960000>;
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qcom,vdd-io-current-level = <0 22000>;
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cd-gpios = <&tlmm 94 GPIO_ACTIVE_LOW>;
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};
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&ufsphy_mem {
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compatible = "qcom,ufs-phy-qmp-v3";
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vdda-phy-supply = <&L7A>;
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vdda-pll-supply = <&L4A>;
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vdda-phy-max-microamp = <62900>;
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vdda-pll-max-microamp = <18300>;
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status = "ok"
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};
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&ufshc_mem {
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vdd-hba-supply = <&gcc_ufs_phy_gdsc>;
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vdd-hba-fixed-regulator;
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vcc-supply = <&L24A>;
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vcc-voltage-level = <2950000 2960000>;
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vcc-max-microamp = <800000>;
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vccq2-supply = <&L11A>;
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vccq2-max-microamp = <800000>;
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vccq2-voltage-level = <1800000 1800000>;
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qcom,vddp-ref-clk-supply = <&L4A>;
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qcom,vddp-ref-clk-max-microamp = <100>;
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status = "ok"
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};
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&tlmm {
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cam_pmic_en_default: cam_pmic_en_default {
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mux {
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pins = "gpio38";
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function = "gpio";
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};
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config {
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pins = "gpio38";
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drive-strength = <2>;
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bias-pull-down;
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output-low;
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};
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};
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nfc {
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nfc_int_active: nfc_int_active {
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/* active state */
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@ -207,97 +115,129 @@
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};
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};
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&qupv3_se7_i2c {
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&wcd938x_codec {
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cdc-vdd-rxtx-supply = <&L9A>;
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cdc-vddio-supply = <&L9A>;
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qcom,cdc-static-supplies = "cdc-vdd-rxtx",
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"cdc-vddio";
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/*
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* Overriding cdc-vdd-mic-bias-supply to dummy value
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* to avoid compilation errors as BOB is not definied
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* for pm6125
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*/
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cdc-vdd-mic-bias-supply = <>;
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};
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&wcd937x_codec {
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cdc-vdd-rxtx-supply = <&L9A>;
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cdc-vddpx-supply = <&L9A>;
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qcom,cdc-static-supplies = "cdc-vdd-rxtx",
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"cdc-vddpx";
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/*
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* Overriding cdc-vdd-mic-bias-supply to dummy value
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* to avoid compilation errors as BOB is not definied
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* for pm6125
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*/
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cdc-vdd-mic-bias-supply = <>;
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};
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&wsa881x_i2c_e {
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cdc-vdd-1p8-supply = <&L9A>;
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};
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&wsa881x_i2c_f {
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cdc-vdd-1p8-supply = <&L9A>;
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};
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/* Dummy LDO reference */
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&sdhc_1 {
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status = "ok"
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pinctrl-names = "default", "sleep";
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pinctrl-0 = <&sdc1_on>;
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pinctrl-1 = <&sdc1_off>;
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vdd-supply = <&L24A>;
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qcom,vdd-voltage-level = <2960000 2960000>;
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qcom,vdd-current-level = <0 570000>;
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vdd-io-supply = <&L11A>;
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qcom,vdd-io-always-on;
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qcom,vdd-io-lpm-sup;
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qcom,vdd-io-voltage-level = <1800000 1800000>;
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qcom,vdd-io-current-level = <0 325000>;
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};
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&sdhc_2 {
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status = "ok"
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pinctrl-names = "default", "sleep";
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pinctrl-0 = <&sdc2_on>;
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pinctrl-1 = <&sdc2_off>;
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vdd-supply = <&L22A>;
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qcom,vdd-voltage-level = <2960000 2960000>;
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qcom,vdd-current-level = <0 800000>;
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vdd-io-supply = <&L5A>;
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qcom,vdd-io-voltage-level = <1800000 2960000>;
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qcom,vdd-io-current-level = <0 22000>;
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cd-gpios = <&tlmm 94 GPIO_ACTIVE_LOW>;
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};
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&ufsphy_mem {
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compatible = "qcom,ufs-phy-qmp-v4-yupik";
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vdda-phy-supply = <&L7A>;
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vdda-pll-supply = <&L4A>;
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vdda-phy-max-microamp = <85700>;
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vdda-pll-max-microamp = <18300>;
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status = "ok"
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};
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&ufshc_mem {
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vdd-hba-supply = <&gcc_ufs_phy_gdsc>;
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vdd-hba-fixed-regulator;
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vcc-supply = <&L24A>;
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vcc-voltage-level = <2950000 2960000>;
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vcc-max-microamp = <800000>;
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vccq2-supply = <&L11A>;
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vccq2-max-microamp = <800000>;
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vccq2-voltage-level = <1800000 1800000>;
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qcom,vddp-ref-clk-supply = <&L4A>;
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qcom,vddp-ref-clk-max-microamp = <100>;
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status = "ok"
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};
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&qupv3_se0_i2c {
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status = "ok"
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#address-cells = <1>;
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#size-cells = <0>;
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st21nfc@8 {
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compatible = "st,st21nfc";
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mmi,status = "/chosen", "mmi,nfc", "st"
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status = "ok"
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reg = <0x08>;
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st,irq_gpio = <&tlmm 9 0x00>;
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st,reset_gpio = <&tlmm 48 0x00>;
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st,clkreq_gpio = <&tlmm 7 0x00>;
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nq@28 {
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compatible = "qcom,sn-nci";
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reg = <0x28>;
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qcom,sn-irq = <&tlmm 9 0x00>;
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qcom,sn-ven = <&tlmm 6 0x00>;
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qcom,sn-firm = <&tlmm 8 0x00>;
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qcom,sn-clkreq = <&tlmm 7 0x00>;
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qcom,sn-vdd-1p8-supply = <&L9A>;
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qcom,sn-vdd-1p8-voltage = <1800000 1800000>;
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qcom,sn-vdd-1p8-current = <157000>;
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interrupt-parent = <&tlmm>;
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interrupts = <9 0>;
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interrupt-names = "nfc_irq";
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pinctrl-names = "nfc_active", "nfc_suspend";
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pinctrl-0 = <&nfc_int_active &nfc_enable_active
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&nfc_clk_req_active>;
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pinctrl-1 = <&nfc_int_suspend &nfc_enable_suspend
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&nfc_clk_req_suspend>;
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pinctrl-0 = <&nfc_int_active &nfc_enable_active>;
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pinctrl-1 = <&nfc_int_suspend &nfc_enable_suspend>;
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};
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};
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&qupv3_se10_i2c {
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status = "ok"
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cam_pmic: wl2864c@29{
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compatible = "semi,wl2864c";
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reg = <0x29>;
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semi,cs-gpios = <&tlmm 38 0>;
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pinctrl-names = "default";
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pinctrl-0 = <&cam_pmic_en_default>;
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vin1-supply = <&S6A>;
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regulators {
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cam_ldo1: ldo1 {
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regulator-name = "ldo1";
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regulator-min-microvolt = <600000>;
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regulator-max-microvolt = <1800000>;
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};
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cam_ldo2: ldo2 {
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regulator-name = "ldo2";
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regulator-min-microvolt = <600000>;
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regulator-max-microvolt = <1800000>;
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};
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cam_ldo3: ldo3 {
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regulator-name = "ldo3";
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regulator-min-microvolt = <1200000>;
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regulator-max-microvolt = <4300000>;
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};
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cam_ldo4: ldo4 {
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regulator-name = "ldo4";
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regulator-min-microvolt = <1200000>;
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regulator-max-microvolt = <4300000>;
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};
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cam_ldo5: ldo5 {
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regulator-name = "ldo5";
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regulator-min-microvolt = <1200000>;
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regulator-max-microvolt = <4300000>;
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};
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cam_ldo6: ldo6 {
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regulator-name = "ldo6";
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regulator-min-microvolt = <1200000>;
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regulator-max-microvolt = <4300000>;
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};
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cam_ldo7: ldo7 {
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regulator-name = "ldo7";
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regulator-min-microvolt = <1200000>;
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regulator-max-microvolt = <4300000>;
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};
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};
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};
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};
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&pm8008_8 {
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status = "disabled";
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};
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&pm8008_9 {
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status = "disabled";
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};
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&soc {
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gpio_keys {
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compatible = "gpio-keys";
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@ -332,6 +272,39 @@
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};
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};
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&pm7250b_vib {
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qcom,vib-ldo-volt-uv = <3000000>;
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&qupv3_se8_i2c {
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status = "okay";
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qcom,i2c-touch-active="synaptics,tcm-i2c";
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synaptics_tcm@20 {
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compatible = "synaptics,tcm-i2c";
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reg = <0x20>;
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interrupt-parent = <&tlmm>;
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interrupts = <22 0x2008>;
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pinctrl-names = "pmx_ts_active","pmx_ts_suspend",
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"pmx_ts_release";
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pinctrl-0 = <&ts_active>;
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pinctrl-1 = <&ts_int_suspend &ts_reset_suspend>;
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pinctrl-2 = <&pmx_ts_release>;
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vdd-supply = <&L9A>;
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avdd-supply = <&touch_avdd>;
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synaptics,pwr-reg-name = "avdd";
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synaptics,bus-reg-name = "vdd";
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synaptics,irq-gpio = <&tlmm 22 0x2008>;
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synaptics,irq-on-state = <0>;
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synaptics,reset-gpio = <&tlmm 21 0x00>;
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synaptics,reset-on-state = <0>;
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synaptics,reset-active-ms = <20>;
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synaptics,reset-delay-ms = <200>;
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synaptics,power-delay-ms = <200>;
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synaptics,ubl-i2c-addr = <0x20>;
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synaptics,extend_report;
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synaptics,firmware-name = "synaptics_firmware.img";
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panel = <&dsi_rm69299_visionox_amoled_video
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&dsi_rm69299_visionox_amoled_cmd>;
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};
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};
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#include "camera/blair-camera-sensor-mtp.dtsi"
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@ -13,12 +13,12 @@
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/dts-v1/;
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/plugin/;
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#include "holi-cypfr-common-overlay.dtsi"
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#include "blair-cypfr-common-overlay.dtsi"
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/ {
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model = "cypfr";
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compatible = "qcom,holi-cypfr", "qcom,holi-moto", "qcom,holi";
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compatible = "qcom,blair-cypfr", "qcom,blair-moto", "qcom,blair";
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qcom,msm-id = <454 0x10000>, <472 0x10000>;
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qcom,board-id = <0x47 0xA100>;
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qcom,board-id = <0x4B 0xA100>;
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};
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@ -13,12 +13,12 @@
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/dts-v1/;
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/plugin/;
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#include "holi-cypfr-common-overlay.dtsi"
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#include "blair-cypfr-common-overlay.dtsi"
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/ {
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model = "cypfr";
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compatible = "qcom,holi-cypfr", "qcom,holi-moto", "qcom,holi";
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compatible = "qcom,blair-cypfr", "qcom,blair-moto", "qcom,blair";
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qcom,msm-id = <454 0x10000>, <472 0x10000>;
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qcom,board-id = <0x47 0xA200>, <0x48 0xA200>;
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qcom,board-id = <0x4B 0xA200>;
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};
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