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mmc: sdhci-of-esdhc: limit SD clock for ls1012a/ls1046a
The ls1046a datasheet specified that the max SD clock frequency for eSDHC SDR104/HS200 was 167MHz, and the ls1012a datasheet specified it's 125MHz for ls1012a. So this patch is to add the limitation. Signed-off-by: Yangbo Lu <[email protected]> Acked-by: Adrian Hunter <[email protected]> Signed-off-by: Ulf Hansson <[email protected]>
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@ -457,6 +457,20 @@ static void esdhc_of_set_clock(struct sdhci_host *host, unsigned int clock)
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if (esdhc->vendor_ver < VENDOR_V_23)
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pre_div = 2;
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/*
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* Limit SD clock to 167MHz for ls1046a according to its datasheet
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*/
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if (clock > 167000000 &&
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of_find_compatible_node(NULL, NULL, "fsl,ls1046a-esdhc"))
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clock = 167000000;
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/*
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* Limit SD clock to 125MHz for ls1012a according to its datasheet
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*/
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if (clock > 125000000 &&
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of_find_compatible_node(NULL, NULL, "fsl,ls1012a-esdhc"))
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clock = 125000000;
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/* Workaround to reduce the clock frequency for p1010 esdhc */
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if (of_find_compatible_node(NULL, NULL, "fsl,p1010-esdhc")) {
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if (clock > 20000000)
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