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Merge "disp: pll: Fix cfg1 value when pclk_src_mux parent is updated"

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qctecmdr 2021-08-17 01:43:27 -07:00 • committed by Gerrit - the friendly Code Review server
commit a85df97b3a
1 changed files with 7 additions and 1 deletions
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8
msm/dsi/dsi_pll_10nm.c
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@ -1,6 +1,6 @@
// SPDX-License-Identifier: GPL-2.0-only
/*
* Copyright (c) 2016-2020, The Linux Foundation. All rights reserved.
* Copyright (c) 2016-2021, The Linux Foundation. All rights reserved.
*/
#define pr_fmt(fmt) "%s: " fmt, __func__
@ -282,6 +282,12 @@ static inline int pclk_mux_read_sel(void *context, unsigned int reg,
int rc = 0;
struct dsi_pll_resource *rsc = context;
/* Return cached cfg1 as its updated with cached cfg1 in pll_enable */
if (!rsc->handoff_resources) {
*val = (rsc->cached_cfg1) & 0x3;
return rc;
}
*val = (DSI_PLL_REG_R(rsc->phy_base, reg) & 0x3);
return rc;