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https://github.com/BobTheBlinker/android_kernel_motorola_sm6375.git
synced 2026-10-31 04:01:48 -04:00
PCI changes for the v3.12 merge window:
PCI device hotplug
- Use PCIe native hotplug, not ACPI hotplug, when possible (Neil Horman)
- Assign resources on per-host bridge basis (Yinghai Lu)
MPS (Max Payload Size)
- Allow larger MPS settings below hotplug-capable Root Port (Yijing Wang)
- Add warnings about unsafe MPS settings (Yijing Wang)
- Simplify interface and messages (Bjorn Helgaas)
SR-IOV
- Return -ENOSYS on non-SR-IOV devices (Stefan Assmann)
- Update NumVFs register when disabling SR-IOV (Yijing Wang)
Virtualization
- Add bus and slot reset support (Alex Williamson)
- Fix ACS (Access Control Services) issues (Alex Williamson)
Miscellaneous
- Simplify PCIe Capability accessors (Bjorn Helgaas)
- Add pcibios_pm_ops for arch-specific hibernate stuff (Sebastian Ott)
- Disable decoding during BAR sizing only when necessary (Zoltan Kiss)
- Delay enabling bridges until they're needed (Yinghai Lu)
- Split Designware support into Synopsys and Exynos parts (Jingoo Han)
- Convert class code to use dev_groups (Greg Kroah-Hartman)
- Cleanup Designware and Exynos I/O access wrappers (Seungwon Jeon)
- Fix bridge I/O window alignment (Bjorn Helgaas)
- Add pci_wait_for_pending_transaction() (Casey Leedom)
- Use devm_ioremap_resource() in Marvell driver (Tushar Behera)
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Merge tag 'pci-v3.12-changes' of git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci
Pull PCI changes from Bjorn Helgaas:
PCI device hotplug:
- Use PCIe native hotplug, not ACPI hotplug, when possible (Neil Horman)
- Assign resources on per-host bridge basis (Yinghai Lu)
MPS (Max Payload Size):
- Allow larger MPS settings below hotplug-capable Root Port (Yijing Wang)
- Add warnings about unsafe MPS settings (Yijing Wang)
- Simplify interface and messages (Bjorn Helgaas)
SR-IOV:
- Return -ENOSYS on non-SR-IOV devices (Stefan Assmann)
- Update NumVFs register when disabling SR-IOV (Yijing Wang)
Virtualization:
- Add bus and slot reset support (Alex Williamson)
- Fix ACS (Access Control Services) issues (Alex Williamson)
Miscellaneous:
- Simplify PCIe Capability accessors (Bjorn Helgaas)
- Add pcibios_pm_ops for arch-specific hibernate stuff (Sebastian Ott)
- Disable decoding during BAR sizing only when necessary (Zoltan Kiss)
- Delay enabling bridges until they're needed (Yinghai Lu)
- Split Designware support into Synopsys and Exynos parts (Jingoo Han)
- Convert class code to use dev_groups (Greg Kroah-Hartman)
- Cleanup Designware and Exynos I/O access wrappers (Seungwon Jeon)
- Fix bridge I/O window alignment (Bjorn Helgaas)
- Add pci_wait_for_pending_transaction() (Casey Leedom)
- Use devm_ioremap_resource() in Marvell driver (Tushar Behera)
* tag 'pci-v3.12-changes' of git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci: (63 commits)
PCI/ACPI: Fix _OSC ordering to allow PCIe hotplug use when available
PCI: exynos: Add I/O access wrappers
PCI: designware: Drop "addr" arg from dw_pcie_readl_rc()/dw_pcie_writel_rc()
PCI: Remove pcie_cap_has_devctl()
PCI: Support PCIe Capability Slot registers only for ports with slots
PCI: Remove PCIe Capability version checks
PCI: Allow PCIe Capability link-related register access for switches
PCI: Add offsets of PCIe capability registers
PCI: Tidy bitmasks and spacing of PCIe capability definitions
PCI: Remove obsolete comment reference to pci_pcie_cap2()
PCI: Clarify PCI_EXP_TYPE_PCI_BRIDGE comment
PCI: Rename PCIe capability definitions to follow convention
PCI: Warn if unsafe MPS settings detected
PCI: Fix MPS peer-to-peer DMA comment syntax
PCI: Disable decoding for BAR sizing only when it was actually enabled
PCI: Add comment about needing pci_msi_off() even when CONFIG_PCI_MSI=n
PCI: Add pcibios_pm_ops for optional arch-specific hibernate functionality
PCI: Don't restrict MPS for slots below Root Ports
PCI: Simplify MPS test for Downstream Port
PCI: Remove unnecessary check for pcie_get_mps() failure
...
This commit is contained in:
commit
a923874198
45 changed files with 1960 additions and 1232 deletions
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@ -378,6 +378,7 @@ static int acpi_pci_root_add(struct acpi_device *device,
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struct acpi_pci_root *root;
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u32 flags, base_flags;
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acpi_handle handle = device->handle;
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bool no_aspm = false, clear_aspm = false;
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root = kzalloc(sizeof(struct acpi_pci_root), GFP_KERNEL);
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if (!root)
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@ -437,27 +438,6 @@ static int acpi_pci_root_add(struct acpi_device *device,
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flags = base_flags = OSC_PCI_SEGMENT_GROUPS_SUPPORT;
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acpi_pci_osc_support(root, flags);
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/*
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* TBD: Need PCI interface for enumeration/configuration of roots.
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*/
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/*
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* Scan the Root Bridge
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* --------------------
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* Must do this prior to any attempt to bind the root device, as the
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* PCI namespace does not get created until this call is made (and
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* thus the root bridge's pci_dev does not exist).
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*/
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root->bus = pci_acpi_scan_root(root);
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if (!root->bus) {
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dev_err(&device->dev,
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"Bus %04x:%02x not present in PCI namespace\n",
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root->segment, (unsigned int)root->secondary.start);
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result = -ENODEV;
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goto end;
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}
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/* Indicate support for various _OSC capabilities. */
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if (pci_ext_cfg_avail())
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flags |= OSC_EXT_PCI_CONFIG_SUPPORT;
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if (pcie_aspm_support_enabled()) {
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@ -471,7 +451,7 @@ static int acpi_pci_root_add(struct acpi_device *device,
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if (ACPI_FAILURE(status)) {
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dev_info(&device->dev, "ACPI _OSC support "
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"notification failed, disabling PCIe ASPM\n");
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pcie_no_aspm();
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no_aspm = true;
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flags = base_flags;
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}
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}
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@ -503,7 +483,7 @@ static int acpi_pci_root_add(struct acpi_device *device,
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* We have ASPM control, but the FADT indicates
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* that it's unsupported. Clear it.
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*/
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pcie_clear_aspm(root->bus);
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clear_aspm = true;
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}
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} else {
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dev_info(&device->dev,
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@ -512,7 +492,14 @@ static int acpi_pci_root_add(struct acpi_device *device,
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acpi_format_exception(status), flags);
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dev_info(&device->dev,
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"ACPI _OSC control for PCIe not granted, disabling ASPM\n");
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pcie_no_aspm();
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/*
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* We want to disable ASPM here, but aspm_disabled
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* needs to remain in its state from boot so that we
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* properly handle PCIe 1.1 devices. So we set this
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* flag here, to defer the action until after the ACPI
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* root scan.
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*/
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no_aspm = true;
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}
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} else {
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dev_info(&device->dev,
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@ -520,16 +507,40 @@ static int acpi_pci_root_add(struct acpi_device *device,
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"(_OSC support mask: 0x%02x)\n", flags);
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}
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/*
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* TBD: Need PCI interface for enumeration/configuration of roots.
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*/
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/*
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* Scan the Root Bridge
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* --------------------
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* Must do this prior to any attempt to bind the root device, as the
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* PCI namespace does not get created until this call is made (and
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* thus the root bridge's pci_dev does not exist).
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*/
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root->bus = pci_acpi_scan_root(root);
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if (!root->bus) {
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dev_err(&device->dev,
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"Bus %04x:%02x not present in PCI namespace\n",
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root->segment, (unsigned int)root->secondary.start);
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result = -ENODEV;
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goto end;
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}
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if (clear_aspm) {
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dev_info(&device->dev, "Disabling ASPM (FADT indicates it is unsupported)\n");
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pcie_clear_aspm(root->bus);
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}
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if (no_aspm)
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pcie_no_aspm();
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pci_acpi_add_bus_pm_notifier(device, root->bus);
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if (device->wakeup.flags.run_wake)
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device_set_run_wake(root->bus->bridge, true);
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if (system_state != SYSTEM_BOOTING) {
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pcibios_resource_survey_bus(root->bus);
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pci_assign_unassigned_bus_resources(root->bus);
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/* need to after hot-added ioapic is registered */
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pci_enable_bridges(root->bus);
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pci_assign_unassigned_root_bus_resources(root->bus);
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}
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pci_bus_add_devices(root->bus);
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