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https://github.com/BobTheBlinker/android_kernel_motorola_sm6375.git
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Merge git://git.kernel.org/pub/scm/linux/kernel/git/lethal/sh-2.6
* git://git.kernel.org/pub/scm/linux/kernel/git/lethal/sh-2.6: (37 commits) SH: catch negative denormal_subf1() retval in denormal_add() sh: Fix DMAC base address for SH7709S sh: update smc91x platform data for se7206. sh: Stub in cpu_to_node() and friends for NUMA build. sh: intc register modify fix sh: no high level trigger on some sh3 cpus sh: clean up sh7710 and sh7720 intc tables sh: add interrupt ack code to sh3 sh: unify external irq pin code for sh3 sh-sci: avoid writing to nonexistent registers sh-sci: sh7722 lacks scsptr registers sh-sci: improve sh7722 support sh: reset hardware from early printk sh: drain and wait for early printk sh: use sci_out() for early printk sh: add memory resources to /proc/iomem sh: add kernel bss resource sh: fix sh7705 interrupt vector typo sh: update smc91x platform data for se7722 sh: update smc91x platform data for MigoR ...
This commit is contained in:
commit
a9545ee3c8
63 changed files with 498 additions and 1793 deletions
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@ -42,14 +42,12 @@
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#include <linux/console.h>
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#include <linux/platform_device.h>
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#include <linux/serial_sci.h>
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#ifdef CONFIG_CPU_FREQ
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#include <linux/notifier.h>
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#include <linux/cpufreq.h>
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#endif
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#if defined(CONFIG_SUPERH) && !defined(CONFIG_SUPERH64)
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#include <linux/clk.h>
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#include <linux/ctype.h>
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#ifdef CONFIG_SUPERH
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#include <asm/clock.h>
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#include <asm/sh_bios.h>
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#include <asm/kgdb.h>
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@ -80,7 +78,7 @@ struct sci_port {
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struct timer_list break_timer;
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int break_flag;
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#if defined(CONFIG_SUPERH) && !defined(CONFIG_SUPERH64)
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#ifdef CONFIG_SUPERH
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/* Port clock */
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struct clk *clk;
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#endif
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@ -365,21 +363,19 @@ static void sci_init_pins_scif(struct uart_port *port, unsigned int cflag)
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static void sci_init_pins_scif(struct uart_port *port, unsigned int cflag)
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{
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unsigned int fcr_val = 0;
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unsigned short data;
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if (cflag & CRTSCTS) {
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fcr_val |= SCFCR_MCE;
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if (port->mapbase == 0xffe00000) {
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data = ctrl_inw(PSCR);
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data &= ~0x03cf;
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if (cflag & CRTSCTS)
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fcr_val |= SCFCR_MCE;
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else
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data |= 0x0340;
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ctrl_outw(0x0000, PORT_PSCR);
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} else {
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unsigned short data;
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data = ctrl_inw(PORT_PSCR);
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data &= 0x033f;
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data |= 0x0400;
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ctrl_outw(data, PORT_PSCR);
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ctrl_outw(ctrl_inw(SCSPTR0) & 0x17, SCSPTR0);
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ctrl_outw(data, PSCR);
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}
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/* SCIF1 and SCIF2 should be setup by board code */
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sci_out(port, SCFCR, fcr_val);
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}
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@ -76,12 +76,13 @@
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# define SCSCR_INIT(port) 0x32 /* TIE=0,RIE=0,TE=1,RE=1,REIE=0,CKE=1 */
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# define SCIF_ONLY
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#elif defined(CONFIG_CPU_SUBTYPE_SH7722)
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# define SCPDR0 0xA405013E /* 16 bit SCIF0 PSDR */
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# define SCSPTR0 SCPDR0
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# define PADR 0xA4050120
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# define PSDR 0xA405013e
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# define PWDR 0xA4050166
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# define PSCR 0xA405011E
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# define SCIF_ORER 0x0001 /* overrun error bit */
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# define SCSCR_INIT(port) 0x0038 /* TIE=0,RIE=0,TE=1,RE=1,REIE=1 */
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# define SCIF_ONLY
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# define PORT_PSCR 0xA405011E
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#elif defined(CONFIG_CPU_SUBTYPE_SH7366)
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# define SCPDR0 0xA405013E /* 16 bit SCIF0 PSDR */
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# define SCSPTR0 SCPDR0
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@ -320,7 +321,7 @@
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unsigned int addr = port->mapbase + (offset); \
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if ((size) == 8) { \
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ctrl_outb(value, addr); \
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} else { \
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} else if ((size) == 16) { \
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ctrl_outw(value, addr); \
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}
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@ -451,7 +452,11 @@ SCIF_FNS(SCSPTR, 0, 0, 0x24, 16)
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SCIF_FNS(SCLSR, 0, 0, 0x28, 16)
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#else
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SCIF_FNS(SCFDR, 0x0e, 16, 0x1C, 16)
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#if defined(CONFIG_CPU_SUBTYPE_SH7722)
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SCIF_FNS(SCSPTR, 0, 0, 0, 0)
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#else
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SCIF_FNS(SCSPTR, 0, 0, 0x20, 16)
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#endif
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SCIF_FNS(SCLSR, 0, 0, 0x24, 16)
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#endif
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#endif
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@ -593,13 +598,25 @@ static inline int sci_rxd_in(struct uart_port *port)
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return ctrl_inw(SCSPTR3) & 0x0001 ? 1 : 0; /* SCIF */
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return 1;
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}
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#elif defined(CONFIG_CPU_SUBTYPE_SH7722) || defined(CONFIG_CPU_SUBTYPE_SH7366)
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#elif defined(CONFIG_CPU_SUBTYPE_SH7366)
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static inline int sci_rxd_in(struct uart_port *port)
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{
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if (port->mapbase == 0xffe00000)
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return ctrl_inb(SCPDR0) & 0x0001 ? 1 : 0; /* SCIF0 */
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return 1;
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}
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#elif defined(CONFIG_CPU_SUBTYPE_SH7722)
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static inline int sci_rxd_in(struct uart_port *port)
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{
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if (port->mapbase == 0xffe00000)
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return ctrl_inb(PSDR) & 0x02 ? 1 : 0; /* SCIF0 */
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if (port->mapbase == 0xffe10000)
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return ctrl_inb(PADR) & 0x40 ? 1 : 0; /* SCIF1 */
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if (port->mapbase == 0xffe20000)
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return ctrl_inb(PWDR) & 0x04 ? 1 : 0; /* SCIF2 */
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return 1;
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}
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#elif defined(CONFIG_CPU_SUBTYPE_SH7723)
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static inline int sci_rxd_in(struct uart_port *port)
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{
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