mirror of
https://github.com/BobTheBlinker/android_kernel_motorola_sm6375.git
synced 2026-10-28 02:32:09 -04:00
IOMMU Updates for Linux v4.10
These changes include:
* Support for the ACPI IORT table on ARM systems and patches to
make the ARM-SMMU driver make use of it
* Conversion of the Exynos IOMMU driver to device dependency
links and implementation of runtime pm support based on that
conversion
* Update the Mediatek IOMMU driver to use the new
struct device->iommu_fwspec member
* Implementation of dma_map/unmap_resource in the generic ARM
dma-iommu layer
* A number of smaller fixes and improvements all over the place
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Merge tag 'iommu-updates-v4.10' of git://git.kernel.org/pub/scm/linux/kernel/git/joro/iommu
Pull IOMMU updates from Joerg Roedel:
"These changes include:
- support for the ACPI IORT table on ARM systems and patches to make
the ARM-SMMU driver make use of it
- conversion of the Exynos IOMMU driver to device dependency links
and implementation of runtime pm support based on that conversion
- update the Mediatek IOMMU driver to use the new struct
device->iommu_fwspec member
- implementation of dma_map/unmap_resource in the generic ARM
dma-iommu layer
- a number of smaller fixes and improvements all over the place"
* tag 'iommu-updates-v4.10' of git://git.kernel.org/pub/scm/linux/kernel/git/joro/iommu: (44 commits)
ACPI/IORT: Make dma masks set-up IORT specific
iommu/amd: Missing error code in amd_iommu_init_device()
iommu/s390: Drop duplicate header pci.h
ACPI/IORT: Introduce iort_iommu_configure
ACPI/IORT: Add single mapping function
ACPI/IORT: Replace rid map type with type mask
iommu/arm-smmu: Add IORT configuration
iommu/arm-smmu: Split probe functions into DT/generic portions
iommu/arm-smmu-v3: Add IORT configuration
iommu/arm-smmu-v3: Split probe functions into DT/generic portions
ACPI/IORT: Add support for ARM SMMU platform devices creation
ACPI/IORT: Add node match function
ACPI: Implement acpi_dma_configure
iommu/arm-smmu-v3: Convert struct device of_node to fwnode usage
iommu/arm-smmu: Convert struct device of_node to fwnode usage
iommu: Make of_iommu_set/get_ops() DT agnostic
ACPI/IORT: Add support for IOMMU fwnode registration
ACPI/IORT: Introduce linker section for IORT entries probing
ACPI: Add FWNODE_ACPI_STATIC fwnode type
iommu/arm-smmu: Set SMTNMB_TLBEN in ACR to enable caching of bypass entries
...
This commit is contained in:
Linus Torvalds
commit
a9a16a6d13
29 changed files with 1238 additions and 406 deletions
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@ -19,8 +19,17 @@
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#define pr_fmt(fmt) "ACPI: IORT: " fmt
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#include <linux/acpi_iort.h>
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#include <linux/iommu.h>
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#include <linux/kernel.h>
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#include <linux/list.h>
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#include <linux/pci.h>
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#include <linux/platform_device.h>
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#include <linux/slab.h>
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#define IORT_TYPE_MASK(type) (1 << (type))
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#define IORT_MSI_TYPE (1 << ACPI_IORT_NODE_ITS_GROUP)
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#define IORT_IOMMU_TYPE ((1 << ACPI_IORT_NODE_SMMU) | \
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(1 << ACPI_IORT_NODE_SMMU_V3))
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struct iort_its_msi_chip {
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struct list_head list;
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@ -28,6 +37,90 @@ struct iort_its_msi_chip {
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u32 translation_id;
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};
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struct iort_fwnode {
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struct list_head list;
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struct acpi_iort_node *iort_node;
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struct fwnode_handle *fwnode;
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};
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static LIST_HEAD(iort_fwnode_list);
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static DEFINE_SPINLOCK(iort_fwnode_lock);
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/**
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* iort_set_fwnode() - Create iort_fwnode and use it to register
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* iommu data in the iort_fwnode_list
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*
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* @node: IORT table node associated with the IOMMU
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* @fwnode: fwnode associated with the IORT node
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*
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* Returns: 0 on success
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* <0 on failure
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*/
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static inline int iort_set_fwnode(struct acpi_iort_node *iort_node,
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struct fwnode_handle *fwnode)
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{
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struct iort_fwnode *np;
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np = kzalloc(sizeof(struct iort_fwnode), GFP_ATOMIC);
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if (WARN_ON(!np))
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return -ENOMEM;
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INIT_LIST_HEAD(&np->list);
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np->iort_node = iort_node;
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np->fwnode = fwnode;
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spin_lock(&iort_fwnode_lock);
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list_add_tail(&np->list, &iort_fwnode_list);
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spin_unlock(&iort_fwnode_lock);
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return 0;
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}
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/**
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* iort_get_fwnode() - Retrieve fwnode associated with an IORT node
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*
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* @node: IORT table node to be looked-up
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*
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* Returns: fwnode_handle pointer on success, NULL on failure
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*/
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static inline
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struct fwnode_handle *iort_get_fwnode(struct acpi_iort_node *node)
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{
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struct iort_fwnode *curr;
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struct fwnode_handle *fwnode = NULL;
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spin_lock(&iort_fwnode_lock);
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list_for_each_entry(curr, &iort_fwnode_list, list) {
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if (curr->iort_node == node) {
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fwnode = curr->fwnode;
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break;
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}
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}
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spin_unlock(&iort_fwnode_lock);
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return fwnode;
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}
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/**
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* iort_delete_fwnode() - Delete fwnode associated with an IORT node
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*
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* @node: IORT table node associated with fwnode to delete
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*/
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static inline void iort_delete_fwnode(struct acpi_iort_node *node)
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{
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struct iort_fwnode *curr, *tmp;
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spin_lock(&iort_fwnode_lock);
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list_for_each_entry_safe(curr, tmp, &iort_fwnode_list, list) {
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if (curr->iort_node == node) {
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list_del(&curr->list);
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kfree(curr);
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break;
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}
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}
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spin_unlock(&iort_fwnode_lock);
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}
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typedef acpi_status (*iort_find_node_callback)
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(struct acpi_iort_node *node, void *context);
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@ -141,6 +234,21 @@ static struct acpi_iort_node *iort_scan_node(enum acpi_iort_node_type type,
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return NULL;
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}
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static acpi_status
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iort_match_type_callback(struct acpi_iort_node *node, void *context)
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{
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return AE_OK;
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}
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bool iort_node_match(u8 type)
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{
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struct acpi_iort_node *node;
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node = iort_scan_node(type, iort_match_type_callback, NULL);
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return node != NULL;
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}
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static acpi_status iort_match_node_callback(struct acpi_iort_node *node,
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void *context)
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{
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@ -212,9 +320,48 @@ static int iort_id_map(struct acpi_iort_id_mapping *map, u8 type, u32 rid_in,
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return 0;
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}
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static
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struct acpi_iort_node *iort_node_get_id(struct acpi_iort_node *node,
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u32 *id_out, u8 type_mask,
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int index)
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{
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struct acpi_iort_node *parent;
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struct acpi_iort_id_mapping *map;
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if (!node->mapping_offset || !node->mapping_count ||
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index >= node->mapping_count)
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return NULL;
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map = ACPI_ADD_PTR(struct acpi_iort_id_mapping, node,
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node->mapping_offset);
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/* Firmware bug! */
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if (!map->output_reference) {
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pr_err(FW_BUG "[node %p type %d] ID map has NULL parent reference\n",
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node, node->type);
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return NULL;
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}
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parent = ACPI_ADD_PTR(struct acpi_iort_node, iort_table,
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map->output_reference);
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if (!(IORT_TYPE_MASK(parent->type) & type_mask))
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return NULL;
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if (map[index].flags & ACPI_IORT_ID_SINGLE_MAPPING) {
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if (node->type == ACPI_IORT_NODE_NAMED_COMPONENT ||
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node->type == ACPI_IORT_NODE_PCI_ROOT_COMPLEX) {
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*id_out = map[index].output_base;
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return parent;
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}
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}
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return NULL;
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}
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static struct acpi_iort_node *iort_node_map_rid(struct acpi_iort_node *node,
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u32 rid_in, u32 *rid_out,
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u8 type)
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u8 type_mask)
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{
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u32 rid = rid_in;
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@ -223,7 +370,7 @@ static struct acpi_iort_node *iort_node_map_rid(struct acpi_iort_node *node,
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struct acpi_iort_id_mapping *map;
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int i;
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if (node->type == type) {
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if (IORT_TYPE_MASK(node->type) & type_mask) {
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if (rid_out)
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*rid_out = rid;
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return node;
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@ -296,7 +443,7 @@ u32 iort_msi_map_rid(struct device *dev, u32 req_id)
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if (!node)
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return req_id;
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iort_node_map_rid(node, req_id, &dev_id, ACPI_IORT_NODE_ITS_GROUP);
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iort_node_map_rid(node, req_id, &dev_id, IORT_MSI_TYPE);
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return dev_id;
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}
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@ -318,7 +465,7 @@ static int iort_dev_find_its_id(struct device *dev, u32 req_id,
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if (!node)
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return -ENXIO;
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node = iort_node_map_rid(node, req_id, NULL, ACPI_IORT_NODE_ITS_GROUP);
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node = iort_node_map_rid(node, req_id, NULL, IORT_MSI_TYPE);
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if (!node)
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return -ENXIO;
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@ -356,13 +503,459 @@ struct irq_domain *iort_get_device_domain(struct device *dev, u32 req_id)
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return irq_find_matching_fwnode(handle, DOMAIN_BUS_PCI_MSI);
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}
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static int __get_pci_rid(struct pci_dev *pdev, u16 alias, void *data)
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{
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u32 *rid = data;
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*rid = alias;
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return 0;
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}
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static int arm_smmu_iort_xlate(struct device *dev, u32 streamid,
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struct fwnode_handle *fwnode,
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const struct iommu_ops *ops)
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{
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int ret = iommu_fwspec_init(dev, fwnode, ops);
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if (!ret)
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ret = iommu_fwspec_add_ids(dev, &streamid, 1);
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return ret;
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}
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static const struct iommu_ops *iort_iommu_xlate(struct device *dev,
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struct acpi_iort_node *node,
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u32 streamid)
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{
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const struct iommu_ops *ops = NULL;
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int ret = -ENODEV;
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struct fwnode_handle *iort_fwnode;
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if (node) {
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iort_fwnode = iort_get_fwnode(node);
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if (!iort_fwnode)
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return NULL;
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ops = iommu_get_instance(iort_fwnode);
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if (!ops)
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return NULL;
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ret = arm_smmu_iort_xlate(dev, streamid, iort_fwnode, ops);
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}
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return ret ? NULL : ops;
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}
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/**
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* iort_set_dma_mask - Set-up dma mask for a device.
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*
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* @dev: device to configure
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*/
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void iort_set_dma_mask(struct device *dev)
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{
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/*
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* Set default coherent_dma_mask to 32 bit. Drivers are expected to
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* setup the correct supported mask.
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*/
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if (!dev->coherent_dma_mask)
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dev->coherent_dma_mask = DMA_BIT_MASK(32);
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/*
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* Set it to coherent_dma_mask by default if the architecture
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* code has not set it.
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*/
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if (!dev->dma_mask)
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dev->dma_mask = &dev->coherent_dma_mask;
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}
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/**
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* iort_iommu_configure - Set-up IOMMU configuration for a device.
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*
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* @dev: device to configure
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*
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* Returns: iommu_ops pointer on configuration success
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* NULL on configuration failure
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*/
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const struct iommu_ops *iort_iommu_configure(struct device *dev)
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{
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struct acpi_iort_node *node, *parent;
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const struct iommu_ops *ops = NULL;
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u32 streamid = 0;
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if (dev_is_pci(dev)) {
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struct pci_bus *bus = to_pci_dev(dev)->bus;
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u32 rid;
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pci_for_each_dma_alias(to_pci_dev(dev), __get_pci_rid,
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&rid);
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node = iort_scan_node(ACPI_IORT_NODE_PCI_ROOT_COMPLEX,
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iort_match_node_callback, &bus->dev);
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if (!node)
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return NULL;
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parent = iort_node_map_rid(node, rid, &streamid,
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IORT_IOMMU_TYPE);
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ops = iort_iommu_xlate(dev, parent, streamid);
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} else {
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int i = 0;
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node = iort_scan_node(ACPI_IORT_NODE_NAMED_COMPONENT,
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iort_match_node_callback, dev);
|
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if (!node)
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return NULL;
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|
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parent = iort_node_get_id(node, &streamid,
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IORT_IOMMU_TYPE, i++);
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|
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while (parent) {
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ops = iort_iommu_xlate(dev, parent, streamid);
|
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|
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parent = iort_node_get_id(node, &streamid,
|
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IORT_IOMMU_TYPE, i++);
|
||||
}
|
||||
}
|
||||
|
||||
return ops;
|
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}
|
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|
||||
static void __init acpi_iort_register_irq(int hwirq, const char *name,
|
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int trigger,
|
||||
struct resource *res)
|
||||
{
|
||||
int irq = acpi_register_gsi(NULL, hwirq, trigger,
|
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ACPI_ACTIVE_HIGH);
|
||||
|
||||
if (irq <= 0) {
|
||||
pr_err("could not register gsi hwirq %d name [%s]\n", hwirq,
|
||||
name);
|
||||
return;
|
||||
}
|
||||
|
||||
res->start = irq;
|
||||
res->end = irq;
|
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res->flags = IORESOURCE_IRQ;
|
||||
res->name = name;
|
||||
}
|
||||
|
||||
static int __init arm_smmu_v3_count_resources(struct acpi_iort_node *node)
|
||||
{
|
||||
struct acpi_iort_smmu_v3 *smmu;
|
||||
/* Always present mem resource */
|
||||
int num_res = 1;
|
||||
|
||||
/* Retrieve SMMUv3 specific data */
|
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smmu = (struct acpi_iort_smmu_v3 *)node->node_data;
|
||||
|
||||
if (smmu->event_gsiv)
|
||||
num_res++;
|
||||
|
||||
if (smmu->pri_gsiv)
|
||||
num_res++;
|
||||
|
||||
if (smmu->gerr_gsiv)
|
||||
num_res++;
|
||||
|
||||
if (smmu->sync_gsiv)
|
||||
num_res++;
|
||||
|
||||
return num_res;
|
||||
}
|
||||
|
||||
static void __init arm_smmu_v3_init_resources(struct resource *res,
|
||||
struct acpi_iort_node *node)
|
||||
{
|
||||
struct acpi_iort_smmu_v3 *smmu;
|
||||
int num_res = 0;
|
||||
|
||||
/* Retrieve SMMUv3 specific data */
|
||||
smmu = (struct acpi_iort_smmu_v3 *)node->node_data;
|
||||
|
||||
res[num_res].start = smmu->base_address;
|
||||
res[num_res].end = smmu->base_address + SZ_128K - 1;
|
||||
res[num_res].flags = IORESOURCE_MEM;
|
||||
|
||||
num_res++;
|
||||
|
||||
if (smmu->event_gsiv)
|
||||
acpi_iort_register_irq(smmu->event_gsiv, "eventq",
|
||||
ACPI_EDGE_SENSITIVE,
|
||||
&res[num_res++]);
|
||||
|
||||
if (smmu->pri_gsiv)
|
||||
acpi_iort_register_irq(smmu->pri_gsiv, "priq",
|
||||
ACPI_EDGE_SENSITIVE,
|
||||
&res[num_res++]);
|
||||
|
||||
if (smmu->gerr_gsiv)
|
||||
acpi_iort_register_irq(smmu->gerr_gsiv, "gerror",
|
||||
ACPI_EDGE_SENSITIVE,
|
||||
&res[num_res++]);
|
||||
|
||||
if (smmu->sync_gsiv)
|
||||
acpi_iort_register_irq(smmu->sync_gsiv, "cmdq-sync",
|
||||
ACPI_EDGE_SENSITIVE,
|
||||
&res[num_res++]);
|
||||
}
|
||||
|
||||
static bool __init arm_smmu_v3_is_coherent(struct acpi_iort_node *node)
|
||||
{
|
||||
struct acpi_iort_smmu_v3 *smmu;
|
||||
|
||||
/* Retrieve SMMUv3 specific data */
|
||||
smmu = (struct acpi_iort_smmu_v3 *)node->node_data;
|
||||
|
||||
return smmu->flags & ACPI_IORT_SMMU_V3_COHACC_OVERRIDE;
|
||||
}
|
||||
|
||||
static int __init arm_smmu_count_resources(struct acpi_iort_node *node)
|
||||
{
|
||||
struct acpi_iort_smmu *smmu;
|
||||
|
||||
/* Retrieve SMMU specific data */
|
||||
smmu = (struct acpi_iort_smmu *)node->node_data;
|
||||
|
||||
/*
|
||||
* Only consider the global fault interrupt and ignore the
|
||||
* configuration access interrupt.
|
||||
*
|
||||
* MMIO address and global fault interrupt resources are always
|
||||
* present so add them to the context interrupt count as a static
|
||||
* value.
|
||||
*/
|
||||
return smmu->context_interrupt_count + 2;
|
||||
}
|
||||
|
||||
static void __init arm_smmu_init_resources(struct resource *res,
|
||||
struct acpi_iort_node *node)
|
||||
{
|
||||
struct acpi_iort_smmu *smmu;
|
||||
int i, hw_irq, trigger, num_res = 0;
|
||||
u64 *ctx_irq, *glb_irq;
|
||||
|
||||
/* Retrieve SMMU specific data */
|
||||
smmu = (struct acpi_iort_smmu *)node->node_data;
|
||||
|
||||
res[num_res].start = smmu->base_address;
|
||||
res[num_res].end = smmu->base_address + smmu->span - 1;
|
||||
res[num_res].flags = IORESOURCE_MEM;
|
||||
num_res++;
|
||||
|
||||
glb_irq = ACPI_ADD_PTR(u64, node, smmu->global_interrupt_offset);
|
||||
/* Global IRQs */
|
||||
hw_irq = IORT_IRQ_MASK(glb_irq[0]);
|
||||
trigger = IORT_IRQ_TRIGGER_MASK(glb_irq[0]);
|
||||
|
||||
acpi_iort_register_irq(hw_irq, "arm-smmu-global", trigger,
|
||||
&res[num_res++]);
|
||||
|
||||
/* Context IRQs */
|
||||
ctx_irq = ACPI_ADD_PTR(u64, node, smmu->context_interrupt_offset);
|
||||
for (i = 0; i < smmu->context_interrupt_count; i++) {
|
||||
hw_irq = IORT_IRQ_MASK(ctx_irq[i]);
|
||||
trigger = IORT_IRQ_TRIGGER_MASK(ctx_irq[i]);
|
||||
|
||||
acpi_iort_register_irq(hw_irq, "arm-smmu-context", trigger,
|
||||
&res[num_res++]);
|
||||
}
|
||||
}
|
||||
|
||||
static bool __init arm_smmu_is_coherent(struct acpi_iort_node *node)
|
||||
{
|
||||
struct acpi_iort_smmu *smmu;
|
||||
|
||||
/* Retrieve SMMU specific data */
|
||||
smmu = (struct acpi_iort_smmu *)node->node_data;
|
||||
|
||||
return smmu->flags & ACPI_IORT_SMMU_COHERENT_WALK;
|
||||
}
|
||||
|
||||
struct iort_iommu_config {
|
||||
const char *name;
|
||||
int (*iommu_init)(struct acpi_iort_node *node);
|
||||
bool (*iommu_is_coherent)(struct acpi_iort_node *node);
|
||||
int (*iommu_count_resources)(struct acpi_iort_node *node);
|
||||
void (*iommu_init_resources)(struct resource *res,
|
||||
struct acpi_iort_node *node);
|
||||
};
|
||||
|
||||
static const struct iort_iommu_config iort_arm_smmu_v3_cfg __initconst = {
|
||||
.name = "arm-smmu-v3",
|
||||
.iommu_is_coherent = arm_smmu_v3_is_coherent,
|
||||
.iommu_count_resources = arm_smmu_v3_count_resources,
|
||||
.iommu_init_resources = arm_smmu_v3_init_resources
|
||||
};
|
||||
|
||||
static const struct iort_iommu_config iort_arm_smmu_cfg __initconst = {
|
||||
.name = "arm-smmu",
|
||||
.iommu_is_coherent = arm_smmu_is_coherent,
|
||||
.iommu_count_resources = arm_smmu_count_resources,
|
||||
.iommu_init_resources = arm_smmu_init_resources
|
||||
};
|
||||
|
||||
static __init
|
||||
const struct iort_iommu_config *iort_get_iommu_cfg(struct acpi_iort_node *node)
|
||||
{
|
||||
switch (node->type) {
|
||||
case ACPI_IORT_NODE_SMMU_V3:
|
||||
return &iort_arm_smmu_v3_cfg;
|
||||
case ACPI_IORT_NODE_SMMU:
|
||||
return &iort_arm_smmu_cfg;
|
||||
default:
|
||||
return NULL;
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* iort_add_smmu_platform_device() - Allocate a platform device for SMMU
|
||||
* @node: Pointer to SMMU ACPI IORT node
|
||||
*
|
||||
* Returns: 0 on success, <0 failure
|
||||
*/
|
||||
static int __init iort_add_smmu_platform_device(struct acpi_iort_node *node)
|
||||
{
|
||||
struct fwnode_handle *fwnode;
|
||||
struct platform_device *pdev;
|
||||
struct resource *r;
|
||||
enum dev_dma_attr attr;
|
||||
int ret, count;
|
||||
const struct iort_iommu_config *ops = iort_get_iommu_cfg(node);
|
||||
|
||||
if (!ops)
|
||||
return -ENODEV;
|
||||
|
||||
pdev = platform_device_alloc(ops->name, PLATFORM_DEVID_AUTO);
|
||||
if (!pdev)
|
||||
return PTR_ERR(pdev);
|
||||
|
||||
count = ops->iommu_count_resources(node);
|
||||
|
||||
r = kcalloc(count, sizeof(*r), GFP_KERNEL);
|
||||
if (!r) {
|
||||
ret = -ENOMEM;
|
||||
goto dev_put;
|
||||
}
|
||||
|
||||
ops->iommu_init_resources(r, node);
|
||||
|
||||
ret = platform_device_add_resources(pdev, r, count);
|
||||
/*
|
||||
* Resources are duplicated in platform_device_add_resources,
|
||||
* free their allocated memory
|
||||
*/
|
||||
kfree(r);
|
||||
|
||||
if (ret)
|
||||
goto dev_put;
|
||||
|
||||
/*
|
||||
* Add a copy of IORT node pointer to platform_data to
|
||||
* be used to retrieve IORT data information.
|
||||
*/
|
||||
ret = platform_device_add_data(pdev, &node, sizeof(node));
|
||||
if (ret)
|
||||
goto dev_put;
|
||||
|
||||
/*
|
||||
* We expect the dma masks to be equivalent for
|
||||
* all SMMUs set-ups
|
||||
*/
|
||||
pdev->dev.dma_mask = &pdev->dev.coherent_dma_mask;
|
||||
|
||||
fwnode = iort_get_fwnode(node);
|
||||
|
||||
if (!fwnode) {
|
||||
ret = -ENODEV;
|
||||
goto dev_put;
|
||||
}
|
||||
|
||||
pdev->dev.fwnode = fwnode;
|
||||
|
||||
attr = ops->iommu_is_coherent(node) ?
|
||||
DEV_DMA_COHERENT : DEV_DMA_NON_COHERENT;
|
||||
|
||||
/* Configure DMA for the page table walker */
|
||||
acpi_dma_configure(&pdev->dev, attr);
|
||||
|
||||
ret = platform_device_add(pdev);
|
||||
if (ret)
|
||||
goto dma_deconfigure;
|
||||
|
||||
return 0;
|
||||
|
||||
dma_deconfigure:
|
||||
acpi_dma_deconfigure(&pdev->dev);
|
||||
dev_put:
|
||||
platform_device_put(pdev);
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
static void __init iort_init_platform_devices(void)
|
||||
{
|
||||
struct acpi_iort_node *iort_node, *iort_end;
|
||||
struct acpi_table_iort *iort;
|
||||
struct fwnode_handle *fwnode;
|
||||
int i, ret;
|
||||
|
||||
/*
|
||||
* iort_table and iort both point to the start of IORT table, but
|
||||
* have different struct types
|
||||
*/
|
||||
iort = (struct acpi_table_iort *)iort_table;
|
||||
|
||||
/* Get the first IORT node */
|
||||
iort_node = ACPI_ADD_PTR(struct acpi_iort_node, iort,
|
||||
iort->node_offset);
|
||||
iort_end = ACPI_ADD_PTR(struct acpi_iort_node, iort,
|
||||
iort_table->length);
|
||||
|
||||
for (i = 0; i < iort->node_count; i++) {
|
||||
if (iort_node >= iort_end) {
|
||||
pr_err("iort node pointer overflows, bad table\n");
|
||||
return;
|
||||
}
|
||||
|
||||
if ((iort_node->type == ACPI_IORT_NODE_SMMU) ||
|
||||
(iort_node->type == ACPI_IORT_NODE_SMMU_V3)) {
|
||||
|
||||
fwnode = acpi_alloc_fwnode_static();
|
||||
if (!fwnode)
|
||||
return;
|
||||
|
||||
iort_set_fwnode(iort_node, fwnode);
|
||||
|
||||
ret = iort_add_smmu_platform_device(iort_node);
|
||||
if (ret) {
|
||||
iort_delete_fwnode(iort_node);
|
||||
acpi_free_fwnode_static(fwnode);
|
||||
return;
|
||||
}
|
||||
}
|
||||
|
||||
iort_node = ACPI_ADD_PTR(struct acpi_iort_node, iort_node,
|
||||
iort_node->length);
|
||||
}
|
||||
}
|
||||
|
||||
void __init acpi_iort_init(void)
|
||||
{
|
||||
acpi_status status;
|
||||
|
||||
status = acpi_get_table(ACPI_SIG_IORT, 0, &iort_table);
|
||||
if (ACPI_FAILURE(status) && status != AE_NOT_FOUND) {
|
||||
const char *msg = acpi_format_exception(status);
|
||||
pr_err("Failed to get table, %s\n", msg);
|
||||
if (ACPI_FAILURE(status)) {
|
||||
if (status != AE_NOT_FOUND) {
|
||||
const char *msg = acpi_format_exception(status);
|
||||
|
||||
pr_err("Failed to get table, %s\n", msg);
|
||||
}
|
||||
|
||||
return;
|
||||
}
|
||||
|
||||
iort_init_platform_devices();
|
||||
|
||||
acpi_probe_device_table(iort);
|
||||
}
|
||||
|
|
|
|||
|
|
@ -227,8 +227,7 @@ int acpi_bind_one(struct device *dev, struct acpi_device *acpi_dev)
|
|||
|
||||
attr = acpi_get_dma_attr(acpi_dev);
|
||||
if (attr != DEV_DMA_NOT_SUPPORTED)
|
||||
arch_setup_dma_ops(dev, 0, 0, NULL,
|
||||
attr == DEV_DMA_COHERENT);
|
||||
acpi_dma_configure(dev, attr);
|
||||
|
||||
acpi_physnode_link_name(physical_node_name, node_id);
|
||||
retval = sysfs_create_link(&acpi_dev->dev.kobj, &dev->kobj,
|
||||
|
|
@ -251,6 +250,7 @@ int acpi_bind_one(struct device *dev, struct acpi_device *acpi_dev)
|
|||
return 0;
|
||||
|
||||
err:
|
||||
acpi_dma_deconfigure(dev);
|
||||
ACPI_COMPANION_SET(dev, NULL);
|
||||
put_device(dev);
|
||||
put_device(&acpi_dev->dev);
|
||||
|
|
|
|||
|
|
@ -7,6 +7,7 @@
|
|||
#include <linux/slab.h>
|
||||
#include <linux/kernel.h>
|
||||
#include <linux/acpi.h>
|
||||
#include <linux/acpi_iort.h>
|
||||
#include <linux/signal.h>
|
||||
#include <linux/kthread.h>
|
||||
#include <linux/dmi.h>
|
||||
|
|
@ -1370,6 +1371,38 @@ enum dev_dma_attr acpi_get_dma_attr(struct acpi_device *adev)
|
|||
return DEV_DMA_NON_COHERENT;
|
||||
}
|
||||
|
||||
/**
|
||||
* acpi_dma_configure - Set-up DMA configuration for the device.
|
||||
* @dev: The pointer to the device
|
||||
* @attr: device dma attributes
|
||||
*/
|
||||
void acpi_dma_configure(struct device *dev, enum dev_dma_attr attr)
|
||||
{
|
||||
const struct iommu_ops *iommu;
|
||||
|
||||
iort_set_dma_mask(dev);
|
||||
|
||||
iommu = iort_iommu_configure(dev);
|
||||
|
||||
/*
|
||||
* Assume dma valid range starts at 0 and covers the whole
|
||||
* coherent_dma_mask.
|
||||
*/
|
||||
arch_setup_dma_ops(dev, 0, dev->coherent_dma_mask + 1, iommu,
|
||||
attr == DEV_DMA_COHERENT);
|
||||
}
|
||||
EXPORT_SYMBOL_GPL(acpi_dma_configure);
|
||||
|
||||
/**
|
||||
* acpi_dma_deconfigure - Tear-down DMA configuration for the device.
|
||||
* @dev: The pointer to the device
|
||||
*/
|
||||
void acpi_dma_deconfigure(struct device *dev)
|
||||
{
|
||||
arch_teardown_dma_ops(dev);
|
||||
}
|
||||
EXPORT_SYMBOL_GPL(acpi_dma_deconfigure);
|
||||
|
||||
static void acpi_init_coherency(struct acpi_device *adev)
|
||||
{
|
||||
unsigned long long cca = 0;
|
||||
|
|
|
|||
Loading…
Reference in a new issue