From a9cae6eab7bbba0e8503779f9617402d61cbfb9f Mon Sep 17 00:00:00 2001 From: Jindong Yue Date: Fri, 18 Dec 2020 15:46:42 +0800 Subject: [PATCH] ANDROID: PCI: dwc: Export symbols for ep driver Several symbols in DesignWare PCI Core driver are used to support PCIe controller work at Endpoint Mode. Export them to support such driver built as module. Bug: 159736148 Signed-off-by: Jindong Yue Change-Id: I2c77bfbfbec750ecdf21f0cd1bbb20fe339a2f0c --- drivers/pci/controller/dwc/pcie-designware-ep.c | 4 ++++ drivers/pci/controller/dwc/pcie-designware.c | 1 + 2 files changed, 5 insertions(+) diff --git a/drivers/pci/controller/dwc/pcie-designware-ep.c b/drivers/pci/controller/dwc/pcie-designware-ep.c index d6d9667c947a..ce3e5ac09f9f 100644 --- a/drivers/pci/controller/dwc/pcie-designware-ep.c +++ b/drivers/pci/controller/dwc/pcie-designware-ep.c @@ -40,6 +40,7 @@ void dw_pcie_ep_reset_bar(struct dw_pcie *pci, enum pci_barno bar) { __dw_pcie_ep_reset_bar(pci, bar, 0); } +EXPORT_SYMBOL_GPL(dw_pcie_ep_reset_bar); static int dw_pcie_ep_write_header(struct pci_epc *epc, u8 func_no, struct pci_epf_header *hdr) @@ -359,6 +360,7 @@ int dw_pcie_ep_raise_legacy_irq(struct dw_pcie_ep *ep, u8 func_no) return -EINVAL; } +EXPORT_SYMBOL_GPL(dw_pcie_ep_raise_legacy_irq); int dw_pcie_ep_raise_msi_irq(struct dw_pcie_ep *ep, u8 func_no, u8 interrupt_num) @@ -405,6 +407,7 @@ int dw_pcie_ep_raise_msi_irq(struct dw_pcie_ep *ep, u8 func_no, return 0; } +EXPORT_SYMBOL_GPL(dw_pcie_ep_raise_msi_irq); int dw_pcie_ep_raise_msix_irq(struct dw_pcie_ep *ep, u8 func_no, u16 interrupt_num) @@ -464,6 +467,7 @@ int dw_pcie_ep_raise_msix_irq(struct dw_pcie_ep *ep, u8 func_no, return 0; } +EXPORT_SYMBOL_GPL(dw_pcie_ep_raise_msix_irq); void dw_pcie_ep_exit(struct dw_pcie_ep *ep) { diff --git a/drivers/pci/controller/dwc/pcie-designware.c b/drivers/pci/controller/dwc/pcie-designware.c index 820488dfeaed..49de811bd6f3 100644 --- a/drivers/pci/controller/dwc/pcie-designware.c +++ b/drivers/pci/controller/dwc/pcie-designware.c @@ -473,6 +473,7 @@ int dw_pcie_link_up(struct dw_pcie *pci) return ((val & PCIE_PORT_DEBUG1_LINK_UP) && (!(val & PCIE_PORT_DEBUG1_LINK_IN_TRAINING))); } +EXPORT_SYMBOL_GPL(dw_pcie_link_up); static u8 dw_pcie_iatu_unroll_enabled(struct dw_pcie *pci) {