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irqchip: dw-apb-ictl: Enable IRQ_GC_MASK_CACHE_PER_TYPE
The irq_chip_type instances have separate mask registers, so we need to enable IRQ_GC_MASK_CACHE_PER_TYPE to actually handle separate mask registers. Signed-off-by: Jisheng Zhang <[email protected]> Acked-by: Sebastian Hesselbarth <[email protected]> Link: https://lkml.kernel.org/r/[email protected] Signed-off-by: Jason Cooper <[email protected]>
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@ -115,6 +115,7 @@ static int __init dw_apb_ictl_init(struct device_node *np,
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ret = irq_alloc_domain_generic_chips(domain, 32, (nrirqs > 32) ? 2 : 1,
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np->name, handle_level_irq, clr, 0,
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IRQ_GC_MASK_CACHE_PER_TYPE |
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IRQ_GC_INIT_MASK_CACHE);
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if (ret) {
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pr_err("%s: unable to alloc irq domain gc\n", np->full_name);
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