A-Team_Digital_Solutions/android_kernel_motorola_sm6375
Watch
2
0
Fork
You've already forked android_kernel_motorola_sm6375
 0
mirror of https://github.com/BobTheBlinker/android_kernel_motorola_sm6375.git synced 2026-10-10 06:09:23 -04:00
Code Issues Projects Releases Packages Wiki Activity

disp: msm: sde: Add flush support for DSPP SB

Browse source 
Extend unified flush bit support to control new DSPP
SB LUTDMA bit.

Change-Id: Iba941a4bcd140ceb88e49ab83700c4baef804e0f
Signed-off-by: Ping Li <pingli@codeaurora.org>
Signed-off-by: Christopher Braga <cbraga@codeaurora.org>
This commit is contained in:
Christopher Braga 2020-01-14 13:46:20 -05:00
commit aa818a2f5b
2 changed files with 11 additions and 3 deletions
Download patch file Download diff file Expand all files Collapse all files

12
msm/sde/sde_color_processing.c
View file

@ -159,6 +159,7 @@ enum sde_cp_crtc_features {
SDE_CP_CRTC_DSPP_LTM_QUEUE_BUF2,
SDE_CP_CRTC_DSPP_LTM_QUEUE_BUF3,
SDE_CP_CRTC_DSPP_LTM_VLUT,
SDE_CP_CRTC_DSPP_SB,
SDE_CP_CRTC_DSPP_MAX,
/* DSPP features end */
@ -1370,13 +1371,14 @@ static const int dspp_feature_to_sub_blk_tbl[SDE_CP_CRTC_MAX_FEATURES] = {
[SDE_CP_CRTC_DSPP_LTM_QUEUE_BUF2] = SDE_DSPP_LTM,
[SDE_CP_CRTC_DSPP_LTM_QUEUE_BUF3] = SDE_DSPP_LTM,
[SDE_CP_CRTC_DSPP_LTM_VLUT] = SDE_DSPP_LTM,
[SDE_CP_CRTC_DSPP_SB] = SDE_DSPP_SB,
[SDE_CP_CRTC_DSPP_MAX] = SDE_DSPP_MAX,
[SDE_CP_CRTC_LM_GC] = SDE_DSPP_MAX,
};
void sde_cp_dspp_flush_helper(struct sde_crtc *sde_crtc, u32 feature)
{
u32 i, sub_blk, num_mixers;
u32 i, sub_blk, num_mixers, dspp_sb;
enum sde_dspp dspp;
struct sde_hw_ctl *ctl;
@ -1388,13 +1390,19 @@ void sde_cp_dspp_flush_helper(struct sde_crtc *sde_crtc, u32 feature)
num_mixers = sde_crtc->num_mixers;
sub_blk = dspp_feature_to_sub_blk_tbl[feature];
dspp_sb = dspp_feature_to_sub_blk_tbl[SDE_CP_CRTC_DSPP_SB];
for (i = 0; i < num_mixers; i++) {
ctl = sde_crtc->mixers[i].hw_ctl;
dspp = sde_crtc->mixers[i].hw_dspp->idx;
if (ctl && ctl->ops.update_bitmask_dspp_subblk)
if (ctl && ctl->ops.update_bitmask_dspp_subblk) {
ctl->ops.update_bitmask_dspp_subblk(
ctl, dspp, sub_blk, true);
if (feature == SDE_CP_CRTC_DSPP_IGC ||
feature == SDE_CP_CRTC_DSPP_GAMUT)
ctl->ops.update_bitmask_dspp_subblk(
ctl, dspp, dspp_sb, true);
}
}
}

2
msm/sde/sde_hw_catalog.h
View file

@ -319,7 +319,7 @@ enum {
* @SDE_DSPP_HSIC Global HSIC block
* @SDE_DSPP_MEMCOLOR Memory Color block
* @SDE_DSPP_SIXZONE Six zone block
* @SDE_DSPP_GAMUT Gamut bloc
* @SDE_DSPP_GAMUT Gamut block
* @SDE_DSPP_DITHER Dither block
* @SDE_DSPP_HIST Histogram block
* @SDE_DSPP_VLUT PA VLUT block