From fc3be600f7b08a7125ed298b884c1407d752a42c Mon Sep 17 00:00:00 2001 From: Sai Srujana Oruganti Date: Thu, 21 Apr 2022 17:46:06 +0530 Subject: [PATCH 1/8] disp: msm: add skip panel power off dt property This property skips the panel power off for panels with in-cell design. Change-Id: I61ff7b8696940b74a58c79eef5b9cd43fd551c01 Signed-off-by: Sai Srujana Oruganti --- msm/dsi/dsi_panel.c | 5 ++++- msm/dsi/dsi_panel.h | 1 + 2 files changed, 5 insertions(+), 1 deletion(-) diff --git a/msm/dsi/dsi_panel.c b/msm/dsi/dsi_panel.c index cdfeb88e6873..b98447056ce3 100644 --- a/msm/dsi/dsi_panel.c +++ b/msm/dsi/dsi_panel.c @@ -379,7 +379,7 @@ static int dsi_panel_power_off(struct dsi_panel *panel) { int rc = 0; - if (panel->is_twm_en) { + if (panel->is_twm_en || panel->skip_panel_off) { DSI_DEBUG("TWM Enabled, skip panel power off\n"); return rc; } @@ -2085,6 +2085,9 @@ static int dsi_panel_parse_misc_features(struct dsi_panel *panel) panel->reset_gpio_always_on = utils->read_bool(utils->data, "qcom,platform-reset-gpio-always-on"); + panel->skip_panel_off = utils->read_bool(utils->data, + "qcom,skip-panel-power-off"); + panel->spr_info.enable = false; panel->spr_info.pack_type = MSM_DISPLAY_SPR_TYPE_MAX; diff --git a/msm/dsi/dsi_panel.h b/msm/dsi/dsi_panel.h index f3902274930b..3fc6baf9fd13 100644 --- a/msm/dsi/dsi_panel.h +++ b/msm/dsi/dsi_panel.h @@ -245,6 +245,7 @@ struct dsi_panel { atomic_t esd_recovery_pending; bool is_twm_en; + bool skip_panel_off; bool panel_initialized; bool te_using_watchdog_timer; struct dsi_qsync_capabilities qsync_caps; From 09ec818831de14ab5d5a72c73a3cee79625d2dea Mon Sep 17 00:00:00 2001 From: Jayaprakash Madisetty Date: Mon, 2 May 2022 22:14:55 +0530 Subject: [PATCH 2/8] disp: msm: avoid minidump region addition for mdss register dumps This change enables minidump for register dumps, debug bus collection based on CONFIG_QCOM_VA_MINIDUMP config. The minidump driver in 5.4 kernel needs physical contiguous memory allocation as a requirement. The minidump collection failure is seen with commit fdf36d71241f ("disp: msm: use vzalloc for large allocations") and it uses vzalloc to address memory allocation failure with order 5. This patch will disable minidump collection for regdumps, debug bus to address minidump collection failure. Change-Id: If5ff91ff95279ee2997765599dbeab16ac2dae60 Signed-off-by: Jayaprakash Madisetty --- msm/sde_dbg.c | 6 ++++++ msm/sde_dbg_evtlog.c | 8 ++++---- 2 files changed, 10 insertions(+), 4 deletions(-) diff --git a/msm/sde_dbg.c b/msm/sde_dbg.c index 4d6a5e22d813..ffa3ae346e18 100644 --- a/msm/sde_dbg.c +++ b/msm/sde_dbg.c @@ -999,8 +999,10 @@ static void _sde_dbg_dump_sde_dbg_bus(struct sde_dbg_sde_debug_bus *bus) bus->cmn.content_size = list_size / sizeof(u32); } +#ifdef CONFIG_QCOM_VA_MINIDUMP if (sde_mini_dump_add_region(bus->cmn.name, list_size, *dump_mem) < 0) pr_err("minidump add %s failed\n", bus->cmn.name); +#endif dump_addr = *dump_mem; SDE_DBG_LOG_DUMP_ADDR(bus->cmn.name, dump_addr, list_size, 0); @@ -1047,8 +1049,10 @@ static void _sde_dbg_dump_dsi_dbg_bus(struct sde_dbg_sde_debug_bus *bus) bus->cmn.content_size = list_size / sizeof(u32); } +#ifdef CONFIG_QCOM_VA_MINIDUMP if (sde_mini_dump_add_region(bus->cmn.name, list_size, *dump_mem) < 0) pr_err("minidump add %s failed\n", bus->cmn.name); +#endif dump_addr = *dump_mem; @@ -1098,10 +1102,12 @@ static void _sde_dump_array(struct sde_dbg_reg_base *blk_arr[], pr_err("Failed to allocate memory for reg_dump_addr size:%d\n", reg_dump_size); +#ifdef CONFIG_QCOM_VA_MINIDUMP if (dbg_base->reg_dump_addr && sde_mini_dump_add_region("reg_dump", reg_dump_size, dbg_base->reg_dump_addr) < 0) pr_err("minidump add regdump failed\n"); +#endif if (dump_all) sde_evtlog_dump_all(sde_dbg_base.evtlog); diff --git a/msm/sde_dbg_evtlog.c b/msm/sde_dbg_evtlog.c index 59c8440e413d..f62aaf4ad151 100644 --- a/msm/sde_dbg_evtlog.c +++ b/msm/sde_dbg_evtlog.c @@ -220,7 +220,7 @@ struct sde_dbg_evtlog *sde_evtlog_init(void) { struct sde_dbg_evtlog *evtlog; - evtlog = vzalloc(sizeof(*evtlog)); + evtlog = kzalloc(sizeof(*evtlog), GFP_KERNEL); if (!evtlog) return ERR_PTR(-ENOMEM); @@ -240,7 +240,7 @@ struct sde_dbg_reglog *sde_reglog_init(void) { struct sde_dbg_reglog *reglog; - reglog = vzalloc(sizeof(*reglog)); + reglog = kzalloc(sizeof(*reglog), GFP_KERNEL); if (!reglog) return ERR_PTR(-ENOMEM); @@ -351,7 +351,7 @@ void sde_evtlog_destroy(struct sde_dbg_evtlog *evtlog) list_del(&filter_node->list); kfree(filter_node); } - vfree(evtlog); + kfree(evtlog); } void sde_reglog_destroy(struct sde_dbg_reglog *reglog) @@ -359,5 +359,5 @@ void sde_reglog_destroy(struct sde_dbg_reglog *reglog) if (!reglog) return; - vfree(reglog); + kfree(reglog); } From 5e4c130f36834415e5775c1e4b53147c6cd07a99 Mon Sep 17 00:00:00 2001 From: Yashwanth Date: Mon, 16 May 2022 11:52:13 +0530 Subject: [PATCH 3/8] disp: msm: sde: update uidle ctl register only for master encoder In case of dual dsi usecase, since both the encoders use the same CTL path, this change ensures that uidle ctl settings are updated only by the master encoder. Change-Id: I7bd75ae0195d34f0c1810403fa5e390fbaa64ed0 Signed-off-by: Yashwanth --- msm/sde/sde_encoder.c | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/msm/sde/sde_encoder.c b/msm/sde/sde_encoder.c index d27b125bf01f..3eeb518c1a63 100644 --- a/msm/sde/sde_encoder.c +++ b/msm/sde/sde_encoder.c @@ -141,7 +141,10 @@ void sde_encoder_uidle_enable(struct drm_encoder *drm_enc, bool enable) for (i = 0; i < sde_enc->num_phys_encs; i++) { struct sde_encoder_phys *phys = sde_enc->phys_encs[i]; - if (phys && phys->hw_ctl && phys->hw_ctl->ops.uidle_enable) { + if (phys && phys->hw_ctl && phys->hw_ctl->ops.uidle_enable && + phys->split_role != ENC_ROLE_SLAVE) { + if (enable) + SDE_EVT32(DRMID(drm_enc), enable); phys->hw_ctl->ops.uidle_enable(phys->hw_ctl, enable); } } From 6a0f0b0f1fc404bcf769078991f65ab26ce85f76 Mon Sep 17 00:00:00 2001 From: Sai Srujana Oruganti Date: Thu, 28 Apr 2022 00:40:30 +0530 Subject: [PATCH 4/8] disp: msm: sde: disable dsi ctrl regulator during deepsleep Disable DSI ctrl regulator while entering deepsleep and restore during resume. Refactor deepsleep related code to helper function. Change-Id: If6da0471db59fbdfa9d9855ee1464fcab90cae15 Signed-off-by: Venkata Prahlad Valluru Signed-off-by: Sai Srujana Oruganti --- msm/dsi/dsi_display.c | 60 +++++++++++++++++++++++++++++++++++++++++++ msm/dsi/dsi_display.h | 18 +++++++++++++ msm/sde/sde_kms.c | 54 +++++++++++++++++++++++--------------- 3 files changed, 111 insertions(+), 21 deletions(-) diff --git a/msm/dsi/dsi_display.c b/msm/dsi/dsi_display.c index 255ce9e0cca5..3e10738546bc 100644 --- a/msm/dsi/dsi_display.c +++ b/msm/dsi/dsi_display.c @@ -2455,6 +2455,63 @@ void dsi_display_enable_event(struct drm_connector *connector, } } +int dsi_display_ctrl_vreg_on(struct dsi_display *display) +{ + int rc = 0; + int i; + struct dsi_display_ctrl *ctrl; + struct dsi_ctrl *dsi_ctrl; + + display_for_each_ctrl(i, display) { + ctrl = &display->ctrl[i]; + if (!ctrl->ctrl) + continue; + + dsi_ctrl = ctrl->ctrl; + if (dsi_ctrl->current_state.host_initialized) { + rc = dsi_pwr_enable_regulator( + &dsi_ctrl->pwr_info.host_pwr, true); + if (rc) { + DSI_ERR("[%s] Failed to enable vreg, rc=%d\n", + dsi_ctrl->name, rc); + goto error; + } + DSI_DEBUG("[%s] Enable ctrl vreg\n", dsi_ctrl->name); + } + } +error: + return rc; +} + +int dsi_display_ctrl_vreg_off(struct dsi_display *display) +{ + int rc = 0; + int i; + struct dsi_display_ctrl *ctrl; + struct dsi_ctrl *dsi_ctrl; + + display_for_each_ctrl(i, display) { + ctrl = &display->ctrl[i]; + if (!ctrl->ctrl) + continue; + + dsi_ctrl = ctrl->ctrl; + if (dsi_ctrl->current_state.host_initialized) { + rc = dsi_pwr_enable_regulator( + &dsi_ctrl->pwr_info.host_pwr, false); + if (rc) { + DSI_ERR("[%s] Failed to disable vreg, rc=%d\n", + dsi_ctrl->name, rc); + goto error; + } + DSI_DEBUG("[%s] Disable ctrl vreg\n", dsi_ctrl->name); + } + } +error: + return rc; +} + + static int dsi_display_ctrl_power_on(struct dsi_display *display) { int rc = 0; @@ -4204,6 +4261,9 @@ static int dsi_display_parse_dt(struct dsi_display *display) display->needs_clk_src_reset = of_property_read_bool(of_node, "qcom,needs-clk-src-reset"); + display->needs_ctrl_vreg_disable = of_property_read_bool(of_node, + "qcom,needs-ctrl-vreg-disable"); + /* Parse all external bridges from port 0 */ display_for_each_ctrl(i, display) { display->ext_bridge[i].node_of = diff --git a/msm/dsi/dsi_display.h b/msm/dsi/dsi_display.h index cac84cd6a8a8..8724178e0541 100644 --- a/msm/dsi/dsi_display.h +++ b/msm/dsi/dsi_display.h @@ -215,6 +215,7 @@ struct dsi_display { bool is_te_irq_enabled; struct completion esd_te_gate; bool needs_clk_src_reset; + bool needs_ctrl_vreg_disable; u32 ctrl_count; struct dsi_display_ctrl ctrl[MAX_DSI_CTRLS_PER_DISPLAY]; @@ -817,4 +818,21 @@ int dsi_display_unset_clk_src(struct dsi_display *display); * Return: Zero on Success */ int dsi_display_set_clk_src(struct dsi_display *display); + +/** + * dsi_display_ctrl_vreg_on() - enable dsi ctrl regulator + * @display: Handle to display + * + * Return: Zero on Success + */ +int dsi_display_ctrl_vreg_on(struct dsi_display *display); + +/** + * dsi_display_ctrl_vreg_off() - disable dsi ctrl regulator + * @display: Handle to display + * + * Return: Zero on Success + */ +int dsi_display_ctrl_vreg_off(struct dsi_display *display); + #endif /* _DSI_DISPLAY_H_ */ diff --git a/msm/sde/sde_kms.c b/msm/sde/sde_kms.c index 9a11a6654f8f..e626561eba0d 100644 --- a/msm/sde/sde_kms.c +++ b/msm/sde/sde_kms.c @@ -3715,38 +3715,51 @@ void sde_kms_display_early_wakeup(struct drm_device *dev, } #ifdef CONFIG_DEEPSLEEP -static int _sde_kms_pm_set_clk_src(struct sde_kms *sde_kms, bool enable) +static int _sde_kms_pm_deepsleep_helper(struct sde_kms *sde_kms, bool enter) { int i, rc = 0; void *display; struct dsi_display *dsi_display; - if (mem_sleep_current == PM_SUSPEND_MEM) { - SDE_INFO("Deepsleep\n"); + if (mem_sleep_current != PM_SUSPEND_MEM) + return 0; - for (i = 0; i < sde_kms->dsi_display_count; i++) { - display = sde_kms->dsi_displays[i]; - dsi_display = (struct dsi_display *)display; + SDE_INFO("Deepsleep : enter %d\n", enter); - if (!dsi_display->needs_clk_src_reset) - continue; + for (i = 0; i < sde_kms->dsi_display_count; i++) { + display = sde_kms->dsi_displays[i]; + dsi_display = (struct dsi_display *)display; - if (enable) - rc = dsi_display_set_clk_src(dsi_display); - else - rc = dsi_display_unset_clk_src(dsi_display); - if (rc) { - SDE_ERROR("failed to set clks rc:%d\n", rc); - return rc; - } + if (enter) { + /* During deepsleep, clk_parent are reset at HW + * but sw caching is retained in clk framework. To + * maintain same state. unset parents and restore + * during exit. + */ + if (dsi_display->needs_clk_src_reset) + (void)dsi_display_unset_clk_src(dsi_display); + + /* DSI ctrl regulator can be disabled, even in static + * screen, during deepsleep + */ + if (dsi_display->needs_ctrl_vreg_disable) + (void)dsi_display_ctrl_vreg_off(dsi_display); + } else { + if (dsi_display->needs_ctrl_vreg_disable) + (void)dsi_display_ctrl_vreg_on(dsi_display); + + if (dsi_display->needs_clk_src_reset) + (void)dsi_display_set_clk_src(dsi_display); + } } return rc; } #else -static inline int _sde_kms_pm_set_clk_src(struct sde_kms *sde_kms, bool enable) +static inline int _sde_kms_pm_deepsleep_helper(struct sde_kms *sde_kms, + bool enter) { return 0; } @@ -3943,8 +3956,7 @@ unlock: pm_runtime_put_sync(dev); pm_runtime_get_noresume(dev); - /* reset clock source based on PM suspend state */ - _sde_kms_pm_set_clk_src(sde_kms, false); + _sde_kms_pm_deepsleep_helper(sde_kms, true); /* dump clock state before entering suspend */ if (sde_kms->pm_suspend_clk_dump) @@ -3983,8 +3995,8 @@ retry: goto end; } - /* reset clock source based on PM suspend state */ - _sde_kms_pm_set_clk_src(sde_kms, true); + /* If coming out of deepsleep, restore resources.*/ + _sde_kms_pm_deepsleep_helper(sde_kms, false); sde_kms->suspend_block = false; From a965033fba11266d97a84465a79c5ac63da296e5 Mon Sep 17 00:00:00 2001 From: Kai Xing Date: Wed, 18 May 2022 07:45:08 +0530 Subject: [PATCH 5/8] disp: msm: dsi: Add DSI PLL support for 7nm_v4_1 arch Add DSI PLL support for 7nm_v4_1 architecture Change-Id: I4adf1ec6ed40fea16aa80579d34a3c918faa8478 Signed-off-by: Kai Xing --- config/konadisp.conf | 1 + msm/dsi/dsi_pll.c | 5 +++++ msm/dsi/dsi_pll.h | 3 +++ msm/dsi/dsi_pll_5nm.c | 15 +++++++++++++-- 4 files changed, 22 insertions(+), 2 deletions(-) diff --git a/config/konadisp.conf b/config/konadisp.conf index dbbf3c847dbb..928706fee29f 100644 --- a/config/konadisp.conf +++ b/config/konadisp.conf @@ -11,3 +11,4 @@ export CONFIG_QCOM_MDSS_PLL=y export CONFIG_MSM_SDE_ROTATOR=y export CONFIG_MSM_SDE_ROTATOR_EVTLOG_DEBUG=y export CONFIG_DRM_SDE_RSC=y +export CONFIG_DISPLAY_BUILD=y diff --git a/msm/dsi/dsi_pll.c b/msm/dsi/dsi_pll.c index ce5d1cf3e245..5b310ca53378 100644 --- a/msm/dsi/dsi_pll.c +++ b/msm/dsi/dsi_pll.c @@ -1,5 +1,7 @@ // SPDX-License-Identifier: GPL-2.0-only /* + * Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved. + * * Copyright (c) 2020, The Linux Foundation. All rights reserved. */ @@ -21,6 +23,7 @@ static int dsi_pll_clock_register(struct platform_device *pdev, switch (pll_res->pll_revision) { case DSI_PLL_5NM: + case DSI_PLL_7NM_V4_1: rc = dsi_pll_clock_register_5nm(pdev, pll_res); break; case DSI_PLL_10NM: @@ -150,6 +153,8 @@ int dsi_pll_init(struct platform_device *pdev, struct dsi_pll_resource **pll) if (!strcmp(label, "dsi_pll_5nm")) pll_res->pll_revision = DSI_PLL_5NM; + else if (!strcmp(label, "dsi_pll_7nm_v4_1")) + pll_res->pll_revision = DSI_PLL_7NM_V4_1; else if (!strcmp(label, "dsi_pll_10nm")) pll_res->pll_revision = DSI_PLL_10NM; else diff --git a/msm/dsi/dsi_pll.h b/msm/dsi/dsi_pll.h index 386fe6a93101..f424b8cb4843 100644 --- a/msm/dsi/dsi_pll.h +++ b/msm/dsi/dsi_pll.h @@ -1,5 +1,7 @@ /* SPDX-License-Identifier: GPL-2.0-only */ /* + * Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved. + * * Copyright (c) 2020, The Linux Foundation. All rights reserved. */ @@ -54,6 +56,7 @@ struct lpfr_cfg { enum { DSI_PLL_5NM, + DSI_PLL_7NM_V4_1, DSI_PLL_10NM, DSI_UNKNOWN_PLL, }; diff --git a/msm/dsi/dsi_pll_5nm.c b/msm/dsi/dsi_pll_5nm.c index f1c78cec1b22..501aa32b31ea 100644 --- a/msm/dsi/dsi_pll_5nm.c +++ b/msm/dsi/dsi_pll_5nm.c @@ -1,5 +1,7 @@ // SPDX-License-Identifier: GPL-2.0-only /* + * Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved. + * * Copyright (c) 2016-2021, The Linux Foundation. All rights reserved. */ @@ -291,6 +293,13 @@ static inline bool dsi_pll_5nm_is_hw_revision( true : false; } +static inline bool dsi_pll_7nm_v4_1_is_hw_revision( + struct dsi_pll_resource *rsc) +{ + return (rsc->pll_revision == DSI_PLL_7NM_V4_1) ? + true : false; +} + static inline int pll_reg_read(void *context, unsigned int reg, unsigned int *val) { @@ -2591,7 +2600,8 @@ int dsi_pll_clock_register_5nm(struct platform_device *pdev, dsi0pll_vco_clk.priv = pll_res; dsi0pll_shadow_vco_clk.priv = pll_res; - if (dsi_pll_5nm_is_hw_revision(pll_res)) { + if (dsi_pll_5nm_is_hw_revision(pll_res) || + dsi_pll_7nm_v4_1_is_hw_revision(pll_res)) { dsi0pll_vco_clk.min_rate = 600000000; dsi0pll_vco_clk.max_rate = 5000000000; dsi0pll_shadow_vco_clk.min_rate = 600000000; @@ -2660,7 +2670,8 @@ int dsi_pll_clock_register_5nm(struct platform_device *pdev, dsi1pll_vco_clk.priv = pll_res; dsi1pll_shadow_vco_clk.priv = pll_res; - if (dsi_pll_5nm_is_hw_revision(pll_res)) { + if (dsi_pll_5nm_is_hw_revision(pll_res) || + dsi_pll_7nm_v4_1_is_hw_revision(pll_res)) { dsi1pll_vco_clk.min_rate = 600000000; dsi1pll_vco_clk.max_rate = 5000000000; dsi1pll_shadow_vco_clk.min_rate = 600000000; From ed8c317940ac7643522ff5e68951a2835c924a1d Mon Sep 17 00:00:00 2001 From: Naresh Kumar Lingagalla Date: Thu, 7 Jul 2022 10:11:26 +0530 Subject: [PATCH 6/8] Revert "disp: msm: dsi: Add DSI PLL support for 7nm_v4_1 arch" This reverts commit a965033fba11266d97a84465a79c5ac63da296e5. Change-Id: Ifb3d9b1a10a28cd281459174a9291fea79ec781d Signed-off-by: Naresh Kumar Lingagalla --- config/konadisp.conf | 1 - msm/dsi/dsi_pll.c | 5 ----- msm/dsi/dsi_pll.h | 3 --- msm/dsi/dsi_pll_5nm.c | 15 ++------------- 4 files changed, 2 insertions(+), 22 deletions(-) diff --git a/config/konadisp.conf b/config/konadisp.conf index 928706fee29f..dbbf3c847dbb 100644 --- a/config/konadisp.conf +++ b/config/konadisp.conf @@ -11,4 +11,3 @@ export CONFIG_QCOM_MDSS_PLL=y export CONFIG_MSM_SDE_ROTATOR=y export CONFIG_MSM_SDE_ROTATOR_EVTLOG_DEBUG=y export CONFIG_DRM_SDE_RSC=y -export CONFIG_DISPLAY_BUILD=y diff --git a/msm/dsi/dsi_pll.c b/msm/dsi/dsi_pll.c index 5b310ca53378..ce5d1cf3e245 100644 --- a/msm/dsi/dsi_pll.c +++ b/msm/dsi/dsi_pll.c @@ -1,7 +1,5 @@ // SPDX-License-Identifier: GPL-2.0-only /* - * Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved. - * * Copyright (c) 2020, The Linux Foundation. All rights reserved. */ @@ -23,7 +21,6 @@ static int dsi_pll_clock_register(struct platform_device *pdev, switch (pll_res->pll_revision) { case DSI_PLL_5NM: - case DSI_PLL_7NM_V4_1: rc = dsi_pll_clock_register_5nm(pdev, pll_res); break; case DSI_PLL_10NM: @@ -153,8 +150,6 @@ int dsi_pll_init(struct platform_device *pdev, struct dsi_pll_resource **pll) if (!strcmp(label, "dsi_pll_5nm")) pll_res->pll_revision = DSI_PLL_5NM; - else if (!strcmp(label, "dsi_pll_7nm_v4_1")) - pll_res->pll_revision = DSI_PLL_7NM_V4_1; else if (!strcmp(label, "dsi_pll_10nm")) pll_res->pll_revision = DSI_PLL_10NM; else diff --git a/msm/dsi/dsi_pll.h b/msm/dsi/dsi_pll.h index f424b8cb4843..386fe6a93101 100644 --- a/msm/dsi/dsi_pll.h +++ b/msm/dsi/dsi_pll.h @@ -1,7 +1,5 @@ /* SPDX-License-Identifier: GPL-2.0-only */ /* - * Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved. - * * Copyright (c) 2020, The Linux Foundation. All rights reserved. */ @@ -56,7 +54,6 @@ struct lpfr_cfg { enum { DSI_PLL_5NM, - DSI_PLL_7NM_V4_1, DSI_PLL_10NM, DSI_UNKNOWN_PLL, }; diff --git a/msm/dsi/dsi_pll_5nm.c b/msm/dsi/dsi_pll_5nm.c index 501aa32b31ea..f1c78cec1b22 100644 --- a/msm/dsi/dsi_pll_5nm.c +++ b/msm/dsi/dsi_pll_5nm.c @@ -1,7 +1,5 @@ // SPDX-License-Identifier: GPL-2.0-only /* - * Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved. - * * Copyright (c) 2016-2021, The Linux Foundation. All rights reserved. */ @@ -293,13 +291,6 @@ static inline bool dsi_pll_5nm_is_hw_revision( true : false; } -static inline bool dsi_pll_7nm_v4_1_is_hw_revision( - struct dsi_pll_resource *rsc) -{ - return (rsc->pll_revision == DSI_PLL_7NM_V4_1) ? - true : false; -} - static inline int pll_reg_read(void *context, unsigned int reg, unsigned int *val) { @@ -2600,8 +2591,7 @@ int dsi_pll_clock_register_5nm(struct platform_device *pdev, dsi0pll_vco_clk.priv = pll_res; dsi0pll_shadow_vco_clk.priv = pll_res; - if (dsi_pll_5nm_is_hw_revision(pll_res) || - dsi_pll_7nm_v4_1_is_hw_revision(pll_res)) { + if (dsi_pll_5nm_is_hw_revision(pll_res)) { dsi0pll_vco_clk.min_rate = 600000000; dsi0pll_vco_clk.max_rate = 5000000000; dsi0pll_shadow_vco_clk.min_rate = 600000000; @@ -2670,8 +2660,7 @@ int dsi_pll_clock_register_5nm(struct platform_device *pdev, dsi1pll_vco_clk.priv = pll_res; dsi1pll_shadow_vco_clk.priv = pll_res; - if (dsi_pll_5nm_is_hw_revision(pll_res) || - dsi_pll_7nm_v4_1_is_hw_revision(pll_res)) { + if (dsi_pll_5nm_is_hw_revision(pll_res)) { dsi1pll_vco_clk.min_rate = 600000000; dsi1pll_vco_clk.max_rate = 5000000000; dsi1pll_shadow_vco_clk.min_rate = 600000000; From 29a7eac4912cea00142b4a1be26cba931902e112 Mon Sep 17 00:00:00 2001 From: Kai Xing Date: Thu, 28 Jul 2022 14:09:45 +0530 Subject: [PATCH 7/8] makefile: add gki config support for display techpack for kona Add required changes to makefile and enable the gki config keys for kona target compilation. Change-Id: I39422750ac6000078278ddc7705e7148f6b0ae6b Signed-off-by: Kai Xing --- Makefile | 10 ++++++---- config/gki_konadisp.conf | 17 +++++++++++++++++ config/gki_konadispconf.h | 21 +++++++++++++++++++++ config/konadisp.conf | 1 + 4 files changed, 45 insertions(+), 4 deletions(-) create mode 100644 config/gki_konadisp.conf create mode 100644 config/gki_konadispconf.h diff --git a/Makefile b/Makefile index 35bfbd4063ef..d51633c64222 100644 --- a/Makefile +++ b/Makefile @@ -2,11 +2,13 @@ # auto-detect subdirs ifeq ($(CONFIG_ARCH_KONA), y) -include $(srctree)/techpack/display/config/konadisp.conf -endif - -ifeq ($(CONFIG_ARCH_KONA), y) + ifeq ($(CONFIG_QGKI), y) + include $(srctree)/techpack/display/config/konadisp.conf LINUXINCLUDE += -include $(srctree)/techpack/display/config/konadispconf.h + else + include $(srctree)/techpack/display/config/gki_konadisp.conf +LINUXINCLUDE += -include $(srctree)/techpack/display/config/gki_konadispconf.h + endif endif ifeq ($(CONFIG_ARCH_LAHAINA), y) diff --git a/config/gki_konadisp.conf b/config/gki_konadisp.conf new file mode 100644 index 000000000000..6b7fce1bce47 --- /dev/null +++ b/config/gki_konadisp.conf @@ -0,0 +1,17 @@ +# SPDX-License-Identifier: GPL-2.0-only +# Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved. + +export CONFIG_DRM_MSM=y +export CONFIG_DRM_MSM_SDE=y +export CONFIG_SYNC_FILE=y +export CONFIG_DRM_MSM_DSI=y +export CONFIG_DRM_MSM_DP=y +export CONFIG_QCOM_MDSS_DP_PLL=y +export CONFIG_DSI_PARSER=y +export CONFIG_DRM_SDE_WB=y +export CONFIG_DRM_MSM_REGISTER_LOGGING=y +export CONFIG_QCOM_MDSS_PLL=y +export CONFIG_MSM_SDE_ROTATOR=y +export CONFIG_MSM_SDE_ROTATOR_EVTLOG_DEBUG=y +export CONFIG_DRM_SDE_RSC=y +export CONFIG_DISPLAY_BUILD=m diff --git a/config/gki_konadispconf.h b/config/gki_konadispconf.h new file mode 100644 index 000000000000..cada59af325c --- /dev/null +++ b/config/gki_konadispconf.h @@ -0,0 +1,21 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* + * Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved. + */ + +#define CONFIG_DRM_MSM 1 +#define CONFIG_DRM_MSM_SDE 1 +#define CONFIG_SYNC_FILE 1 +#define CONFIG_DRM_MSM_DSI 1 +#define CONFIG_DRM_MSM_DP 1 +#define CONFIG_QCOM_MDSS_DP_PLL 1 +#define CONFIG_DSI_PARSER 1 +#define CONFIG_DRM_SDE_WB 1 +#define CONFIG_DRM_MSM_REGISTER_LOGGING 1 +#define CONFIG_DRM_SDE_EVTLOG_DEBUG 1 +#define CONFIG_QCOM_MDSS_PLL 1 +#define CONFIG_GKI_DISPLAY 1 +#define CONFIG_MSM_SDE_ROTATOR 1 +#define CONFIG_MSM_SDE_ROTATOR_EVTLOG_DEBUG 1 +#define CONFIG_DRM_SDE_RSC 1 + diff --git a/config/konadisp.conf b/config/konadisp.conf index dbbf3c847dbb..928706fee29f 100644 --- a/config/konadisp.conf +++ b/config/konadisp.conf @@ -11,3 +11,4 @@ export CONFIG_QCOM_MDSS_PLL=y export CONFIG_MSM_SDE_ROTATOR=y export CONFIG_MSM_SDE_ROTATOR_EVTLOG_DEBUG=y export CONFIG_DRM_SDE_RSC=y +export CONFIG_DISPLAY_BUILD=y From 7015ffdd0b687ed91985f72e818b03c0578c2a08 Mon Sep 17 00:00:00 2001 From: Kai Xing Date: Tue, 19 Jul 2022 13:02:13 +0530 Subject: [PATCH 8/8] disp: msm: add msm framebuffer emulation This change copies msm_fbdev.c from msm-5.14 kernel, which adds frame buffer support to display driver. And this file is from msm-5.4 commit <5fce077d> ("drm: msm: Fix the format prints in display driver"). Change-Id: I113cb6441334ff6b61cfd15cf863c325d51091b4 Signed-off-by: Kai Xing --- msm/msm_fbdev.c | 216 ++++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 216 insertions(+) create mode 100644 msm/msm_fbdev.c diff --git a/msm/msm_fbdev.c b/msm/msm_fbdev.c new file mode 100644 index 000000000000..a132ace8c4cf --- /dev/null +++ b/msm/msm_fbdev.c @@ -0,0 +1,216 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Copyright (C) 2013 Red Hat + * Author: Rob Clark + */ + +#include +#include +#include + +#include "msm_drv.h" +#include "msm_kms.h" + +extern int msm_gem_mmap_obj(struct drm_gem_object *obj, + struct vm_area_struct *vma); +static int msm_fbdev_mmap(struct fb_info *info, struct vm_area_struct *vma); + +/* + * fbdev funcs, to implement legacy fbdev interface on top of drm driver + */ + +#define to_msm_fbdev(x) container_of(x, struct msm_fbdev, base) + +struct msm_fbdev { + struct drm_fb_helper base; + struct drm_framebuffer *fb; +}; + +static struct fb_ops msm_fb_ops = { + .owner = THIS_MODULE, + DRM_FB_HELPER_DEFAULT_OPS, + + /* Note: to properly handle manual update displays, we wrap the + * basic fbdev ops which write to the framebuffer + */ + .fb_read = drm_fb_helper_sys_read, + .fb_write = drm_fb_helper_sys_write, + .fb_fillrect = drm_fb_helper_sys_fillrect, + .fb_copyarea = drm_fb_helper_sys_copyarea, + .fb_imageblit = drm_fb_helper_sys_imageblit, + .fb_mmap = msm_fbdev_mmap, +}; + +static int msm_fbdev_mmap(struct fb_info *info, struct vm_area_struct *vma) +{ + struct drm_fb_helper *helper = (struct drm_fb_helper *)info->par; + struct msm_fbdev *fbdev = to_msm_fbdev(helper); + struct drm_gem_object *bo = msm_framebuffer_bo(fbdev->fb, 0); + int ret = 0; + + ret = drm_gem_mmap_obj(bo, bo->size, vma); + if (ret) { + pr_err("%s:drm_gem_mmap_obj fail\n", __func__); + return ret; + } + + return msm_gem_mmap_obj(bo, vma); +} + +static int msm_fbdev_create(struct drm_fb_helper *helper, + struct drm_fb_helper_surface_size *sizes) +{ + struct msm_fbdev *fbdev = to_msm_fbdev(helper); + struct drm_device *dev = helper->dev; + struct msm_drm_private *priv = dev->dev_private; + struct drm_framebuffer *fb = NULL; + struct drm_gem_object *bo; + struct fb_info *fbi = NULL; + uint64_t paddr; + uint32_t format; + int ret, pitch; + + format = drm_mode_legacy_fb_format(sizes->surface_bpp, sizes->surface_depth); + + DBG("create fbdev: %dx%d@%d (%dx%d)", sizes->surface_width, + sizes->surface_height, sizes->surface_bpp, + sizes->fb_width, sizes->fb_height); + + pitch = align_pitch(sizes->surface_width, sizes->surface_bpp); + fb = msm_alloc_stolen_fb(dev, sizes->surface_width, + sizes->surface_height, pitch, format); + + if (IS_ERR(fb)) { + DRM_DEV_ERROR(dev->dev, "failed to allocate fb\n"); + return PTR_ERR(fb); + } + + bo = msm_framebuffer_bo(fb, 0); + + mutex_lock(&dev->struct_mutex); + + /* + * NOTE: if we can be guaranteed to be able to map buffer + * in panic (ie. lock-safe, etc) we could avoid pinning the + * buffer now: + */ + ret = msm_gem_get_and_pin_iova(bo, priv->kms->aspace, &paddr); + if (ret) { + DRM_DEV_ERROR(dev->dev, "failed to get buffer obj iova: %d\n", ret); + goto fail_unlock; + } + + fbi = drm_fb_helper_alloc_fbi(helper); + if (IS_ERR(fbi)) { + DRM_DEV_ERROR(dev->dev, "failed to allocate fb info\n"); + ret = PTR_ERR(fbi); + goto fail_unlock; + } + + DBG("fbi=%pK, dev=%pK", fbi, dev); + + fbdev->fb = fb; + helper->fb = fb; + + fbi->fbops = &msm_fb_ops; + + drm_fb_helper_fill_info(fbi, helper, sizes); + + dev->mode_config.fb_base = paddr; + + fbi->screen_base = msm_gem_get_vaddr(bo); + if (IS_ERR(fbi->screen_base)) { + ret = PTR_ERR(fbi->screen_base); + goto fail_unlock; + } + fbi->screen_size = bo->size; + fbi->fix.smem_start = paddr; + fbi->fix.smem_len = bo->size; + + DBG("par=%pK, %dx%d", fbi->par, fbi->var.xres, fbi->var.yres); + DBG("allocated %dx%d fb", fbdev->fb->width, fbdev->fb->height); + + mutex_unlock(&dev->struct_mutex); + + return 0; + +fail_unlock: + mutex_unlock(&dev->struct_mutex); + drm_framebuffer_remove(fb); + return ret; +} + +static const struct drm_fb_helper_funcs msm_fb_helper_funcs = { + .fb_probe = msm_fbdev_create, +}; + +/* initialize fbdev helper */ +struct drm_fb_helper *msm_fbdev_init(struct drm_device *dev) +{ + struct msm_drm_private *priv = dev->dev_private; + struct msm_fbdev *fbdev = NULL; + struct drm_fb_helper *helper; + int ret; + + fbdev = kzalloc(sizeof(*fbdev), GFP_KERNEL); + if (!fbdev) + goto fail; + + helper = &fbdev->base; + + drm_fb_helper_prepare(dev, helper, &msm_fb_helper_funcs); + + ret = drm_fb_helper_init(dev, helper, priv->num_connectors); + if (ret) { + DRM_DEV_ERROR(dev->dev, "could not init fbdev: ret=%d\n", ret); + goto fail; + } + + ret = drm_fb_helper_single_add_all_connectors(helper); + if (ret) + goto fini; + + /* the fw fb could be anywhere in memory */ + drm_fb_helper_remove_conflicting_framebuffers(NULL, "msm", false); + + ret = drm_fb_helper_initial_config(helper, 32); + if (ret) + goto fini; + + priv->fbdev = helper; + + return helper; + +fini: + drm_fb_helper_fini(helper); +fail: + kfree(fbdev); + return NULL; +} + +void msm_fbdev_free(struct drm_device *dev) +{ + struct msm_drm_private *priv = dev->dev_private; + struct drm_fb_helper *helper = priv->fbdev; + struct msm_fbdev *fbdev; + + DBG(); + + drm_fb_helper_unregister_fbi(helper); + + drm_fb_helper_fini(helper); + + fbdev = to_msm_fbdev(priv->fbdev); + + /* this will free the backing object */ + if (fbdev->fb) { + struct drm_gem_object *bo = + msm_framebuffer_bo(fbdev->fb, 0); + msm_gem_put_vaddr(bo); + drm_framebuffer_remove(fbdev->fb); + } + + kfree(fbdev); + + priv->fbdev = NULL; +}