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ARM: dts: msm: add PIL spss node to lahaina
This change defines Peripheral Loader (PIL) spss node for loading Secure Processor. Change-Id: I83008b4530c1780a17e9f30a4ba25b2becdf5298
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1 changed files with 38 additions and 0 deletions
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@ -1851,6 +1851,44 @@
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mbox-names = "slpi-pil";
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};
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/* PIL spss node - for loading Secure Processor */
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qcom,spss@1880000 {
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compatible = "qcom,pil-tz-generic";
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reg = <0x188101c 0x4>,
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<0x1881024 0x4>,
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<0x1881028 0x4>,
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<0x188103c 0x4>,
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<0x1882014 0x4>;
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reg-names = "sp2soc_irq_status", "sp2soc_irq_clr",
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"sp2soc_irq_mask", "rmb_err", "rmb_err_spare2";
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interrupts = <0 352 1>;
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vdd_cx-supply = <&VDD_CX_LEVEL>;
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qcom,proxy-reg-names = "vdd_cx";
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qcom,vdd_cx-uV-uA = <RPMH_REGULATOR_LEVEL_TURBO 100000>;
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vdd_mx-supply = <&VDD_MXA_LEVEL>;
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vdd_mx-uV = <RPMH_REGULATOR_LEVEL_TURBO 100000>;
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clocks = <&clock_rpmh RPMH_CXO_CLK>;
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clock-names = "xo";
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qcom,proxy-clock-names = "xo";
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qcom,pil-generic-irq-handler;
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status = "ok"
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qcom,signal-aop;
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qcom,complete-ramdump;
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qcom,pas-id = <14>;
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qcom,proxy-timeout-ms = <10000>;
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qcom,firmware-name = "spss";
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memory-region = <&pil_spss_mem>;
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qcom,spss-scsr-bits = <24 25>;
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qcom,extra-size = <4096>;
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mboxes = <&qmp_aop 0>;
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mbox-names = "spss-pil";
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};
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ssc_sensors: qcom,msm-ssc-sensors {
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compatible = "qcom,msm-ssc-sensors";
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status = "ok"
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