mirror of
https://github.com/BobTheBlinker/android_kernel_motorola_sm6375.git
synced 2026-10-11 23:24:22 -04:00
ARM: dts: msm: Add eMMC, SD card support for SCUBA
Add eMMC, SD card support for scuba-iot. Change-Id: If37e9e04aae54753484520f3b4dbbb0fa55b832d
This commit is contained in:
Hongwei Ren
parent
3b7c218b68
commit
ac22552bb6
3 changed files with 246 additions and 92 deletions
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@ -12,6 +12,42 @@
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};
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};
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&sdhc_1 {
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vdd-supply = <&L20A>;
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qcom,vdd-voltage-level = <2856000 2856000>;
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qcom,vdd-current-level = <0 570000>;
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vdd-io-supply = <&L14A>;
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qcom,vdd-io-always-on;
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qcom,vdd-io-lpm-sup;
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qcom,vdd-io-voltage-level = <1800000 1800000>;
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qcom,vdd-io-current-level = <0 325000>;
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pinctrl-names = "default", "sleep";
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pinctrl-0 = <&sdc1_on>;
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pinctrl-1 = <&sdc1_off>;
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status = "ok"
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};
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&sdhc_2 {
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vdd-supply = <&L21A>;
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qcom,vdd-voltage-level = <2960000 3300000>;
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qcom,vdd-current-level = <0 800000>;
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vdd-io-supply = <&L4A>;
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qcom,vdd-io-voltage-level = <1800000 2960000>;
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qcom,vdd-io-current-level = <0 22000>;
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pinctrl-names = "default", "sleep";
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pinctrl-0 = <&sdc2_on>;
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pinctrl-1 = <&sdc2_off>;
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cd-gpios = <&tlmm 88 GPIO_ACTIVE_LOW>;
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status = "ok"
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};
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&pm2250_qg {
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qcom,battery-data = <&scuba_batterydata>;
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qcom,qg-iterm-ma = <150>;
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@ -37,139 +37,105 @@
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};
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};
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/* SDC pin type */
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sdc1_clk_on: sdc1_clk_on {
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config {
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sdc1_on: sdc1_on {
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clk {
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pins = "sdc1_clk";
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bias-disable; /* NO pull */
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drive-strength = <16>; /* 16 MA */
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};
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};
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sdc1_clk_off: sdc1_clk_off {
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config {
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pins = "sdc1_clk";
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bias-disable; /* NO pull */
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drive-strength = <2>; /* 2 MA */
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};
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};
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sdc1_cmd_on: sdc1_cmd_on {
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config {
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pins = "sdc1_cmd";
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bias-pull-up; /* pull up */
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drive-strength = <14>; /* 14 MA */
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};
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};
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sdc1_cmd_off: sdc1_cmd_off {
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config {
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pins = "sdc1_cmd";
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bias-pull-up; /* pull up */
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drive-strength = <2>; /* 2 MA */
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};
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};
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sdc1_data_on: sdc1_data_on {
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config {
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pins = "sdc1_data";
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bias-pull-up; /* pull up */
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drive-strength = <14>; /* 14 MA */
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};
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};
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sdc1_data_off: sdc1_data_off {
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config {
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pins = "sdc1_data";
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bias-pull-up; /* pull up */
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drive-strength = <2>; /* 2 MA */
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};
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};
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sdc1_rclk_on: sdc1_rclk_on {
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config {
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pins = "sdc1_rclk";
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bias-pull-down; /* pull down */
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};
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};
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sdc1_rclk_off: sdc1_rclk_off {
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config {
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pins = "sdc1_rclk";
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bias-pull-down; /* pull down */
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};
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};
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sdc2_clk_on: sdc2_clk_on {
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config {
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pins = "sdc2_clk";
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bias-disable; /* NO pull */
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drive-strength = <16>; /* 16 MA */
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};
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};
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sdc2_clk_off: sdc2_clk_off {
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config {
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pins = "sdc2_clk";
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bias-disable; /* NO pull */
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drive-strength = <2>; /* 2 MA */
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};
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};
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sdc2_cmd_on: sdc2_cmd_on {
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config {
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pins = "sdc2_cmd";
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bias-pull-up; /* pull up */
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drive-strength = <14>; /* 14 MA */
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};
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};
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sdc2_cmd_off: sdc2_cmd_off {
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config {
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pins = "sdc2_cmd";
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bias-pull-up; /* pull up */
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drive-strength = <2>; /* 2 MA */
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};
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};
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sdc2_data_on: sdc2_data_on {
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config {
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pins = "sdc2_data";
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bias-pull-up; /* pull up */
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drive-strength = <14>; /* 14 MA */
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};
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};
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sdc2_data_off: sdc2_data_off {
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config {
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pins = "sdc2_data";
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bias-pull-up; /* pull up */
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drive-strength = <2>; /* 2 MA */
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};
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};
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sdc2_cd_on: cd_on {
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mux {
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pins = "gpio88";
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function = "gpio";
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};
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config {
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pins = "gpio88";
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drive-strength = <2>;
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bias-pull-up;
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};
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};
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sdc2_cd_off: cd_off {
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mux {
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pins = "gpio88";
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function = "gpio";
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};
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config {
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pins = "gpio88";
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drive-strength = <2>;
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bias-disable;
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drive-strength = <16>;
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};
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cmd {
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pins = "sdc1_cmd";
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bias-pull-up;
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drive-strength = <10>;
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};
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data {
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pins = "sdc1_data";
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bias-pull-up;
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drive-strength = <10>;
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};
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rclk {
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pins = "sdc1_rclk";
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bias-pull-down;
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};
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};
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sdc1_off: sdc1_off {
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clk {
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pins = "sdc1_clk";
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bias-disable;
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drive-strength = <2>;
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};
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cmd {
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pins = "sdc1_cmd";
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bias-pull-up;
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drive-strength = <2>;
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};
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data {
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pins = "sdc1_data";
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bias-pull-up;
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drive-strength = <2>;
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};
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rclk {
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pins = "sdc1_rclk";
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bias-pull-down;
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};
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};
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sdc2_on: sdc2_on {
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clk {
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pins = "sdc2_clk";
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bias-disable;
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drive-strength = <16>;
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};
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cmd {
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pins = "sdc2_cmd";
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bias-pull-up;
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drive-strength = <10>;
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};
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data {
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pins = "sdc2_data";
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bias-pull-up;
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drive-strength = <10>;
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};
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sd-cd {
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pins = "gpio88";
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bias-pull-up;
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drive-strength = <2>;
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};
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};
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sdc2_off: sdc2_off {
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clk {
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pins = "sdc2_clk";
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bias-disable;
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drive-strength = <2>;
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};
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cmd {
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pins = "sdc2_cmd";
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bias-pull-up;
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drive-strength = <2>;
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};
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data {
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pins = "sdc2_data";
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bias-pull-up;
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drive-strength = <2>;
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};
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sd-cd {
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pins = "gpio88";
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bias-disable;
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drive-strength = <2>;
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};
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};
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@ -31,6 +31,8 @@
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aliases {
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serial0 = &qupv3_se4_2uart;
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hsuart0 = &qupv3_se3_4uart;
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sdhc1 = &sdhc_1; /*SDC1 eMMC slot*/
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sdhc2 = &sdhc_2; /* SDC2 SD card slot */
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};
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cpus {
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@ -487,6 +489,156 @@
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thermal_zones: thermal-zones { };
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sdhc_1: sdhci@4744000 {
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compatible = "qcom,sdhci-msm-v5";
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reg = <0x04744000 0x1000>, <0x04745000 0x1000>;
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reg-names = "hc_mem", "cqhci_mem";
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iommus = <&apps_smmu 0xC0 0x0>;
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qcom,iommu-dma = "bypass";
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interrupts = <GIC_SPI 348 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-names = "hc_irq", "pwr_irq";
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clocks = <&gcc GCC_SDCC1_APPS_CLK>,
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<&gcc GCC_SDCC1_AHB_CLK>,
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<&gcc GCC_SDCC1_ICE_CORE_CLK>;
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clock-names = "core", "iface", "ice_core";
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qcom,ice-clk-rates = <300000000 100000000>;
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interconnects = <&system_noc MASTER_SDCC_1 &bimc SLAVE_EBI_CH0>,
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<&bimc MASTER_AMPSS_M0 &config_noc SLAVE_SDCC_1>;
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interconnect-names = "sdhc-ddr","cpu-sdhc";
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qcom,msm-bus,name = "sdhc1";
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qcom,msm-bus,num-cases = <9>;
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qcom,msm-bus,num-paths = <2>;
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qcom,msm-bus,vectors-KBps =
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/* No vote */
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<78 512 0 0>, <1 606 0 0>,
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/* 400 KB/s*/
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<78 512 1046 1600>,
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<1 606 1600 1600>,
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/* 20 MB/s */
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<78 512 20480 80000>,
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<1 606 80000 80000>,
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/* 25 MB/s */
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<78 512 25600 250000>,
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<1 606 50000 133320>,
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/* 50 MB/s */
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<78 512 51200 250000>,
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<1 606 65000 133320>,
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/* 100 MB/s */
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<78 512 102400 250000>,
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<1 606 65000 133320>,
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/* 200 MB/s */
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<78 512 204800 800000>,
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<1 606 200000 300000>,
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/* 400 MB/s */
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<78 512 204800 800000>,
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<1 606 200000 300000>,
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/* Max. bandwidth */
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<78 512 1338562 4096000>,
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<1 606 1338562 4096000>;
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qcom,bus-bw-vectors-bps = <0 400000 20000000 25000000 50000000
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100750000 200000000 400000000 4294967295>;
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/* DLL HSR settings. Refer go/hsr - <Target> DLL settings */
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qcom,dll-hsr-list = <0x000f642c 0x0 0x0 0x00010800 0x80040868>;
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mmc-ddr-1_8v;
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mmc-hs200-1_8v;
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mmc-hs400-1_8v;
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mmc-hs400-enhanced-strobe;
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bus-width = <8>;
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non-removable;
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supports-cqe;
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no-sd;
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no-sdio;
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max-frequency = <192000000>;
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qcom,devfreq,freq-table = <50000000 200000000>;
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qcom,scaling-lower-bus-speed-mode = "DDR52";
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status = "disabled";
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qos0 {
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mask = <0x0f>;
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vote = <43>;
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};
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};
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sdhc_2: sdhci@4784000 {
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compatible = "qcom,sdhci-msm-v5";
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reg = <0x4784000 0x1000>;
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reg-names = "hc_mem";
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interrupts = <GIC_SPI 350 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-names = "hc_irq", "pwr_irq";
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clocks = <&gcc GCC_SDCC2_AHB_CLK>,
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<&gcc GCC_SDCC2_APPS_CLK>;
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clock-names = "core", "iface";
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interconnects = <&system_noc MASTER_SDCC_2 &bimc SLAVE_EBI_CH0>,
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<&bimc MASTER_AMPSS_M0 &config_noc SLAVE_SDCC_2>;
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interconnect-names = "sdhc-ddr","cpu-sdhc";
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qcom,msm-bus,name = "sdhc2";
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qcom,msm-bus,num-cases = <8>;
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qcom,msm-bus,num-paths = <2>;
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qcom,msm-bus,vectors-KBps =
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/* No vote */
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<81 512 0 0>, <1 608 0 0>,
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/* 400 KB/s*/
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<81 512 1046 3200>,
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<1 608 1600 1600>,
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/* 20 MB/s */
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<81 512 52286 250000>,
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<1 608 80000 133320>,
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/* 25 MB/s */
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<81 512 65360 250000>,
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<1 608 100000 133320>,
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/* 50 MB/s */
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<81 512 130718 250000>,
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<1 608 133320 133320>,
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/* 100 MB/s */
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<81 512 261438 250000>,
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<1 608 150000 133320>,
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/* 200 MB/s */
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<81 512 261438 800000>,
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<1 608 300000 300000>,
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/* Max. bandwidth */
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<81 512 1338562 4096000>,
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<1 608 1338562 4096000>;
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qcom,bus-bw-vectors-bps = <0 400000 20000000 25000000 50000000
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100750000 200000000 4294967295>;
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/* DLL HSR settings. Refer go/hsr - <Target> DLL settings */
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qcom,dll-hsr-list = <0x0007642c 0x0 0x0 0x00010800 0x80040868>;
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bus-width = <4>;
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iommus = <&apps_smmu 0xA0 0x0>;
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qcom,iommu-dma = "bypass";
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no-mmc;
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no-sdio;
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max-frequency = <202000000>;
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qcom,devfreq,freq-table = <50000000 202000000>;
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status = "disabled";
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qos0 {
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mask = <0x0f>;
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vote = <43>;
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};
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};
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qfprom: qfprom@1b40000 {
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compatible = "qcom,qfprom";
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reg = <0x1b40000 0x7000>;
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