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pinctrl: samsung: Add GPF support for Exynos5433

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This patch add the support of GPF[1-5] pin of Exynos5433 SoC. The GPFx need
to support the multiple memory map because the registers of GPFx are located
in the different domain.

Cc: Linus Walleij <[email protected]>
Cc: Rob Herring <[email protected]>
Cc: Mark Rutland <[email protected]>
Cc: Tomasz Figa <[email protected]>
Cc: Krzysztof Kozlowski <[email protected]>
Cc: Sylwester Nawrocki <[email protected]>
Cc: Kukjin Kim <[email protected]>
Cc: [email protected]
Signed-off-by: Joonyoung Shim <[email protected]>
Signed-off-by: Chanwoo Choi <[email protected]>
Signed-off-by: Linus Walleij <[email protected]>
This commit is contained in:
Chanwoo Choi 2016-11-09 17:40:11 +09:00 • committed by Linus Walleij
commit ac8130e94c
2 changed files with 25 additions and 0 deletions
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6
drivers/pinctrl/samsung/pinctrl-exynos.c
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@ -1339,6 +1339,11 @@ static const struct samsung_pin_bank_data exynos5433_pin_banks0[] = {
EXYNOS_PIN_BANK_EINTW(8, 0x020, "gpa1", 0x04),
EXYNOS_PIN_BANK_EINTW(8, 0x040, "gpa2", 0x08),
EXYNOS_PIN_BANK_EINTW(8, 0x060, "gpa3", 0x0c),
EXYNOS_PIN_BANK_EINTW_EXT(8, 0x020, "gpf1", 0x1004, 1),
EXYNOS_PIN_BANK_EINTW_EXT(4, 0x040, "gpf2", 0x1008, 1),
EXYNOS_PIN_BANK_EINTW_EXT(4, 0x060, "gpf3", 0x100c, 1),
EXYNOS_PIN_BANK_EINTW_EXT(8, 0x080, "gpf4", 0x1010, 1),
EXYNOS_PIN_BANK_EINTW_EXT(8, 0x0a0, "gpf5", 0x1014, 1),
};
/* pin banks of exynos5433 pin-controller - AUD */
@ -1420,6 +1425,7 @@ const struct samsung_pin_ctrl exynos5433_pin_ctrl[] = {
.eint_wkup_init = exynos_eint_wkup_init,
.suspend = exynos_pinctrl_suspend,
.resume = exynos_pinctrl_resume,
.nr_ext_resources = 1,
}, {
/* pin-controller instance 1 data */
.pin_banks = exynos5433_pin_banks1,