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Linux 3.8-rc5

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Merge branch 'omap/multiplatform-fixes', tag 'v3.8-rc5' into next/multiplatform

The omap multiplatform support uncovered a bug in the cwdavinci_cpdma
code and was missing two drivers that are enabled now but are not
quite ready for multiplatform, as found by allyesconfig builds.

There is also a conflict generated by automated merge in
arch/arm/mach-omap2/drm.c between a bug fix that went into v3.8-rc5
and a different version of the same fix that went into the
omap/multiplatform branch. This merge removes the extraneous
 #include that was causing build errors.

* omap/multiplatform-fixes:
  net: cwdavinci_cpdma: export symbols for cpsw
  remoteproc: omap: depend on OMAP_MBOX_FWK
  [media] davinci: do not include mach/hardware.h

Signed-off-by: Arnd Bergmann <[email protected]>
This commit is contained in:
Arnd Bergmann 2013-02-15 13:25:20 +01:00
commit acb7452369
594 changed files with 12058 additions and 3484 deletions
Download patch file Download diff file Expand all files Collapse all files

5
drivers/dma/imx-dma.c
View file

@ -684,9 +684,8 @@ static int imxdma_control(struct dma_chan *chan, enum dma_ctrl_cmd cmd,
break;
}
imxdmac->hw_chaining = 1;
if (!imxdma_hw_chain(imxdmac))
return -EINVAL;
imxdmac->hw_chaining = 0;
imxdmac->ccr_from_device = (mode | IMX_DMA_TYPE_FIFO) |
((IMX_DMA_MEMSIZE_32 | IMX_DMA_TYPE_LINEAR) << 2) |
CCR_REN;

2
drivers/dma/ioat/dma_v3.c
View file

@ -951,7 +951,7 @@ static int ioat_xor_val_self_test(struct ioatdma_device *device)
goto free_resources;
}
}
dma_sync_single_for_device(dev, dest_dma, PAGE_SIZE, DMA_TO_DEVICE);
dma_sync_single_for_device(dev, dest_dma, PAGE_SIZE, DMA_FROM_DEVICE);
/* skip validate if the capability is not present */
if (!dma_has_cap(DMA_XOR_VAL, dma_chan->device->cap_mask))

8
drivers/dma/tegra20-apb-dma.c
View file

@ -266,6 +266,7 @@ static struct tegra_dma_desc *tegra_dma_desc_get(
if (async_tx_test_ack(&dma_desc->txd)) {
list_del(&dma_desc->node);
spin_unlock_irqrestore(&tdc->lock, flags);
dma_desc->txd.flags = 0;
return dma_desc;
}
}
@ -1050,7 +1051,9 @@ struct dma_async_tx_descriptor *tegra_dma_prep_dma_cyclic(
TEGRA_APBDMA_AHBSEQ_WRAP_SHIFT;
ahb_seq |= TEGRA_APBDMA_AHBSEQ_BUS_WIDTH_32;
csr |= TEGRA_APBDMA_CSR_FLOW | TEGRA_APBDMA_CSR_IE_EOC;
csr |= TEGRA_APBDMA_CSR_FLOW;
if (flags & DMA_PREP_INTERRUPT)
csr |= TEGRA_APBDMA_CSR_IE_EOC;
csr |= tdc->dma_sconfig.slave_id << TEGRA_APBDMA_CSR_REQ_SEL_SHIFT;
apb_seq |= TEGRA_APBDMA_APBSEQ_WRAP_WORD_1;
@ -1095,7 +1098,8 @@ struct dma_async_tx_descriptor *tegra_dma_prep_dma_cyclic(
mem += len;
}
sg_req->last_sg = true;
dma_desc->txd.flags = 0;
if (flags & DMA_CTRL_ACK)
dma_desc->txd.flags = DMA_CTRL_ACK;
/*
* Make sure that mode should not be conflicting with currently