icc: dt-bindings: Update endpoint IDs for interconnects for HOLI

Update the master and slave ID constants for Holi interconnect
providers which consumers can use to set bandwidth constraints
and find paths in the NoC (Network-On-Chip) topology.

Change-Id: I45b73970484220af09d9ab55062da197038a82cd
Signed-off-by: Odelu Kukatla <okukatla@codeaurora.org>
This commit is contained in:
Odelu Kukatla 2020-06-21 17:24:38 +05:30 • committed by Gerrit - the friendly Code Review server
commit acee14b604

View file

@ -6,89 +6,95 @@
#ifndef __DT_BINDINGS_INTERCONNECT_QCOM_HOLI_H
#define __DT_BINDINGS_INTERCONNECT_QCOM_HOLI_H
#define MASTER_AMPSS_M0 0
#define MASTER_SNOC_BIMC_RT 1
#define MASTER_SNOC_BIMC_NRT 2
#define MASTER_SNOC_BIMC 3
#define MASTER_GPU_CDSP_PROC 4
#define MASTER_TCU_0 5
#define MASTER_SNOC_CNOC 6
#define MASTER_QDSS_DAP 7
#define MASTER_CRYPTO 8
#define MASTER_QUP_CORE_0 9
#define MASTER_QUP_CORE_1 10
#define MASTER_SNOC_CFG 12
#define MASTER_TIC 12
#define MASTER_ANOC_SNOC 13
#define MASTER_CAMNOC_SF 14
#define MASTER_CAMNOC_HF 15
#define MASTER_BIMC_SNOC 16
#define MASTER_MDP_PORT0 17
#define MASTER_PIMEM 18
#define MASTER_VIDEO_P0 19
#define MASTER_VIDEO_PROC 20
#define MASTER_QDSS_BAM 22
#define MASTER_QUP_0 22
#define MASTER_QUP_1 23
#define MASTER_IPA 24
#define MASTER_QDSS_ETR 25
#define MASTER_SDCC_1 26
#define MASTER_SDCC_2 27
#define MASTER_UFS_MEM 28
#define MASTER_USB3 29
#define MASTER_GRAPHICS_3D_PORT1 30
#define MASTER_GRAPHICS_3D 31
#define SLAVE_EBI 32
#define SLAVE_BIMC_SNOC 33
#define SLAVE_BIMC_CFG 34
#define SLAVE_CAMERA_NRT_THROTTLE_CFG 35
#define SLAVE_CAMERA_RT_THROTTLE_CFG 36
#define SLAVE_CAMERA_CFG 37
#define SLAVE_CDSP_THROTTLE_CFG 38
#define SLAVE_CLK_CTL 39
#define SLAVE_CRYPTO_0_CFG 40
#define SLAVE_DISPLAY_CFG 41
#define SLAVE_DISPLAY_THROTTLE_CFG 42
#define SLAVE_GPU_CFG 43
#define SLAVE_IMEM_CFG 44
#define SLAVE_IPA_CFG 45
#define SLAVE_LPASS 46
#define SLAVE_MESSAGE_RAM 47
#define SLAVE_PDM 48
#define SLAVE_PIMEM_CFG 49
#define SLAVE_PMIC_ARB 50
#define SLAVE_PRNG 51
#define SLAVE_QDSS_CFG 52
#define SLAVE_QM_CFG 53
#define SLAVE_QM_MPU_CFG 54
#define SLAVE_QUP_0 55
#define SLAVE_QUP_1 56
#define SLAVE_SDCC_1 57
#define SLAVE_SDCC_2 58
#define SLAVE_SNOC_CFG 59
#define SLAVE_TCSR 60
#define SLAVE_TLMM_EAST 61
#define SLAVE_TLMM_SOUTH 62
#define SLAVE_TLMM_WEST 63
#define SLAVE_UFS_MEM_CFG 64
#define SLAVE_USB3 65
#define SLAVE_VENUS_CFG 66
#define SLAVE_VENUS_THROTTLE_CFG 67
#define SLAVE_VSENSE_CTRL_CFG 68
#define SLAVE_SERVICE_CNOC 69
#define SLAVE_QUP_CORE_0 70
#define SLAVE_QUP_CORE_1 71
#define SLAVE_APPSS 72
#define SLAVE_SNOC_BIMC_NRT 73
#define SLAVE_SNOC_BIMC_RT 74
#define SLAVE_SNOC_CNOC 75
#define SLAVE_OCIMEM 76
#define SLAVE_PIMEM 77
#define SLAVE_SNOC_BIMC 78
#define SLAVE_SERVICE_SNOC 79
#define SLAVE_QDSS_STM 80
#define SLAVE_TCU 81
#define SLAVE_ANOC_SNOC 82
#define SLAVE_GPU_CDSP_BIMC 83
#define MASTER_AMPSS_M0 0
#define MASTER_SNOC_BIMC_RT 1
#define MASTER_SNOC_BIMC_NRT 2
#define SNOC_BIMC_MAS 3
#define MASTER_GRAPHICS_3D 4
#define MASTER_CDSP_PROC 5
#define MASTER_TCU_0 6
#define MASTER_QUP_CORE_0 7
#define MASTER_QUP_CORE_1 8
#define MASTER_CRYPTO_CORE0 9
#define SNOC_CNOC_MAS 10
#define MASTER_QDSS_DAP 11
#define MASTER_CAMNOC_SF 12
#define MASTER_CAMNOC_HF 13
#define MASTER_MDP_PORT0 14
#define MASTER_VIDEO_P0 15
#define MASTER_VIDEO_PROC 16
#define MASTER_SNOC_CFG 17
#define MASTER_TIC 18
#define A1NOC_SNOC_MAS 19
#define A2NOC_SNOC_MAS 20
#define BIMC_SNOC_MAS 21
#define MASTER_PIMEM 22
#define MASTER_QUP_0 23
#define MASTER_QUP_1 24
#define MASTER_EMMC 25
#define MASTER_SDCC_2 26
#define MASTER_UFS_MEM 27
#define MASTER_QDSS_BAM 28
#define MASTER_IPA 29
#define MASTER_QDSS_ETR 30
#define SLAVE_EBI 512
#define BIMC_SNOC_SLV 513
#define SLAVE_PKA_CORE 514
#define SLAVE_QUP_CORE_0 515
#define SLAVE_QUP_CORE_1 516
#define SLAVE_BIMC_CFG 517
#define SLAVE_APPSS 518
#define SLAVE_CAMERA_NRT_THROTTLE_CFG 519
#define SLAVE_CAMERA_RT_THROTTLE_CFG 520
#define SLAVE_CAMERA_CFG 521
#define SLAVE_CLK_CTL 522
#define SLAVE_DSP_CFG 523
#define SLAVE_RBCPR_CX_CFG 524
#define SLAVE_RBCPR_MX_CFG 525
#define SLAVE_CRYPTO_0_CFG 526
#define SLAVE_DCC_CFG 527
#define SLAVE_DDR_PHY_CFG 528
#define SLAVE_DDR_SS_CFG 529
#define SLAVE_DISPLAY_CFG 530
#define SLAVE_DISPLAY_THROTTLE_CFG 531
#define SLAVE_EMMC_CFG 532
#define SLAVE_GRAPHICS_3D_CFG 533
#define SLAVE_HWKM 534
#define SLAVE_IMEM_CFG 535
#define SLAVE_IPA_CFG 536
#define SLAVE_LPASS 537
#define SLAVE_MAPSS 538
#define SLAVE_MESSAGE_RAM 539
#define SLAVE_PDM 540
#define SLAVE_PIMEM_CFG 541
#define SLAVE_PMIC_ARB 542
#define SLAVE_QDSS_CFG 543
#define SLAVE_QM_CFG 544
#define SLAVE_QM_MPU_CFG 545
#define SLAVE_QUP_0 546
#define SLAVE_QUP_1 547
#define SLAVE_RPM 548
#define SLAVE_SDCC_2 549
#define SLAVE_SECURITY 550
#define SLAVE_SNOC_CFG 551
#define SLAVE_TCSR 552
#define SLAVE_TLMM 553
#define SLAVE_UFS_MEM_CFG 554
#define SLAVE_USB3 555
#define SLAVE_VENUS_CFG 556
#define SLAVE_VENUS_THROTTLE_CFG 557
#define SLAVE_VSENSE_CTRL_CFG 558
#define SLAVE_SNOC_BIMC_NRT 559
#define SLAVE_SNOC_BIMC_RT 560
#define SNOC_CNOC_SLV 561
#define SLAVE_OCIMEM 562
#define SLAVE_PIMEM 563
#define SNOC_BIMC_SLV 564
#define SLAVE_SERVICE_SNOC 565
#define SLAVE_QDSS_STM 566
#define SLAVE_TCU 567
#define A1NOC_SNOC_SLV 568
#define A2NOC_SNOC_SLV 569
#endif