From ad4b70c5ecf277bdd38241a52bdbbe698b93859f Mon Sep 17 00:00:00 2001 From: Binsheng Que Date: Wed, 3 Mar 2021 05:01:01 -0600 Subject: [PATCH] Revert "ARM: dts: msm: Add bus scaling support" This reverts commit 3df8a7acf0ea934485f9162c2d58e26878707b2e. The previous change will cause the TZ to be awake all the time. Syncing with Qualcomm in SR 05102653, in 20mA case, ce1_clk is not disabled which is related to the crypto engine. : *** TZ *** 4 status: SPM_AWAKE num_active_cores: 0 pending_bringups: 0x00000000 Master Stats: ERROR ee.stats is null CHANGER: ERROR READING [ee].changer HANDLER: SMDL info: NONE Mot-CRs-fixed: (CR) Change-Id: I37cc4a6d467273705fe96d14ac735cd0d4c583d3 Reviewed-on: https://gerrit.mot.com/1891694 SLTApproved: Slta Waiver SME-Granted: SME Approvals Granted Tested-by: Jira Key Reviewed-by: Huosheng Liao Submit-Approved: Jira Key --- qcom/holi.dtsi | 1 - 1 file changed, 1 deletion(-) diff --git a/qcom/holi.dtsi b/qcom/holi.dtsi index 303a4b795fa0..4e041d8fc4b8 100644 --- a/qcom/holi.dtsi +++ b/qcom/holi.dtsi @@ -3030,7 +3030,6 @@ qcom,fde-key-size; qcom,appsbl-qseecom-support; qcom,commonlib64-loaded-by-uefi; - qcom,support-bus-scaling; interconnect-names = "data_path"; interconnects = <&system_noc MASTER_CRYPTO_CORE0 &bimc SLAVE_EBI>; clock-names =