mirror of
https://github.com/BobTheBlinker/android_kernel_motorola_sm6375.git
synced 2026-10-09 05:39:54 -04:00
ARM: dts: qcom: Add Support for QCN9000 for MTP CPE
Add the following changes to support QCN9000 in MTP CPE 1x Pine platform: 1. Add sdxlemur-qcn9000.dtsi to have all QCN9000 related configs. 2. Add memory reservation of 2x52 MB for 2 QCN9000 in sdxlemur-qcn9000.dtsi but in disabled state. 3. Enable reserved memory for 1 QCN9000 in sdxlemur-mtp-cpe-pine1x.dtsi. 4. Add wifi node with all QCN9000 related configs. 5. Enable pcie0_bus2_dev1_fn0 node with QCN9000 memory configs. 6. Enable GPIO 102 to power on QCN9000. Change-Id: Ieaa7e6fb567581f6d82ae6edfc2f664adf3ef4cc
This commit is contained in:
Vignesh Viswanathan
Gerrit - the friendly Code Review server
parent
c23250127a
commit
ad73a911c8
3 changed files with 632 additions and 0 deletions
|
|
@ -17,6 +17,7 @@ Required properties:
|
|||
"qcom,cnss-qca6390" for QCA6390 device
|
||||
"qcom,cnss-qca6490" for QCA6490 device
|
||||
"qcom,cnss-wcn7850" for WCN7850 device
|
||||
"qcom,cnss-qcn9000" for QCN9000 device
|
||||
"qcom,cnss-qca-converged" for converged QCA devices
|
||||
- wlan-en-gpio: WLAN_EN GPIO signal specified by the chip specifications
|
||||
- vdd-wlan-supply: phandle to the regulator device tree node
|
||||
|
|
|
|||
|
|
@ -1,4 +1,45 @@
|
|||
|
||||
#include "sdxlemur-qcn9000.dtsi"
|
||||
|
||||
&soc {
|
||||
|
||||
pine_vreg: pine_vreg {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "pine_vreg";
|
||||
gpio = <&tlmm 102 GPIO_ACTIVE_HIGH>;
|
||||
regulator-min-microvolt = <3300000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
enable-active-high;
|
||||
regulator-enable-ramp-delay = <200000>;
|
||||
};
|
||||
};
|
||||
|
||||
&ntn3_vreg {
|
||||
vin-supply = <&pine_vreg>;
|
||||
};
|
||||
|
||||
&pcie0 {
|
||||
qcom,no-l0s-supported;
|
||||
qcom,no-l1-supported;
|
||||
qcom,no-l1ss-supported;
|
||||
qcom,no-aux-clk-sync;
|
||||
};
|
||||
|
||||
&pcie0_bus2_dev1_fn0 {
|
||||
cnss_pci1: cnss_pci1 {
|
||||
reg = <0 0 0 0 0>;
|
||||
qcom,iommu-group = <&qcn9000_pci_iommu_group_0>;
|
||||
memory-region = <&qcn9000_0_mem>;
|
||||
qrtr_instance_id = <0x0>;
|
||||
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
};
|
||||
};
|
||||
|
||||
&wifi0 {
|
||||
status = "ok"
|
||||
};
|
||||
|
||||
&qcn9000_0_mem {
|
||||
status = "ok"
|
||||
};
|
||||
|
|
|
|||
590
qcom/sdxlemur-qcn9000.dtsi
Normal file
590
qcom/sdxlemur-qcn9000.dtsi
Normal file
|
|
@ -0,0 +1,590 @@
|
|||
|
||||
&reserved_memory {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
ranges;
|
||||
|
||||
qcn9000_0_mem: qcn9000_0_mem {
|
||||
compatible = "shared-dma-pool";
|
||||
alloc-ranges = <0x00000000 0xffffffff>;
|
||||
reusable;
|
||||
alignment = <0x400000>;
|
||||
size = <0x3400000>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
qcn9000_1_mem: qcn9000_1_mem {
|
||||
compatible = "shared-dma-pool";
|
||||
alloc-ranges = <0x00000000 0xffffffff>;
|
||||
reusable;
|
||||
alignment = <0x400000>;
|
||||
size = <0x3400000>;
|
||||
status = "disabled";
|
||||
};
|
||||
};
|
||||
|
||||
&soc {
|
||||
wifi0: qcom,cnss-qcn9000@a0000000 {
|
||||
status = "disabled";
|
||||
compatible = "qcom,cnss-qcn9000";
|
||||
memory-region = <&qcn9000_0_mem>;
|
||||
qcom,wlan-ramdump-dynamic = <0x400000>;
|
||||
qrtr_node_id = <0x0>;
|
||||
qca,auto-restart;
|
||||
tgt-mem-mode = <0x1>;
|
||||
board_id = <0xa4>;
|
||||
|
||||
mhi,max-channels = <30>;
|
||||
mhi,timeout = <10000>;
|
||||
|
||||
mhi_channels {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
mhi_chan@0 {
|
||||
reg = <0>;
|
||||
label = "LOOPBACK";
|
||||
mhi,num-elements = <32>;
|
||||
mhi,event-ring = <1>;
|
||||
mhi,chan-dir = <1>;
|
||||
mhi,data-type = <0>;
|
||||
mhi,doorbell-mode = <2>;
|
||||
mhi,ee = <0x14>;
|
||||
};
|
||||
|
||||
mhi_chan@1 {
|
||||
reg = <1>;
|
||||
label = "LOOPBACK";
|
||||
mhi,num-elements = <32>;
|
||||
mhi,event-ring = <1>;
|
||||
mhi,chan-dir = <2>;
|
||||
mhi,data-type = <0>;
|
||||
mhi,doorbell-mode = <2>;
|
||||
mhi,ee = <0x14>;
|
||||
};
|
||||
|
||||
mhi_chan@4 {
|
||||
reg = <4>;
|
||||
label = "DIAG";
|
||||
mhi,num-elements = <32>;
|
||||
mhi,event-ring = <1>;
|
||||
mhi,chan-dir = <1>;
|
||||
mhi,data-type = <0>;
|
||||
mhi,doorbell-mode = <2>;
|
||||
mhi,ee = <0x14>;
|
||||
};
|
||||
|
||||
mhi_chan@5 {
|
||||
reg = <5>;
|
||||
label = "DIAG";
|
||||
mhi,num-elements = <32>;
|
||||
mhi,event-ring = <1>;
|
||||
mhi,chan-dir = <2>;
|
||||
mhi,data-type = <0>;
|
||||
mhi,doorbell-mode = <2>;
|
||||
mhi,ee = <0x14>;
|
||||
};
|
||||
|
||||
mhi_chan@20 {
|
||||
reg = <20>;
|
||||
label = "IPCR";
|
||||
mhi,num-elements = <32>;
|
||||
mhi,event-ring = <1>;
|
||||
mhi,chan-dir = <1>;
|
||||
mhi,data-type = <1>;
|
||||
mhi,doorbell-mode = <2>;
|
||||
mhi,ee = <0x14>;
|
||||
mhi,auto-start;
|
||||
};
|
||||
|
||||
mhi_chan@21 {
|
||||
reg = <21>;
|
||||
label = "IPCR";
|
||||
mhi,num-elements = <32>;
|
||||
mhi,event-ring = <1>;
|
||||
mhi,chan-dir = <2>;
|
||||
mhi,data-type = <0>;
|
||||
mhi,doorbell-mode = <2>;
|
||||
mhi,ee = <0x14>;
|
||||
mhi,auto-queue;
|
||||
mhi,auto-start;
|
||||
};
|
||||
};
|
||||
|
||||
mhi_events {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
mhi_event@0 {
|
||||
mhi,num-elements = <32>;
|
||||
mhi,intmod = <0>;
|
||||
mhi,msi = <1>;
|
||||
mhi,priority = <0>;
|
||||
mhi,brstmode = <2>;
|
||||
mhi,data-type = <1>;
|
||||
};
|
||||
|
||||
mhi_event@1 {
|
||||
mhi,num-elements = <256>;
|
||||
mhi,intmod = <0>;
|
||||
mhi,msi = <2>;
|
||||
mhi,priority = <1>;
|
||||
mhi,brstmode = <2>;
|
||||
};
|
||||
|
||||
mhi_event@2 {
|
||||
status = "disabled";
|
||||
};
|
||||
};
|
||||
|
||||
mhi_devices {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
mhi_qrtr {
|
||||
mhi,chan = "IPCR";
|
||||
qcom,net-id = <0>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
wifi1: qcom,cnss-qcn9000@b0000000 {
|
||||
status = "disabled";
|
||||
compatible = "qcom,cnss-qcn9000";
|
||||
memory-region = <&qcn9000_1_mem>;
|
||||
qcom,wlan-ramdump-dynamic = <0x400000>;
|
||||
qrtr_node_id = <0x0>;
|
||||
qca,auto-restart;
|
||||
tgt-mem-mode = <0x1>;
|
||||
board_id = <0xa4>;
|
||||
|
||||
mhi,max-channels = <30>;
|
||||
mhi,timeout = <10000>;
|
||||
|
||||
mhi_channels {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
mhi_chan@0 {
|
||||
reg = <0>;
|
||||
label = "LOOPBACK";
|
||||
mhi,num-elements = <32>;
|
||||
mhi,event-ring = <1>;
|
||||
mhi,chan-dir = <1>;
|
||||
mhi,data-type = <0>;
|
||||
mhi,doorbell-mode = <2>;
|
||||
mhi,ee = <0x14>;
|
||||
};
|
||||
|
||||
mhi_chan@1 {
|
||||
reg = <1>;
|
||||
label = "LOOPBACK";
|
||||
mhi,num-elements = <32>;
|
||||
mhi,event-ring = <1>;
|
||||
mhi,chan-dir = <2>;
|
||||
mhi,data-type = <0>;
|
||||
mhi,doorbell-mode = <2>;
|
||||
mhi,ee = <0x14>;
|
||||
};
|
||||
|
||||
mhi_chan@4 {
|
||||
reg = <4>;
|
||||
label = "DIAG";
|
||||
mhi,num-elements = <32>;
|
||||
mhi,event-ring = <1>;
|
||||
mhi,chan-dir = <1>;
|
||||
mhi,data-type = <0>;
|
||||
mhi,doorbell-mode = <2>;
|
||||
mhi,ee = <0x14>;
|
||||
};
|
||||
|
||||
mhi_chan@5 {
|
||||
reg = <5>;
|
||||
label = "DIAG";
|
||||
mhi,num-elements = <32>;
|
||||
mhi,event-ring = <1>;
|
||||
mhi,chan-dir = <2>;
|
||||
mhi,data-type = <0>;
|
||||
mhi,doorbell-mode = <2>;
|
||||
mhi,ee = <0x14>;
|
||||
};
|
||||
|
||||
mhi_chan@20 {
|
||||
reg = <20>;
|
||||
label = "IPCR";
|
||||
mhi,num-elements = <32>;
|
||||
mhi,event-ring = <1>;
|
||||
mhi,chan-dir = <1>;
|
||||
mhi,data-type = <1>;
|
||||
mhi,doorbell-mode = <2>;
|
||||
mhi,ee = <0x14>;
|
||||
mhi,auto-start;
|
||||
};
|
||||
|
||||
mhi_chan@21 {
|
||||
reg = <21>;
|
||||
label = "IPCR";
|
||||
mhi,num-elements = <32>;
|
||||
mhi,event-ring = <1>;
|
||||
mhi,chan-dir = <2>;
|
||||
mhi,data-type = <0>;
|
||||
mhi,doorbell-mode = <2>;
|
||||
mhi,ee = <0x14>;
|
||||
mhi,auto-queue;
|
||||
mhi,auto-start;
|
||||
};
|
||||
};
|
||||
|
||||
mhi_events {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
mhi_event@0 {
|
||||
mhi,num-elements = <32>;
|
||||
mhi,intmod = <0>;
|
||||
mhi,msi = <1>;
|
||||
mhi,priority = <0>;
|
||||
mhi,brstmode = <2>;
|
||||
mhi,data-type = <1>;
|
||||
};
|
||||
|
||||
mhi_event@1 {
|
||||
mhi,num-elements = <256>;
|
||||
mhi,intmod = <0>;
|
||||
mhi,msi = <2>;
|
||||
mhi,priority = <1>;
|
||||
mhi,brstmode = <2>;
|
||||
};
|
||||
|
||||
mhi_event@2 {
|
||||
status = "disabled";
|
||||
};
|
||||
};
|
||||
|
||||
mhi_devices {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
mhi_qrtr {
|
||||
mhi,chan = "IPCR";
|
||||
qcom,net-id = <0>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&pcie0_rp {
|
||||
#address-cells = <5>;
|
||||
#size-cells = <0>;
|
||||
|
||||
cnss_pci: cnss_pci {
|
||||
reg = <0 0 0 0 0>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
|
||||
qcn9000_pci_iommu_group_0: qcn9000_pci_iommu_group_0 {
|
||||
qcom,iommu-dma-addr-pool = <0xa0000000 0x10000000>;
|
||||
qcom,iommu-dma = "fastmap";
|
||||
qcom,iommu-faults = "stall-disable", "HUPCF", "no-CFRE",
|
||||
"non-fatal";
|
||||
};
|
||||
|
||||
qcn9000_pci_iommu_group_1: qcn9000_pci_iommu_group_1 {
|
||||
qcom,iommu-dma-addr-pool = <0xb0000000 0x10000000>;
|
||||
qcom,iommu-dma = "fastmap";
|
||||
qcom,iommu-faults = "stall-disable", "HUPCF", "no-CFRE",
|
||||
"non-fatal";
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&reserved_memory {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
ranges;
|
||||
|
||||
qcn9000_0_mem: qcn9000_0_mem {
|
||||
compatible = "shared-dma-pool";
|
||||
alloc-ranges = <0x00000000 0xffffffff>;
|
||||
reusable;
|
||||
alignment = <0x400000>;
|
||||
size = <0x3400000>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
qcn9000_1_mem: qcn9000_1_mem {
|
||||
compatible = "shared-dma-pool";
|
||||
alloc-ranges = <0x00000000 0xffffffff>;
|
||||
reusable;
|
||||
alignment = <0x400000>;
|
||||
size = <0x3400000>;
|
||||
status = "disabled";
|
||||
};
|
||||
};
|
||||
|
||||
&soc {
|
||||
wifi0: qcom,cnss-qcn9000@a0000000 {
|
||||
status = "disabled";
|
||||
compatible = "qcom,cnss-qcn9000";
|
||||
memory-region = <&qcn9000_0_mem>;
|
||||
qcom,wlan-ramdump-dynamic = <0x400000>;
|
||||
qrtr_node_id = <0x0>;
|
||||
qca,auto-restart;
|
||||
tgt-mem-mode = <0x1>;
|
||||
board_id = <0xa4>;
|
||||
|
||||
mhi,max-channels = <30>;
|
||||
mhi,timeout = <10000>;
|
||||
|
||||
mhi_channels {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
mhi_chan@0 {
|
||||
reg = <0>;
|
||||
label = "LOOPBACK";
|
||||
mhi,num-elements = <32>;
|
||||
mhi,event-ring = <1>;
|
||||
mhi,chan-dir = <1>;
|
||||
mhi,data-type = <0>;
|
||||
mhi,doorbell-mode = <2>;
|
||||
mhi,ee = <0x14>;
|
||||
};
|
||||
|
||||
mhi_chan@1 {
|
||||
reg = <1>;
|
||||
label = "LOOPBACK";
|
||||
mhi,num-elements = <32>;
|
||||
mhi,event-ring = <1>;
|
||||
mhi,chan-dir = <2>;
|
||||
mhi,data-type = <0>;
|
||||
mhi,doorbell-mode = <2>;
|
||||
mhi,ee = <0x14>;
|
||||
};
|
||||
|
||||
mhi_chan@4 {
|
||||
reg = <4>;
|
||||
label = "DIAG";
|
||||
mhi,num-elements = <32>;
|
||||
mhi,event-ring = <1>;
|
||||
mhi,chan-dir = <1>;
|
||||
mhi,data-type = <0>;
|
||||
mhi,doorbell-mode = <2>;
|
||||
mhi,ee = <0x14>;
|
||||
};
|
||||
|
||||
mhi_chan@5 {
|
||||
reg = <5>;
|
||||
label = "DIAG";
|
||||
mhi,num-elements = <32>;
|
||||
mhi,event-ring = <1>;
|
||||
mhi,chan-dir = <2>;
|
||||
mhi,data-type = <0>;
|
||||
mhi,doorbell-mode = <2>;
|
||||
mhi,ee = <0x14>;
|
||||
};
|
||||
|
||||
mhi_chan@20 {
|
||||
reg = <20>;
|
||||
label = "IPCR";
|
||||
mhi,num-elements = <32>;
|
||||
mhi,event-ring = <1>;
|
||||
mhi,chan-dir = <1>;
|
||||
mhi,data-type = <1>;
|
||||
mhi,doorbell-mode = <2>;
|
||||
mhi,ee = <0x14>;
|
||||
mhi,auto-start;
|
||||
};
|
||||
|
||||
mhi_chan@21 {
|
||||
reg = <21>;
|
||||
label = "IPCR";
|
||||
mhi,num-elements = <32>;
|
||||
mhi,event-ring = <1>;
|
||||
mhi,chan-dir = <2>;
|
||||
mhi,data-type = <0>;
|
||||
mhi,doorbell-mode = <2>;
|
||||
mhi,ee = <0x14>;
|
||||
mhi,auto-queue;
|
||||
mhi,auto-start;
|
||||
};
|
||||
};
|
||||
|
||||
mhi_events {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
mhi_event@0 {
|
||||
mhi,num-elements = <32>;
|
||||
mhi,intmod = <0>;
|
||||
mhi,msi = <1>;
|
||||
mhi,priority = <0>;
|
||||
mhi,brstmode = <2>;
|
||||
mhi,data-type = <1>;
|
||||
};
|
||||
|
||||
mhi_event@1 {
|
||||
mhi,num-elements = <256>;
|
||||
mhi,intmod = <0>;
|
||||
mhi,msi = <2>;
|
||||
mhi,priority = <1>;
|
||||
mhi,brstmode = <2>;
|
||||
};
|
||||
|
||||
mhi_event@2 {
|
||||
status = "disabled";
|
||||
};
|
||||
};
|
||||
|
||||
mhi_devices {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
mhi_qrtr {
|
||||
mhi,chan = "IPCR";
|
||||
qcom,net-id = <0>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
wifi1: qcom,cnss-qcn9000@b0000000 {
|
||||
status = "disabled";
|
||||
compatible = "qcom,cnss-qcn9000";
|
||||
memory-region = <&qcn9000_1_mem>;
|
||||
qcom,wlan-ramdump-dynamic = <0x400000>;
|
||||
qrtr_node_id = <0x0>;
|
||||
qca,auto-restart;
|
||||
tgt-mem-mode = <0x1>;
|
||||
board_id = <0xa4>;
|
||||
|
||||
mhi,max-channels = <30>;
|
||||
mhi,timeout = <10000>;
|
||||
|
||||
mhi_channels {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
mhi_chan@0 {
|
||||
reg = <0>;
|
||||
label = "LOOPBACK";
|
||||
mhi,num-elements = <32>;
|
||||
mhi,event-ring = <1>;
|
||||
mhi,chan-dir = <1>;
|
||||
mhi,data-type = <0>;
|
||||
mhi,doorbell-mode = <2>;
|
||||
mhi,ee = <0x14>;
|
||||
};
|
||||
|
||||
mhi_chan@1 {
|
||||
reg = <1>;
|
||||
label = "LOOPBACK";
|
||||
mhi,num-elements = <32>;
|
||||
mhi,event-ring = <1>;
|
||||
mhi,chan-dir = <2>;
|
||||
mhi,data-type = <0>;
|
||||
mhi,doorbell-mode = <2>;
|
||||
mhi,ee = <0x14>;
|
||||
};
|
||||
|
||||
mhi_chan@4 {
|
||||
reg = <4>;
|
||||
label = "DIAG";
|
||||
mhi,num-elements = <32>;
|
||||
mhi,event-ring = <1>;
|
||||
mhi,chan-dir = <1>;
|
||||
mhi,data-type = <0>;
|
||||
mhi,doorbell-mode = <2>;
|
||||
mhi,ee = <0x14>;
|
||||
};
|
||||
|
||||
mhi_chan@5 {
|
||||
reg = <5>;
|
||||
label = "DIAG";
|
||||
mhi,num-elements = <32>;
|
||||
mhi,event-ring = <1>;
|
||||
mhi,chan-dir = <2>;
|
||||
mhi,data-type = <0>;
|
||||
mhi,doorbell-mode = <2>;
|
||||
mhi,ee = <0x14>;
|
||||
};
|
||||
|
||||
mhi_chan@20 {
|
||||
reg = <20>;
|
||||
label = "IPCR";
|
||||
mhi,num-elements = <32>;
|
||||
mhi,event-ring = <1>;
|
||||
mhi,chan-dir = <1>;
|
||||
mhi,data-type = <1>;
|
||||
mhi,doorbell-mode = <2>;
|
||||
mhi,ee = <0x14>;
|
||||
mhi,auto-start;
|
||||
};
|
||||
|
||||
mhi_chan@21 {
|
||||
reg = <21>;
|
||||
label = "IPCR";
|
||||
mhi,num-elements = <32>;
|
||||
mhi,event-ring = <1>;
|
||||
mhi,chan-dir = <2>;
|
||||
mhi,data-type = <0>;
|
||||
mhi,doorbell-mode = <2>;
|
||||
mhi,ee = <0x14>;
|
||||
mhi,auto-queue;
|
||||
mhi,auto-start;
|
||||
};
|
||||
};
|
||||
|
||||
mhi_events {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
mhi_event@0 {
|
||||
mhi,num-elements = <32>;
|
||||
mhi,intmod = <0>;
|
||||
mhi,msi = <1>;
|
||||
mhi,priority = <0>;
|
||||
mhi,brstmode = <2>;
|
||||
mhi,data-type = <1>;
|
||||
};
|
||||
|
||||
mhi_event@1 {
|
||||
mhi,num-elements = <256>;
|
||||
mhi,intmod = <0>;
|
||||
mhi,msi = <2>;
|
||||
mhi,priority = <1>;
|
||||
mhi,brstmode = <2>;
|
||||
};
|
||||
|
||||
mhi_event@2 {
|
||||
status = "disabled";
|
||||
};
|
||||
};
|
||||
|
||||
mhi_devices {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
mhi_qrtr {
|
||||
mhi,chan = "IPCR";
|
||||
qcom,net-id = <0>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&pcie0_rp {
|
||||
#address-cells = <5>;
|
||||
#size-cells = <0>;
|
||||
|
||||
cnss_pci: cnss_pci {
|
||||
reg = <0 0 0 0 0>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
|
||||
qcn9000_pci_iommu_group_0: qcn9000_pci_iommu_group_0 {
|
||||
qcom,iommu-dma-addr-pool = <0xa0000000 0x10000000>;
|
||||
qcom,iommu-dma = "fastmap";
|
||||
qcom,iommu-faults = "stall-disable", "HUPCF", "no-CFRE",
|
||||
"non-fatal";
|
||||
};
|
||||
|
||||
qcn9000_pci_iommu_group_1: qcn9000_pci_iommu_group_1 {
|
||||
qcom,iommu-dma-addr-pool = <0xb0000000 0x10000000>;
|
||||
qcom,iommu-dma = "fastmap";
|
||||
qcom,iommu-faults = "stall-disable", "HUPCF", "no-CFRE",
|
||||
"non-fatal";
|
||||
};
|
||||
};
|
||||
};
|
||||
Loading…
Reference in a new issue