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iwlwifi: check the SCD conf from ALIVE response
The ALIVE response of new fw inclues the base address of the SCD in SRAM. Until we read it from a prph register, which was set by the fw. Since the fw might well stop updating the prph register, add a WARN when there is an inconsitency between the ALIVE response and the register to catch any change in the behavior. Reviewed-by: Gregory Greenman <gregory.greenman@intel.com> Reviewed-by: Johannes Berg <johannes.berg@intel.com> Signed-off-by: Johannes Berg <johannes.berg@intel.com>
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3 changed files with 13 additions and 8 deletions
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@ -254,7 +254,7 @@ static int iwl_alive_notify(struct iwl_priv *priv)
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int ret;
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int i;
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iwl_trans_fw_alive(priv->trans);
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iwl_trans_fw_alive(priv->trans, 0);
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if (priv->fw->ucode_capa.flags & IWL_UCODE_TLV_FLAGS_PAN &&
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priv->eeprom_data->sku & EEPROM_SKU_CAP_IPAN_ENABLE) {
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@ -355,7 +355,8 @@ struct iwl_trans;
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* @start_fw: allocates and inits all the resources for the transport
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* layer. Also kick a fw image.
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* May sleep
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* @fw_alive: called when the fw sends alive notification
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* @fw_alive: called when the fw sends alive notification. If the fw provides
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* the SCD base address in SRAM, then provide it here, or 0 otherwise.
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* May sleep
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* @stop_device:stops the whole device (embedded CPU put to reset)
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* May sleep
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@ -394,7 +395,7 @@ struct iwl_trans_ops {
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int (*start_hw)(struct iwl_trans *iwl_trans);
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void (*stop_hw)(struct iwl_trans *iwl_trans, bool op_mode_leaving);
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int (*start_fw)(struct iwl_trans *trans, const struct fw_img *fw);
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void (*fw_alive)(struct iwl_trans *trans);
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void (*fw_alive)(struct iwl_trans *trans, u32 scd_addr);
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void (*stop_device)(struct iwl_trans *trans);
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void (*wowlan_suspend)(struct iwl_trans *trans);
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@ -514,13 +515,13 @@ static inline void iwl_trans_stop_hw(struct iwl_trans *trans,
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trans->state = IWL_TRANS_NO_FW;
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}
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static inline void iwl_trans_fw_alive(struct iwl_trans *trans)
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static inline void iwl_trans_fw_alive(struct iwl_trans *trans, u32 scd_addr)
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{
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might_sleep();
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trans->state = IWL_TRANS_FW_ALIVE;
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trans->ops->fw_alive(trans);
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trans->ops->fw_alive(trans, scd_addr);
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}
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static inline int iwl_trans_start_fw(struct iwl_trans *trans,
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@ -1079,7 +1079,7 @@ static void iwl_trans_txq_set_sched(struct iwl_trans *trans, u32 mask)
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iwl_write_prph(trans, SCD_TXFACT, mask);
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}
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static void iwl_tx_start(struct iwl_trans *trans)
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static void iwl_tx_start(struct iwl_trans *trans, u32 scd_base_addr)
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{
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struct iwl_trans_pcie *trans_pcie = IWL_TRANS_GET_PCIE_TRANS(trans);
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u32 a;
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@ -1092,6 +1092,10 @@ static void iwl_tx_start(struct iwl_trans *trans)
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trans_pcie->scd_base_addr =
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iwl_read_prph(trans, SCD_SRAM_BASE_ADDR);
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WARN_ON(scd_base_addr != 0 &&
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scd_base_addr != trans_pcie->scd_base_addr);
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a = trans_pcie->scd_base_addr + SCD_CONTEXT_MEM_LOWER_BOUND;
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/* reset conext data memory */
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for (; a < trans_pcie->scd_base_addr + SCD_CONTEXT_MEM_UPPER_BOUND;
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@ -1137,10 +1141,10 @@ static void iwl_tx_start(struct iwl_trans *trans)
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APMG_PCIDEV_STT_VAL_L1_ACT_DIS);
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}
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static void iwl_trans_pcie_fw_alive(struct iwl_trans *trans)
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static void iwl_trans_pcie_fw_alive(struct iwl_trans *trans, u32 scd_addr)
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{
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iwl_reset_ict(trans);
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iwl_tx_start(trans);
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iwl_tx_start(trans, scd_addr);
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}
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/**
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