From af551eb2bc86de6d1ad35ecd802dd6bfca79b796 Mon Sep 17 00:00:00 2001 From: Lijuan Gao Date: Fri, 27 Nov 2020 20:58:09 +0800 Subject: [PATCH] ARM: dts: msm: Add clock support for uart driver Clock is available, so add the clock support for sdx12 uart driver. Change-Id: I7ed108a50075f24b647bf489e745b4076179a1bb --- qcom/sdxnightjar.dtsi | 9 ++++++--- 1 file changed, 6 insertions(+), 3 deletions(-) diff --git a/qcom/sdxnightjar.dtsi b/qcom/sdxnightjar.dtsi index 622d46a7c381..d87e70d136b7 100644 --- a/qcom/sdxnightjar.dtsi +++ b/qcom/sdxnightjar.dtsi @@ -318,7 +318,8 @@ compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm"; reg = <0x78af000 0x200>; interrupts = <0 107 0>; - /*TODO: Fix the clock when tree is available*/ + clocks = <&gcc GCC_BLSP1_UART1_APPS_CLK>, + <&gcc GCC_BLSP1_AHB_CLK>; clock-names = "core", "iface"; status = "disabled"; }; @@ -327,7 +328,8 @@ compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm"; reg = <0x78b0000 0x200>; interrupts = <0 108 0>; - /*TODO: Fix the clock when tree is available*/ + clocks = <&gcc GCC_BLSP1_UART2_APPS_CLK>, + <&gcc GCC_BLSP1_AHB_CLK>; clock-names = "core", "iface"; status = "disabled"; }; @@ -336,7 +338,8 @@ compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm"; reg = <0x78b1000 0x200>; interrupts = <0 109 0>; - /*TODO: Fix the clock when tree is available*/ + clocks = <&gcc GCC_BLSP1_UART3_APPS_CLK>, + <&gcc GCC_BLSP1_AHB_CLK>; clock-names = "core", "iface"; status = "disabled"; };