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Merge "bindings: clock: Add support for MONACO clock controllers"

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qctecmdr 2021-01-27 02:37:46 -08:00 • committed by Gerrit - the friendly Code Review server
commit af91259832
5 changed files with 5 additions and 0 deletions
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1
bindings/clock/qcom,debugcc.txt
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@ -13,6 +13,7 @@ Required properties :
"qcom,sdxnightjar-debugcc"
"qcom,scshrike-debugcc"
"qcom,sm6150-debugcc"
"qcom,monaco-debugcc"
- qcom,gcc: phandle to the GCC device node.
- qcom,videocc: phandle to the Video CC device node.

1
bindings/clock/qcom,dispcc.txt
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@ -16,6 +16,7 @@ Required properties :
"qcom,scshrike-dispcc-v2"
"qcom,sm6150-dispcc"
"qcom,sa6155-dispcc"
"qcom,monaco-dispcc"
- reg : shall contain base register location and length.
- #clock-cells : from common clock binding, shall contain 1.

1
bindings/clock/qcom,gcc.txt
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@ -37,6 +37,7 @@ Required properties :
"qcom,scshrike-gcc-v2"
"qcom,sm6150-gcc"
"qcom,sa6155-gcc"
"qcom,monaco-gcc"
- reg : shall contain base register location and length
- vdd_cx-supply: The vdd_cx logic rail supply.

1
bindings/clock/qcom,gpucc.txt
View file

@ -12,6 +12,7 @@ Required properties :
"qcom,scshrike-gpucc"
"qcom,sm6150-gpucc",
"qcom,sa6155-gpucc".
"qcom,monaco-gpucc"
- reg: shall contain base register offset and size.
- reg-names: names of registers listed in the same order as in the reg property.

1
bindings/clock/qcom,rpmcc.txt
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@ -20,6 +20,7 @@ Required properties :
"qcom,rpmcc-qcs404", "qcom,rpmcc"
"qcom,rpmcc-holi", "qcom,rpmcc"
"qcom,rpmcc-sdxnightjar", "qcom,rpmcc"
"qcom,rpmcc-monaco", "qcom,rpmcc"
- #clock-cells : shall contain 1