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https://github.com/BobTheBlinker/android_kernel_motorola_sm6375.git
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Merge "msm: camera: cpas: Add support for new cpas version" into camera-kernel.lnx.4.0
This commit is contained in:
Camera Software Integration
Gerrit - the friendly Code Review server
commit
afdd3c12a7
3 changed files with 251 additions and 1 deletions
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@ -27,6 +27,7 @@
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#include "cpastop_v580_custom.h"
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#include "cpastop_v540_100.h"
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#include "cpastop_v520_100.h"
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#include "cpastop_v520_110.h"
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#include "cpastop_v545_100.h"
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#include "cpastop_v545_110.h"
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#include "cpastop_v570_200.h"
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@ -102,7 +103,7 @@ static const uint32_t cam_cpas_hw_version_map
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{
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CAM_CPAS_TITAN_520_V100,
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0,
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0,
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CAM_CPAS_TITAN_520_V110,
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0,
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0,
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0,
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@ -934,6 +935,10 @@ static int cam_cpastop_init_hw_version(struct cam_hw_info *cpas_hw,
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camnoc_info = &cam520_cpas100_camnoc_info;
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qchannel_info = &cam520_cpas100_qchannel_info;
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break;
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case CAM_CPAS_TITAN_520_V110:
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camnoc_info = &cam520_cpas110_camnoc_info;
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qchannel_info = &cam520_cpas110_qchannel_info;
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break;
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case CAM_CPAS_TITAN_545_V100:
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camnoc_info = &cam545_cpas100_camnoc_info;
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qchannel_info = &cam545_cpas100_qchannel_info;
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244
drivers/cam_cpas/cpas_top/cpastop_v520_110.h
Normal file
244
drivers/cam_cpas/cpas_top/cpastop_v520_110.h
Normal file
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@ -0,0 +1,244 @@
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/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* Copyright (c) 2021, The Linux Foundation. All rights reserved.
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*/
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#ifndef _CPASTOP_V520_110_H_
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#define _CPASTOP_V520_110_H_
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#define TEST_IRQ_ENABLE 0
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static struct cam_camnoc_irq_sbm cam_cpas_v520_110_irq_sbm = {
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.sbm_enable = {
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.access_type = CAM_REG_TYPE_READ_WRITE,
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.enable = true,
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.offset = 0xA40, /* SBM_FAULTINEN0_LOW */
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.value = 0x1 | /* SBM_FAULTINEN0_LOW_PORT0_MASK*/
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(TEST_IRQ_ENABLE ?
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0x2 : /* SBM_FAULTINEN0_LOW_PORT6_MASK */
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0x0) /* SBM_FAULTINEN0_LOW_PORT1_MASK */,
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},
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.sbm_status = {
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.access_type = CAM_REG_TYPE_READ,
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.enable = true,
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.offset = 0xA48, /* SBM_FAULTINSTATUS0_LOW */
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},
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.sbm_clear = {
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.access_type = CAM_REG_TYPE_WRITE,
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.enable = true,
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.offset = 0xA80, /* SBM_FLAGOUTCLR0_LOW */
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.value = TEST_IRQ_ENABLE ? 0x3 : 0x1,
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}
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};
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static struct cam_camnoc_irq_err
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cam_cpas_v520_110_irq_err[] = {
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{
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.irq_type = CAM_CAMNOC_HW_IRQ_SLAVE_ERROR,
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.enable = true,
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.sbm_port = 0x1, /* SBM_FAULTINSTATUS0_LOW_PORT0_MASK */
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.err_enable = {
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.access_type = CAM_REG_TYPE_READ_WRITE,
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.enable = true,
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.offset = 0xD08, /* ERRORLOGGER_MAINCTL_LOW */
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.value = 1,
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},
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.err_status = {
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.access_type = CAM_REG_TYPE_READ,
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.enable = true,
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.offset = 0xD10, /* ERRORLOGGER_ERRVLD_LOW */
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},
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.err_clear = {
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.access_type = CAM_REG_TYPE_WRITE,
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.enable = true,
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.offset = 0xD18, /* ERRORLOGGER_ERRCLR_LOW */
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.value = 1,
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},
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},
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{
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.irq_type = CAM_CAMNOC_HW_IRQ_CAMNOC_TEST,
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.enable = TEST_IRQ_ENABLE ? true : false,
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.sbm_port = 0x2, /* SBM_FAULTINSTATUS0_LOW_PORT6_MASK */
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.err_enable = {
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.access_type = CAM_REG_TYPE_READ_WRITE,
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.enable = true,
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.offset = 0xA88, /* SBM_FLAGOUTSET0_LOW */
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.value = 0x1,
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},
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.err_status = {
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.access_type = CAM_REG_TYPE_READ,
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.enable = true,
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.offset = 0xA90, /* SBM_FLAGOUTSTATUS0_LOW */
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},
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.err_clear = {
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.enable = false,
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},
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},
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};
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static struct cam_camnoc_specific
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cam_cpas_v520_110_camnoc_specific[] = {
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{
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.port_type = CAM_CAMNOC_CDM,
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.enable = true,
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.priority_lut_low = {
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.enable = true,
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.access_type = CAM_REG_TYPE_READ_WRITE,
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.masked_value = 0,
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.offset = 0xE30, /* CDM_PRIORITYLUT_LOW */
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.value = 0x33333333,
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},
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.priority_lut_high = {
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.enable = true,
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.access_type = CAM_REG_TYPE_READ_WRITE,
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.masked_value = 0,
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.offset = 0xE34, /* CDM_PRIORITYLUT_HIGH */
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.value = 0x33333333,
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},
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.urgency = {
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.enable = true,
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.access_type = CAM_REG_TYPE_READ_WRITE,
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.masked_value = 0,
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.offset = 0xE38, /* CDM_URGENCY_LOW */
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.value = 0x00000003,
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},
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.danger_lut = {
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.enable = false,
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.access_type = CAM_REG_TYPE_READ_WRITE,
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.masked_value = 0,
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.offset = 0xE40, /* CDM_DANGERLUT_LOW */
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.value = 0x0,
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},
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.safe_lut = {
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.enable = false,
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.access_type = CAM_REG_TYPE_READ_WRITE,
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.masked_value = 0,
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.offset = 0xE48, /* CDM_SAFELUT_LOW */
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.value = 0x0,
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},
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.ubwc_ctl = {
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.enable = false,
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},
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},
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{
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.port_type = CAM_CAMNOC_TFE,
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.enable = true,
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.priority_lut_low = {
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.enable = true,
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.access_type = CAM_REG_TYPE_READ_WRITE,
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.masked_value = 0,
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/* TFE_PRIORITYLUT_LOW */
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.offset = 0x30,
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.value = 0x44443333,
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},
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.priority_lut_high = {
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.enable = true,
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.access_type = CAM_REG_TYPE_READ_WRITE,
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.masked_value = 0,
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/* TFE_PRIORITYLUT_HIGH */
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.offset = 0x34,
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.value = 0x66665555,
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},
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.urgency = {
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.enable = true,
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.access_type = CAM_REG_TYPE_READ_WRITE,
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.masked_value = 0,
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.offset = 0x38, /* TFE_URGENCY_LOW */
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.value = 0x00001030,
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},
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.danger_lut = {
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.enable = true,
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.access_type = CAM_REG_TYPE_READ_WRITE,
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.offset = 0x40, /* TFE_DANGERLUT_LOW */
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.value = 0xffff0000,
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},
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.safe_lut = {
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.enable = true,
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.access_type = CAM_REG_TYPE_READ_WRITE,
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.offset = 0x48, /* TFE_SAFELUT_LOW */
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.value = 0x00000003,
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},
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.ubwc_ctl = {
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/*
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* Do not explicitly set ubwc config register.
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* Power on default values are taking care of required
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* register settings.
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*/
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.enable = false,
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},
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},
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{
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.port_type = CAM_CAMNOC_OPE,
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.enable = true,
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.priority_lut_low = {
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.enable = true,
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.access_type = CAM_REG_TYPE_READ_WRITE,
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.masked_value = 0,
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.offset = 0x430, /* OPE_PRIORITYLUT_LOW */
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.value = 0x33333333,
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},
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.priority_lut_high = {
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.enable = true,
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.access_type = CAM_REG_TYPE_READ_WRITE,
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.masked_value = 0,
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.offset = 0x434, /* OPE_PRIORITYLUT_HIGH */
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.value = 0x33333333,
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},
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.urgency = {
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.enable = true,
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.access_type = CAM_REG_TYPE_READ_WRITE,
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.offset = 0x438, /* OPE_URGENCY_LOW */
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.value = 0x00000033,
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},
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.danger_lut = {
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.enable = false,
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.access_type = CAM_REG_TYPE_READ_WRITE,
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.offset = 0x440, /* OPE_DANGERLUT_LOW */
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.value = 0xFFFFFF00,
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},
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.safe_lut = {
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.enable = false,
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.access_type = CAM_REG_TYPE_READ_WRITE,
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.offset = 0x448, /* OPE_SAFELUT_LOW */
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.value = 0xF,
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},
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.ubwc_ctl = {
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/*
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* Do not explicitly set ubwc config register.
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* Power on default values are taking care of required
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* register settings.
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*/
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.enable = false,
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},
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},
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};
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static struct cam_camnoc_err_logger_info cam520_cpas110_err_logger_offsets = {
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.mainctrl = 0xD08, /* ERRLOGGER_MAINCTL_LOW */
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.errvld = 0xD10, /* ERRLOGGER_ERRVLD_LOW */
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.errlog0_low = 0xD20, /* ERRLOGGER_ERRLOG0_LOW */
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.errlog0_high = 0xD24, /* ERRLOGGER_ERRLOG0_HIGH */
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.errlog1_low = 0xD28, /* ERRLOGGER_ERRLOG1_LOW */
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.errlog1_high = 0xD2C, /* ERRLOGGER_ERRLOG1_HIGH */
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.errlog2_low = 0xD30, /* ERRLOGGER_ERRLOG2_LOW */
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.errlog2_high = 0xD34, /* ERRLOGGER_ERRLOG2_HIGH */
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.errlog3_low = 0xD38, /* ERRLOGGER_ERRLOG3_LOW */
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.errlog3_high = 0xD3C, /* ERRLOGGER_ERRLOG3_HIGH */
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};
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static struct cam_camnoc_info cam520_cpas110_camnoc_info = {
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.specific = &cam_cpas_v520_110_camnoc_specific[0],
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.specific_size = ARRAY_SIZE(cam_cpas_v520_110_camnoc_specific),
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.irq_sbm = &cam_cpas_v520_110_irq_sbm,
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.irq_err = &cam_cpas_v520_110_irq_err[0],
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.irq_err_size = ARRAY_SIZE(cam_cpas_v520_110_irq_err),
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.err_logger = &cam520_cpas110_err_logger_offsets,
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.errata_wa_list = NULL,
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};
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static struct cam_cpas_camnoc_qchannel cam520_cpas110_qchannel_info = {
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.qchannel_ctrl = 0x14,
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.qchannel_status = 0x18,
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};
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#endif /* _CPASTOP_V520_110_H_ */
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@ -138,6 +138,7 @@ enum cam_cpas_hw_version {
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CAM_CPAS_TITAN_580_V100 = 0x580100,
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CAM_CPAS_TITAN_540_V100 = 0x540100,
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CAM_CPAS_TITAN_520_V100 = 0x520100,
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CAM_CPAS_TITAN_520_V110 = 0x520110,
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CAM_CPAS_TITAN_545_V100 = 0x545100,
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CAM_CPAS_TITAN_545_V110 = 0x545110,
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CAM_CPAS_TITAN_570_V200 = 0x570200,
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