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ARC: Use correct PTAG register for icache flush

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This fixes a subtle issue with cache flush which could potentially cause
random userspace crashes because of stale icache lines.

This error crept in when consolidating the cache flush code

Fixes: bd12976c36 (ARC: cacheflush refactor #3: Unify the {d,i}cache)
Signed-off-by: Vineet Gupta <[email protected]>
Cc: [email protected]
Cc: [email protected]  # 3.13
Cc: [email protected]
Signed-off-by: Linus Torvalds <[email protected]>
This commit is contained in:
Vineet Gupta 2014-03-07 13:22:22 +05:30 • committed by Linus Torvalds
commit b053940df4
1 changed files with 2 additions and 2 deletions
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4
arch/arc/mm/cache_arc700.c
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@ -282,7 +282,7 @@ static inline void __cache_line_loop(unsigned long paddr, unsigned long vaddr,
#else
/* if V-P const for loop, PTAG can be written once outside loop */
if (full_page_op)
write_aux_reg(ARC_REG_DC_PTAG, paddr);
write_aux_reg(aux_tag, paddr);
#endif
while (num_lines-- > 0) {
@ -296,7 +296,7 @@ static inline void __cache_line_loop(unsigned long paddr, unsigned long vaddr,
write_aux_reg(aux_cmd, vaddr);
vaddr += L1_CACHE_BYTES;
#else
write_aux_reg(aux, paddr);
write_aux_reg(aux_cmd, paddr);
paddr += L1_CACHE_BYTES;
#endif
}