mirror of
https://github.com/BobTheBlinker/android_kernel_motorola_sm6375.git
synced 2026-10-29 19:21:31 -04:00
Merge branch 'linux-2.6'
This commit is contained in:
commit
b242a60206
356 changed files with 6866 additions and 9735 deletions
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@ -137,6 +137,71 @@ acpi_ds_build_internal_object(struct acpi_walk_state *walk_state,
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return_ACPI_STATUS(status);
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}
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}
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/* Special object resolution for elements of a package */
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if ((op->common.parent->common.aml_opcode == AML_PACKAGE_OP) ||
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(op->common.parent->common.aml_opcode ==
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AML_VAR_PACKAGE_OP)) {
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/*
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* Attempt to resolve the node to a value before we insert it into
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* the package. If this is a reference to a common data type,
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* resolve it immediately. According to the ACPI spec, package
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* elements can only be "data objects" or method references.
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* Attempt to resolve to an Integer, Buffer, String or Package.
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* If cannot, return the named reference (for things like Devices,
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* Methods, etc.) Buffer Fields and Fields will resolve to simple
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* objects (int/buf/str/pkg).
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*
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* NOTE: References to things like Devices, Methods, Mutexes, etc.
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* will remain as named references. This behavior is not described
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* in the ACPI spec, but it appears to be an oversight.
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*/
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obj_desc = (union acpi_operand_object *)op->common.node;
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status =
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acpi_ex_resolve_node_to_value(ACPI_CAST_INDIRECT_PTR
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(struct
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acpi_namespace_node,
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&obj_desc),
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walk_state);
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if (ACPI_FAILURE(status)) {
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return_ACPI_STATUS(status);
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}
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switch (op->common.node->type) {
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/*
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* For these types, we need the actual node, not the subobject.
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* However, the subobject got an extra reference count above.
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*/
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case ACPI_TYPE_MUTEX:
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case ACPI_TYPE_METHOD:
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case ACPI_TYPE_POWER:
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case ACPI_TYPE_PROCESSOR:
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case ACPI_TYPE_EVENT:
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case ACPI_TYPE_REGION:
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case ACPI_TYPE_DEVICE:
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case ACPI_TYPE_THERMAL:
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obj_desc =
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(union acpi_operand_object *)op->common.
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node;
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break;
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default:
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break;
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}
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/*
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* If above resolved to an operand object, we are done. Otherwise,
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* we have a NS node, we must create the package entry as a named
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* reference.
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*/
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if (ACPI_GET_DESCRIPTOR_TYPE(obj_desc) !=
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ACPI_DESC_TYPE_NAMED) {
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goto exit;
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}
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}
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}
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/* Create and init a new internal ACPI object */
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@ -156,6 +221,7 @@ acpi_ds_build_internal_object(struct acpi_walk_state *walk_state,
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return_ACPI_STATUS(status);
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}
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exit:
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*obj_desc_ptr = obj_desc;
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return_ACPI_STATUS(AE_OK);
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}
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@ -356,12 +422,25 @@ acpi_ds_build_internal_package_obj(struct acpi_walk_state *walk_state,
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arg = arg->common.next;
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for (i = 0; arg && (i < element_count); i++) {
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if (arg->common.aml_opcode == AML_INT_RETURN_VALUE_OP) {
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if (arg->common.node->type == ACPI_TYPE_METHOD) {
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/*
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* A method reference "looks" to the parser to be a method
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* invocation, so we special case it here
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*/
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arg->common.aml_opcode = AML_INT_NAMEPATH_OP;
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status =
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acpi_ds_build_internal_object(walk_state,
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arg,
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&obj_desc->
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package.
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elements[i]);
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} else {
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/* This package element is already built, just get it */
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/* This package element is already built, just get it */
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obj_desc->package.elements[i] =
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ACPI_CAST_PTR(union acpi_operand_object,
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arg->common.node);
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obj_desc->package.elements[i] =
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ACPI_CAST_PTR(union acpi_operand_object,
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arg->common.node);
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}
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} else {
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status = acpi_ds_build_internal_object(walk_state, arg,
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&obj_desc->
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|
|
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|||
|
|
@ -530,6 +530,11 @@ static void acpi_processor_idle(void)
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break;
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case ACPI_STATE_C3:
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/*
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||||
* Must be done before busmaster disable as we might
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* need to access HPET !
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*/
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acpi_state_timer_broadcast(pr, cx, 1);
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/*
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* disable bus master
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* bm_check implies we need ARB_DIS
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@ -557,7 +562,6 @@ static void acpi_processor_idle(void)
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/* Get start time (ticks) */
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t1 = inl(acpi_gbl_FADT.xpm_timer_block.address);
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/* Invoke C3 */
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acpi_state_timer_broadcast(pr, cx, 1);
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/* Tell the scheduler that we are going deep-idle: */
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sched_clock_idle_sleep_event();
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acpi_cstate_enter(cx);
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@ -1401,9 +1405,6 @@ static int acpi_idle_enter_simple(struct cpuidle_device *dev,
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if (acpi_idle_suspend)
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return(acpi_idle_enter_c1(dev, state));
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||||
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if (pr->flags.bm_check)
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acpi_idle_update_bm_rld(pr, cx);
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local_irq_disable();
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current_thread_info()->status &= ~TS_POLLING;
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/*
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@ -1418,13 +1419,21 @@ static int acpi_idle_enter_simple(struct cpuidle_device *dev,
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return 0;
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}
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/*
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* Must be done before busmaster disable as we might need to
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* access HPET !
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*/
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acpi_state_timer_broadcast(pr, cx, 1);
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if (pr->flags.bm_check)
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acpi_idle_update_bm_rld(pr, cx);
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|
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if (cx->type == ACPI_STATE_C3)
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ACPI_FLUSH_CPU_CACHE();
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t1 = inl(acpi_gbl_FADT.xpm_timer_block.address);
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/* Tell the scheduler that we are going deep-idle: */
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sched_clock_idle_sleep_event();
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acpi_state_timer_broadcast(pr, cx, 1);
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acpi_idle_do_entry(cx);
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t2 = inl(acpi_gbl_FADT.xpm_timer_block.address);
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||||
|
|
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|||
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@ -29,6 +29,7 @@
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|||
#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/init.h>
|
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#include <linux/sched.h>
|
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#include <linux/cpufreq.h>
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#include <linux/proc_fs.h>
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#include <linux/seq_file.h>
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@ -413,7 +414,7 @@ static int acpi_throttling_rdmsr(struct acpi_processor *pr,
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} else {
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msr_low = 0;
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msr_high = 0;
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rdmsr_on_cpu(cpu, MSR_IA32_THERM_CONTROL,
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rdmsr_safe(MSR_IA32_THERM_CONTROL,
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(u32 *)&msr_low , (u32 *) &msr_high);
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msr = (msr_high << 32) | msr_low;
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*value = (acpi_integer) msr;
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@ -438,7 +439,7 @@ static int acpi_throttling_wrmsr(struct acpi_processor *pr, acpi_integer value)
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"HARDWARE addr space,NOT supported yet\n");
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} else {
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msr = value;
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wrmsr_on_cpu(cpu, MSR_IA32_THERM_CONTROL,
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wrmsr_safe(MSR_IA32_THERM_CONTROL,
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||||
msr & 0xffffffff, msr >> 32);
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ret = 0;
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||||
}
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||||
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@ -572,21 +573,32 @@ static int acpi_processor_get_throttling_ptc(struct acpi_processor *pr)
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return -ENODEV;
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||||
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pr->throttling.state = 0;
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local_irq_disable();
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value = 0;
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ret = acpi_read_throttling_status(pr, &value);
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if (ret >= 0) {
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state = acpi_get_throttling_state(pr, value);
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pr->throttling.state = state;
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}
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local_irq_enable();
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return 0;
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}
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static int acpi_processor_get_throttling(struct acpi_processor *pr)
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{
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return pr->throttling.acpi_processor_get_throttling(pr);
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cpumask_t saved_mask;
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int ret;
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/*
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* Migrate task to the cpu pointed by pr.
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*/
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saved_mask = current->cpus_allowed;
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set_cpus_allowed(current, cpumask_of_cpu(pr->id));
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ret = pr->throttling.acpi_processor_get_throttling(pr);
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/* restore the previous state */
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set_cpus_allowed(current, saved_mask);
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return ret;
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}
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static int acpi_processor_get_fadt_info(struct acpi_processor *pr)
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@ -717,21 +729,29 @@ static int acpi_processor_set_throttling_ptc(struct acpi_processor *pr,
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if (state < pr->throttling_platform_limit)
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return -EPERM;
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||||
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local_irq_disable();
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value = 0;
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||||
ret = acpi_get_throttling_value(pr, state, &value);
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||||
if (ret >= 0) {
|
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acpi_write_throttling_state(pr, value);
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pr->throttling.state = state;
|
||||
}
|
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local_irq_enable();
|
||||
|
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return 0;
|
||||
}
|
||||
|
||||
int acpi_processor_set_throttling(struct acpi_processor *pr, int state)
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{
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||||
return pr->throttling.acpi_processor_set_throttling(pr, state);
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||||
cpumask_t saved_mask;
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||||
int ret;
|
||||
/*
|
||||
* Migrate task to the cpu pointed by pr.
|
||||
*/
|
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saved_mask = current->cpus_allowed;
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||||
set_cpus_allowed(current, cpumask_of_cpu(pr->id));
|
||||
ret = pr->throttling.acpi_processor_set_throttling(pr, state);
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/* restore the previous state */
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set_cpus_allowed(current, saved_mask);
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return ret;
|
||||
}
|
||||
|
||||
int acpi_processor_get_throttling_info(struct acpi_processor *pr)
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||||
|
|
|
|||
|
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@ -193,6 +193,8 @@ enum {
|
|||
ATA_FLAG_ACPI_SATA | ATA_FLAG_AN |
|
||||
ATA_FLAG_IPM,
|
||||
AHCI_LFLAG_COMMON = ATA_LFLAG_SKIP_D2H_BSY,
|
||||
|
||||
ICH_MAP = 0x90, /* ICH MAP register */
|
||||
};
|
||||
|
||||
struct ahci_cmd_hdr {
|
||||
|
|
@ -536,6 +538,10 @@ static const struct pci_device_id ahci_pci_tbl[] = {
|
|||
{ PCI_VDEVICE(NVIDIA, 0x0ad9), board_ahci }, /* MCP77 */
|
||||
{ PCI_VDEVICE(NVIDIA, 0x0ada), board_ahci }, /* MCP77 */
|
||||
{ PCI_VDEVICE(NVIDIA, 0x0adb), board_ahci }, /* MCP77 */
|
||||
{ PCI_VDEVICE(NVIDIA, 0x0ab4), board_ahci }, /* MCP79 */
|
||||
{ PCI_VDEVICE(NVIDIA, 0x0ab5), board_ahci }, /* MCP79 */
|
||||
{ PCI_VDEVICE(NVIDIA, 0x0ab6), board_ahci }, /* MCP79 */
|
||||
{ PCI_VDEVICE(NVIDIA, 0x0ab7), board_ahci }, /* MCP79 */
|
||||
{ PCI_VDEVICE(NVIDIA, 0x0ab8), board_ahci }, /* MCP79 */
|
||||
{ PCI_VDEVICE(NVIDIA, 0x0ab9), board_ahci }, /* MCP79 */
|
||||
{ PCI_VDEVICE(NVIDIA, 0x0aba), board_ahci }, /* MCP79 */
|
||||
|
|
@ -1267,9 +1273,9 @@ static int ahci_do_softreset(struct ata_link *link, unsigned int *class,
|
|||
|
||||
/* prepare for SRST (AHCI-1.1 10.4.1) */
|
||||
rc = ahci_kick_engine(ap, 1);
|
||||
if (rc)
|
||||
if (rc && rc != -EOPNOTSUPP)
|
||||
ata_link_printk(link, KERN_WARNING,
|
||||
"failed to reset engine (errno=%d)", rc);
|
||||
"failed to reset engine (errno=%d)\n", rc);
|
||||
|
||||
ata_tf_init(link->device, &tf);
|
||||
|
||||
|
|
@ -1634,7 +1640,7 @@ static void ahci_port_intr(struct ata_port *ap)
|
|||
struct ahci_host_priv *hpriv = ap->host->private_data;
|
||||
int resetting = !!(ap->pflags & ATA_PFLAG_RESETTING);
|
||||
u32 status, qc_active;
|
||||
int rc, known_irq = 0;
|
||||
int rc;
|
||||
|
||||
status = readl(port_mmio + PORT_IRQ_STAT);
|
||||
writel(status, port_mmio + PORT_IRQ_STAT);
|
||||
|
|
@ -1692,80 +1698,12 @@ static void ahci_port_intr(struct ata_port *ap)
|
|||
|
||||
rc = ata_qc_complete_multiple(ap, qc_active, NULL);
|
||||
|
||||
/* If resetting, spurious or invalid completions are expected,
|
||||
* return unconditionally.
|
||||
*/
|
||||
if (resetting)
|
||||
return;
|
||||
|
||||
if (rc > 0)
|
||||
return;
|
||||
if (rc < 0) {
|
||||
/* while resetting, invalid completions are expected */
|
||||
if (unlikely(rc < 0 && !resetting)) {
|
||||
ehi->err_mask |= AC_ERR_HSM;
|
||||
ehi->action |= ATA_EH_SOFTRESET;
|
||||
ata_port_freeze(ap);
|
||||
return;
|
||||
}
|
||||
|
||||
/* hmmm... a spurious interrupt */
|
||||
|
||||
/* if !NCQ, ignore. No modern ATA device has broken HSM
|
||||
* implementation for non-NCQ commands.
|
||||
*/
|
||||
if (!ap->link.sactive)
|
||||
return;
|
||||
|
||||
if (status & PORT_IRQ_D2H_REG_FIS) {
|
||||
if (!pp->ncq_saw_d2h)
|
||||
ata_port_printk(ap, KERN_INFO,
|
||||
"D2H reg with I during NCQ, "
|
||||
"this message won't be printed again\n");
|
||||
pp->ncq_saw_d2h = 1;
|
||||
known_irq = 1;
|
||||
}
|
||||
|
||||
if (status & PORT_IRQ_DMAS_FIS) {
|
||||
if (!pp->ncq_saw_dmas)
|
||||
ata_port_printk(ap, KERN_INFO,
|
||||
"DMAS FIS during NCQ, "
|
||||
"this message won't be printed again\n");
|
||||
pp->ncq_saw_dmas = 1;
|
||||
known_irq = 1;
|
||||
}
|
||||
|
||||
if (status & PORT_IRQ_SDB_FIS) {
|
||||
const __le32 *f = pp->rx_fis + RX_FIS_SDB;
|
||||
|
||||
if (le32_to_cpu(f[1])) {
|
||||
/* SDB FIS containing spurious completions
|
||||
* might be dangerous, whine and fail commands
|
||||
* with HSM violation. EH will turn off NCQ
|
||||
* after several such failures.
|
||||
*/
|
||||
ata_ehi_push_desc(ehi,
|
||||
"spurious completions during NCQ "
|
||||
"issue=0x%x SAct=0x%x FIS=%08x:%08x",
|
||||
readl(port_mmio + PORT_CMD_ISSUE),
|
||||
readl(port_mmio + PORT_SCR_ACT),
|
||||
le32_to_cpu(f[0]), le32_to_cpu(f[1]));
|
||||
ehi->err_mask |= AC_ERR_HSM;
|
||||
ehi->action |= ATA_EH_SOFTRESET;
|
||||
ata_port_freeze(ap);
|
||||
} else {
|
||||
if (!pp->ncq_saw_sdb)
|
||||
ata_port_printk(ap, KERN_INFO,
|
||||
"spurious SDB FIS %08x:%08x during NCQ, "
|
||||
"this message won't be printed again\n",
|
||||
le32_to_cpu(f[0]), le32_to_cpu(f[1]));
|
||||
pp->ncq_saw_sdb = 1;
|
||||
}
|
||||
known_irq = 1;
|
||||
}
|
||||
|
||||
if (!known_irq)
|
||||
ata_port_printk(ap, KERN_INFO, "spurious interrupt "
|
||||
"(irq_stat 0x%x active_tag 0x%x sactive 0x%x)\n",
|
||||
status, ap->link.active_tag, ap->link.sactive);
|
||||
}
|
||||
|
||||
static void ahci_irq_clear(struct ata_port *ap)
|
||||
|
|
@ -2269,6 +2207,22 @@ static int ahci_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
|
|||
if (rc)
|
||||
return rc;
|
||||
|
||||
if (pdev->vendor == PCI_VENDOR_ID_INTEL &&
|
||||
(pdev->device == 0x2652 || pdev->device == 0x2653)) {
|
||||
u8 map;
|
||||
|
||||
/* ICH6s share the same PCI ID for both piix and ahci
|
||||
* modes. Enabling ahci mode while MAP indicates
|
||||
* combined mode is a bad idea. Yield to ata_piix.
|
||||
*/
|
||||
pci_read_config_byte(pdev, ICH_MAP, &map);
|
||||
if (map & 0x3) {
|
||||
dev_printk(KERN_INFO, &pdev->dev, "controller is in "
|
||||
"combined mode, can't enable AHCI mode\n");
|
||||
return -ENODEV;
|
||||
}
|
||||
}
|
||||
|
||||
hpriv = devm_kzalloc(dev, sizeof(*hpriv), GFP_KERNEL);
|
||||
if (!hpriv)
|
||||
return -ENOMEM;
|
||||
|
|
|
|||
|
|
@ -966,6 +966,20 @@ static int piix_broken_suspend(void)
|
|||
DMI_MATCH(DMI_PRODUCT_NAME, "TECRA M3"),
|
||||
},
|
||||
},
|
||||
{
|
||||
.ident = "TECRA M3",
|
||||
.matches = {
|
||||
DMI_MATCH(DMI_SYS_VENDOR, "TOSHIBA"),
|
||||
DMI_MATCH(DMI_PRODUCT_NAME, "Tecra M3"),
|
||||
},
|
||||
},
|
||||
{
|
||||
.ident = "TECRA M4",
|
||||
.matches = {
|
||||
DMI_MATCH(DMI_SYS_VENDOR, "TOSHIBA"),
|
||||
DMI_MATCH(DMI_PRODUCT_NAME, "Tecra M4"),
|
||||
},
|
||||
},
|
||||
{
|
||||
.ident = "TECRA M5",
|
||||
.matches = {
|
||||
|
|
@ -980,6 +994,20 @@ static int piix_broken_suspend(void)
|
|||
DMI_MATCH(DMI_PRODUCT_NAME, "TECRA M7"),
|
||||
},
|
||||
},
|
||||
{
|
||||
.ident = "TECRA A8",
|
||||
.matches = {
|
||||
DMI_MATCH(DMI_SYS_VENDOR, "TOSHIBA"),
|
||||
DMI_MATCH(DMI_PRODUCT_NAME, "TECRA A8"),
|
||||
},
|
||||
},
|
||||
{
|
||||
.ident = "Satellite R25",
|
||||
.matches = {
|
||||
DMI_MATCH(DMI_SYS_VENDOR, "TOSHIBA"),
|
||||
DMI_MATCH(DMI_PRODUCT_NAME, "Satellite R25"),
|
||||
},
|
||||
},
|
||||
{
|
||||
.ident = "Satellite U200",
|
||||
.matches = {
|
||||
|
|
@ -987,6 +1015,13 @@ static int piix_broken_suspend(void)
|
|||
DMI_MATCH(DMI_PRODUCT_NAME, "Satellite U200"),
|
||||
},
|
||||
},
|
||||
{
|
||||
.ident = "Satellite U200",
|
||||
.matches = {
|
||||
DMI_MATCH(DMI_SYS_VENDOR, "TOSHIBA"),
|
||||
DMI_MATCH(DMI_PRODUCT_NAME, "SATELLITE U200"),
|
||||
},
|
||||
},
|
||||
{
|
||||
.ident = "Satellite Pro U200",
|
||||
.matches = {
|
||||
|
|
|
|||
|
|
@ -4140,6 +4140,7 @@ static const struct ata_blacklist_entry ata_device_blacklist [] = {
|
|||
/* Devices where NCQ should be avoided */
|
||||
/* NCQ is slow */
|
||||
{ "WDC WD740ADFD-00", NULL, ATA_HORKAGE_NONCQ },
|
||||
{ "WDC WD740ADFD-00NLR1", NULL, ATA_HORKAGE_NONCQ, },
|
||||
/* http://thread.gmane.org/gmane.linux.ide/14907 */
|
||||
{ "FUJITSU MHT2060BH", NULL, ATA_HORKAGE_NONCQ },
|
||||
/* NCQ is broken */
|
||||
|
|
@ -4154,23 +4155,6 @@ static const struct ata_blacklist_entry ata_device_blacklist [] = {
|
|||
{ "HTS541060G9SA00", "MB3OC60D", ATA_HORKAGE_NONCQ, },
|
||||
{ "HTS541080G9SA00", "MB4OC60D", ATA_HORKAGE_NONCQ, },
|
||||
{ "HTS541010G9SA00", "MBZOC60D", ATA_HORKAGE_NONCQ, },
|
||||
/* Drives which do spurious command completion */
|
||||
{ "HTS541680J9SA00", "SB2IC7EP", ATA_HORKAGE_NONCQ, },
|
||||
{ "HTS541612J9SA00", "SBDIC7JP", ATA_HORKAGE_NONCQ, },
|
||||
{ "HDT722516DLA380", "V43OA96A", ATA_HORKAGE_NONCQ, },
|
||||
{ "Hitachi HTS541616J9SA00", "SB4OC70P", ATA_HORKAGE_NONCQ, },
|
||||
{ "Hitachi HTS542525K9SA00", "BBFOC31P", ATA_HORKAGE_NONCQ, },
|
||||
{ "WDC WD740ADFD-00NLR1", NULL, ATA_HORKAGE_NONCQ, },
|
||||
{ "WDC WD3200AAJS-00RYA0", "12.01B01", ATA_HORKAGE_NONCQ, },
|
||||
{ "FUJITSU MHV2080BH", "00840028", ATA_HORKAGE_NONCQ, },
|
||||
{ "ST9120822AS", "3.CLF", ATA_HORKAGE_NONCQ, },
|
||||
{ "ST9160821AS", "3.CLF", ATA_HORKAGE_NONCQ, },
|
||||
{ "ST9160821AS", "3.ALD", ATA_HORKAGE_NONCQ, },
|
||||
{ "ST9160821AS", "3.CCD", ATA_HORKAGE_NONCQ, },
|
||||
{ "ST3160812AS", "3.ADJ", ATA_HORKAGE_NONCQ, },
|
||||
{ "ST980813AS", "3.ADB", ATA_HORKAGE_NONCQ, },
|
||||
{ "SAMSUNG HD401LJ", "ZZ100-15", ATA_HORKAGE_NONCQ, },
|
||||
{ "Maxtor 7V300F0", "VA111900", ATA_HORKAGE_NONCQ, },
|
||||
|
||||
/* devices which puke on READ_NATIVE_MAX */
|
||||
{ "HDS724040KLSA80", "KFAOA20N", ATA_HORKAGE_BROKEN_HPA, },
|
||||
|
|
@ -4185,6 +4169,9 @@ static const struct ata_blacklist_entry ata_device_blacklist [] = {
|
|||
/* Devices which get the IVB wrong */
|
||||
{ "QUANTUM FIREBALLlct10 05", "A03.0900", ATA_HORKAGE_IVB, },
|
||||
{ "TSSTcorp CDDVDW SH-S202J", "SB00", ATA_HORKAGE_IVB, },
|
||||
{ "TSSTcorp CDDVDW SH-S202J", "SB01", ATA_HORKAGE_IVB, },
|
||||
{ "TSSTcorp CDDVDW SH-S202N", "SB00", ATA_HORKAGE_IVB, },
|
||||
{ "TSSTcorp CDDVDW SH-S202N", "SB01", ATA_HORKAGE_IVB, },
|
||||
|
||||
/* End Marker */
|
||||
{ }
|
||||
|
|
@ -6964,12 +6951,11 @@ int ata_host_start(struct ata_host *host)
|
|||
if (ap->ops->port_start) {
|
||||
rc = ap->ops->port_start(ap);
|
||||
if (rc) {
|
||||
ata_port_printk(ap, KERN_ERR, "failed to "
|
||||
"start port (errno=%d)\n", rc);
|
||||
if (rc != -ENODEV)
|
||||
dev_printk(KERN_ERR, host->dev, "failed to start port %d (errno=%d)\n", i, rc);
|
||||
goto err_out;
|
||||
}
|
||||
}
|
||||
|
||||
ata_eh_freeze_port(ap);
|
||||
}
|
||||
|
||||
|
|
|
|||
|
|
@ -1850,30 +1850,54 @@ static void ata_eh_link_report(struct ata_link *link)
|
|||
ehc->i.serror & SERR_DEV_XCHG ? "DevExch " : "");
|
||||
|
||||
for (tag = 0; tag < ATA_MAX_QUEUE; tag++) {
|
||||
static const char *dma_str[] = {
|
||||
[DMA_BIDIRECTIONAL] = "bidi",
|
||||
[DMA_TO_DEVICE] = "out",
|
||||
[DMA_FROM_DEVICE] = "in",
|
||||
[DMA_NONE] = "",
|
||||
};
|
||||
struct ata_queued_cmd *qc = __ata_qc_from_tag(ap, tag);
|
||||
struct ata_taskfile *cmd = &qc->tf, *res = &qc->result_tf;
|
||||
const u8 *cdb = qc->cdb;
|
||||
char data_buf[20] = "";
|
||||
char cdb_buf[70] = "";
|
||||
|
||||
if (!(qc->flags & ATA_QCFLAG_FAILED) ||
|
||||
qc->dev->link != link || !qc->err_mask)
|
||||
continue;
|
||||
|
||||
if (qc->dma_dir != DMA_NONE) {
|
||||
static const char *dma_str[] = {
|
||||
[DMA_BIDIRECTIONAL] = "bidi",
|
||||
[DMA_TO_DEVICE] = "out",
|
||||
[DMA_FROM_DEVICE] = "in",
|
||||
};
|
||||
static const char *prot_str[] = {
|
||||
[ATA_PROT_PIO] = "pio",
|
||||
[ATA_PROT_DMA] = "dma",
|
||||
[ATA_PROT_NCQ] = "ncq",
|
||||
[ATA_PROT_ATAPI] = "pio",
|
||||
[ATA_PROT_ATAPI_DMA] = "dma",
|
||||
};
|
||||
|
||||
snprintf(data_buf, sizeof(data_buf), " %s %u %s",
|
||||
prot_str[qc->tf.protocol], qc->nbytes,
|
||||
dma_str[qc->dma_dir]);
|
||||
}
|
||||
|
||||
if (is_atapi_taskfile(&qc->tf))
|
||||
snprintf(cdb_buf, sizeof(cdb_buf),
|
||||
"cdb %02x %02x %02x %02x %02x %02x %02x %02x "
|
||||
"%02x %02x %02x %02x %02x %02x %02x %02x\n ",
|
||||
cdb[0], cdb[1], cdb[2], cdb[3],
|
||||
cdb[4], cdb[5], cdb[6], cdb[7],
|
||||
cdb[8], cdb[9], cdb[10], cdb[11],
|
||||
cdb[12], cdb[13], cdb[14], cdb[15]);
|
||||
|
||||
ata_dev_printk(qc->dev, KERN_ERR,
|
||||
"cmd %02x/%02x:%02x:%02x:%02x:%02x/%02x:%02x:%02x:%02x:%02x/%02x "
|
||||
"tag %d cdb 0x%x data %u %s\n "
|
||||
"tag %d%s\n %s"
|
||||
"res %02x/%02x:%02x:%02x:%02x:%02x/%02x:%02x:%02x:%02x:%02x/%02x "
|
||||
"Emask 0x%x (%s)%s\n",
|
||||
cmd->command, cmd->feature, cmd->nsect,
|
||||
cmd->lbal, cmd->lbam, cmd->lbah,
|
||||
cmd->hob_feature, cmd->hob_nsect,
|
||||
cmd->hob_lbal, cmd->hob_lbam, cmd->hob_lbah,
|
||||
cmd->device, qc->tag, qc->cdb[0], qc->nbytes,
|
||||
dma_str[qc->dma_dir],
|
||||
cmd->device, qc->tag, data_buf, cdb_buf,
|
||||
res->command, res->feature, res->nsect,
|
||||
res->lbal, res->lbam, res->lbah,
|
||||
res->hob_feature, res->hob_nsect,
|
||||
|
|
|
|||
|
|
@ -25,7 +25,7 @@
|
|||
#include <linux/libata.h>
|
||||
|
||||
#define DRV_NAME "pata_amd"
|
||||
#define DRV_VERSION "0.3.9"
|
||||
#define DRV_VERSION "0.3.10"
|
||||
|
||||
/**
|
||||
* timing_setup - shared timing computation and load
|
||||
|
|
@ -115,7 +115,8 @@ static void timing_setup(struct ata_port *ap, struct ata_device *adev, int offse
|
|||
}
|
||||
|
||||
/* UDMA timing */
|
||||
pci_write_config_byte(pdev, offset + 0x10 + (3 - dn), t);
|
||||
if (at.udma)
|
||||
pci_write_config_byte(pdev, offset + 0x10 + (3 - dn), t);
|
||||
}
|
||||
|
||||
/**
|
||||
|
|
|
|||
|
|
@ -28,7 +28,7 @@
|
|||
#include <asm/arch/smc.h>
|
||||
|
||||
#define DRV_NAME "pata_at32"
|
||||
#define DRV_VERSION "0.0.2"
|
||||
#define DRV_VERSION "0.0.3"
|
||||
|
||||
/*
|
||||
* CompactFlash controller memory layout relative to the base address:
|
||||
|
|
@ -64,6 +64,8 @@
|
|||
* Mode 2 | 8.3 | 240 ns | 0x07
|
||||
* Mode 3 | 11.1 | 180 ns | 0x0f
|
||||
* Mode 4 | 16.7 | 120 ns | 0x1f
|
||||
*
|
||||
* Alter PIO_MASK below according to table to set maximal PIO mode.
|
||||
*/
|
||||
#define PIO_MASK (0x1f)
|
||||
|
||||
|
|
@ -85,36 +87,40 @@ struct at32_ide_info {
|
|||
*/
|
||||
static int pata_at32_setup_timing(struct device *dev,
|
||||
struct at32_ide_info *info,
|
||||
const struct ata_timing *timing)
|
||||
const struct ata_timing *ata)
|
||||
{
|
||||
/* These two values are found through testing */
|
||||
const int min_recover = 25;
|
||||
const int ncs_hold = 15;
|
||||
|
||||
struct smc_config *smc = &info->smc;
|
||||
struct smc_timing timing;
|
||||
|
||||
int active;
|
||||
int recover;
|
||||
|
||||
memset(&timing, 0, sizeof(struct smc_timing));
|
||||
|
||||
/* Total cycle time */
|
||||
smc->read_cycle = timing->cyc8b;
|
||||
timing.read_cycle = ata->cyc8b;
|
||||
|
||||
/* DIOR <= CFIOR timings */
|
||||
smc->nrd_setup = timing->setup;
|
||||
smc->nrd_pulse = timing->act8b;
|
||||
timing.nrd_setup = ata->setup;
|
||||
timing.nrd_pulse = ata->act8b;
|
||||
timing.nrd_recover = ata->rec8b;
|
||||
|
||||
/* Compute recover, extend total cycle if needed */
|
||||
active = smc->nrd_setup + smc->nrd_pulse;
|
||||
/* Convert nanosecond timing to clock cycles */
|
||||
smc_set_timing(smc, &timing);
|
||||
|
||||
/* Add one extra cycle setup due to signal ring */
|
||||
smc->nrd_setup = smc->nrd_setup + 1;
|
||||
|
||||
active = smc->nrd_setup + smc->nrd_pulse;
|
||||
recover = smc->read_cycle - active;
|
||||
|
||||
if (recover < min_recover) {
|
||||
smc->read_cycle = active + min_recover;
|
||||
recover = min_recover;
|
||||
}
|
||||
/* Need at least two cycles recovery */
|
||||
if (recover < 2)
|
||||
smc->read_cycle = active + 2;
|
||||
|
||||
/* (CS0, CS1, DIR, OE) <= (CFCE1, CFCE2, CFRNW, NCSX) timings */
|
||||
smc->ncs_read_setup = 0;
|
||||
smc->ncs_read_pulse = active + ncs_hold;
|
||||
smc->ncs_read_setup = 1;
|
||||
smc->ncs_read_pulse = smc->read_cycle - 2;
|
||||
|
||||
/* Write timings same as read timings */
|
||||
smc->write_cycle = smc->read_cycle;
|
||||
|
|
@ -123,11 +129,13 @@ static int pata_at32_setup_timing(struct device *dev,
|
|||
smc->ncs_write_setup = smc->ncs_read_setup;
|
||||
smc->ncs_write_pulse = smc->ncs_read_pulse;
|
||||
|
||||
/* Do some debugging output */
|
||||
dev_dbg(dev, "SMC: C=%d S=%d P=%d R=%d NCSS=%d NCSP=%d NCSR=%d\n",
|
||||
/* Do some debugging output of ATA and SMC timings */
|
||||
dev_dbg(dev, "ATA: C=%d S=%d P=%d R=%d\n",
|
||||
ata->cyc8b, ata->setup, ata->act8b, ata->rec8b);
|
||||
|
||||
dev_dbg(dev, "SMC: C=%d S=%d P=%d NS=%d NP=%d\n",
|
||||
smc->read_cycle, smc->nrd_setup, smc->nrd_pulse,
|
||||
recover, smc->ncs_read_setup, smc->ncs_read_pulse,
|
||||
smc->read_cycle - smc->ncs_read_pulse);
|
||||
smc->ncs_read_setup, smc->ncs_read_pulse);
|
||||
|
||||
/* Finally, configure the SMC */
|
||||
return smc_set_configuration(info->cs, smc);
|
||||
|
|
@ -182,7 +190,6 @@ static struct scsi_host_template at32_sht = {
|
|||
};
|
||||
|
||||
static struct ata_port_operations at32_port_ops = {
|
||||
.port_disable = ata_port_disable,
|
||||
.set_piomode = pata_at32_set_piomode,
|
||||
.tf_load = ata_tf_load,
|
||||
.tf_read = ata_tf_read,
|
||||
|
|
@ -203,7 +210,6 @@ static struct ata_port_operations at32_port_ops = {
|
|||
|
||||
.irq_clear = pata_at32_irq_clear,
|
||||
.irq_on = ata_irq_on,
|
||||
.irq_ack = ata_irq_ack,
|
||||
|
||||
.port_start = ata_sff_port_start,
|
||||
};
|
||||
|
|
@ -223,8 +229,7 @@ static int __init pata_at32_init_one(struct device *dev,
|
|||
/* Setup ATA bindings */
|
||||
ap->ops = &at32_port_ops;
|
||||
ap->pio_mask = PIO_MASK;
|
||||
ap->flags = ATA_FLAG_MMIO | ATA_FLAG_SLAVE_POSS
|
||||
| ATA_FLAG_PIO_POLLING;
|
||||
ap->flags |= ATA_FLAG_MMIO | ATA_FLAG_SLAVE_POSS;
|
||||
|
||||
/*
|
||||
* Since all 8-bit taskfile transfers has to go on the lower
|
||||
|
|
@ -357,12 +362,12 @@ static int __init pata_at32_probe(struct platform_device *pdev)
|
|||
info->smc.tdf_mode = 0; /* TDF optimization disabled */
|
||||
info->smc.tdf_cycles = 0; /* No TDF wait cycles */
|
||||
|
||||
/* Setup ATA timing */
|
||||
/* Setup SMC to ATA timing */
|
||||
ret = pata_at32_setup_timing(dev, info, &initial_timing);
|
||||
if (ret)
|
||||
goto err_setup_timing;
|
||||
|
||||
/* Setup ATA addresses */
|
||||
/* Map ATA address space */
|
||||
ret = -ENOMEM;
|
||||
info->ide_addr = devm_ioremap(dev, info->res_ide.start, 16);
|
||||
info->alt_addr = devm_ioremap(dev, info->res_alt.start, 16);
|
||||
|
|
@ -373,7 +378,7 @@ static int __init pata_at32_probe(struct platform_device *pdev)
|
|||
pata_at32_debug_bus(dev, info);
|
||||
#endif
|
||||
|
||||
/* Register ATA device */
|
||||
/* Setup and register ATA device */
|
||||
ret = pata_at32_init_one(dev, info);
|
||||
if (ret)
|
||||
goto err_ata_device;
|
||||
|
|
|
|||
|
|
@ -1489,6 +1489,8 @@ static int __devinit bfin_atapi_probe(struct platform_device *pdev)
|
|||
int board_idx = 0;
|
||||
struct resource *res;
|
||||
struct ata_host *host;
|
||||
unsigned int fsclk = get_sclk();
|
||||
int udma_mode = 5;
|
||||
const struct ata_port_info *ppi[] =
|
||||
{ &bfin_port_info[board_idx], NULL };
|
||||
|
||||
|
|
@ -1507,6 +1509,11 @@ static int __devinit bfin_atapi_probe(struct platform_device *pdev)
|
|||
if (res == NULL)
|
||||
return -EINVAL;
|
||||
|
||||
while (bfin_port_info[board_idx].udma_mask>0 && udma_fsclk[udma_mode] > fsclk) {
|
||||
udma_mode--;
|
||||
bfin_port_info[board_idx].udma_mask >>= 1;
|
||||
}
|
||||
|
||||
/*
|
||||
* Now that that's out of the way, wire up the port..
|
||||
*/
|
||||
|
|
|
|||
|
|
@ -63,7 +63,7 @@
|
|||
#include <linux/dmi.h>
|
||||
|
||||
#define DRV_NAME "pata_via"
|
||||
#define DRV_VERSION "0.3.2"
|
||||
#define DRV_VERSION "0.3.3"
|
||||
|
||||
/*
|
||||
* The following comes directly from Vojtech Pavlik's ide/pci/via82cxxx
|
||||
|
|
@ -296,7 +296,7 @@ static void via_do_set_mode(struct ata_port *ap, struct ata_device *adev, int mo
|
|||
}
|
||||
|
||||
/* Set UDMA unless device is not UDMA capable */
|
||||
if (udma_type) {
|
||||
if (udma_type && t.udma) {
|
||||
u8 cable80_status;
|
||||
|
||||
/* Get 80-wire cable detection bit */
|
||||
|
|
|
|||
|
|
@ -164,10 +164,14 @@ enum {
|
|||
MV_PCI_ERR_ATTRIBUTE = 0x1d48,
|
||||
MV_PCI_ERR_COMMAND = 0x1d50,
|
||||
|
||||
PCI_IRQ_CAUSE_OFS = 0x1d58,
|
||||
PCI_IRQ_MASK_OFS = 0x1d5c,
|
||||
PCI_IRQ_CAUSE_OFS = 0x1d58,
|
||||
PCI_IRQ_MASK_OFS = 0x1d5c,
|
||||
PCI_UNMASK_ALL_IRQS = 0x7fffff, /* bits 22-0 */
|
||||
|
||||
PCIE_IRQ_CAUSE_OFS = 0x1900,
|
||||
PCIE_IRQ_MASK_OFS = 0x1910,
|
||||
PCIE_UNMASK_ALL_IRQS = 0x70a, /* assorted bits */
|
||||
|
||||
HC_MAIN_IRQ_CAUSE_OFS = 0x1d60,
|
||||
HC_MAIN_IRQ_MASK_OFS = 0x1d64,
|
||||
PORT0_ERR = (1 << 0), /* shift by port # */
|
||||
|
|
@ -303,6 +307,7 @@ enum {
|
|||
MV_HP_GEN_I = (1 << 6), /* Generation I: 50xx */
|
||||
MV_HP_GEN_II = (1 << 7), /* Generation II: 60xx */
|
||||
MV_HP_GEN_IIE = (1 << 8), /* Generation IIE: 6042/7042 */
|
||||
MV_HP_PCIE = (1 << 9), /* PCIe bus/regs: 7042 */
|
||||
|
||||
/* Port private flags (pp_flags) */
|
||||
MV_PP_FLAG_EDMA_EN = (1 << 0), /* is EDMA engine enabled? */
|
||||
|
|
@ -388,7 +393,15 @@ struct mv_port_signal {
|
|||
u32 pre;
|
||||
};
|
||||
|
||||
struct mv_host_priv;
|
||||
struct mv_host_priv {
|
||||
u32 hp_flags;
|
||||
struct mv_port_signal signal[8];
|
||||
const struct mv_hw_ops *ops;
|
||||
u32 irq_cause_ofs;
|
||||
u32 irq_mask_ofs;
|
||||
u32 unmask_all_irqs;
|
||||
};
|
||||
|
||||
struct mv_hw_ops {
|
||||
void (*phy_errata)(struct mv_host_priv *hpriv, void __iomem *mmio,
|
||||
unsigned int port);
|
||||
|
|
@ -401,12 +414,6 @@ struct mv_hw_ops {
|
|||
void (*reset_bus)(struct pci_dev *pdev, void __iomem *mmio);
|
||||
};
|
||||
|
||||
struct mv_host_priv {
|
||||
u32 hp_flags;
|
||||
struct mv_port_signal signal[8];
|
||||
const struct mv_hw_ops *ops;
|
||||
};
|
||||
|
||||
static void mv_irq_clear(struct ata_port *ap);
|
||||
static int mv_scr_read(struct ata_port *ap, unsigned int sc_reg_in, u32 *val);
|
||||
static int mv_scr_write(struct ata_port *ap, unsigned int sc_reg_in, u32 val);
|
||||
|
|
@ -631,11 +638,13 @@ static const struct pci_device_id mv_pci_tbl[] = {
|
|||
/* Adaptec 1430SA */
|
||||
{ PCI_VDEVICE(ADAPTEC2, 0x0243), chip_7042 },
|
||||
|
||||
{ PCI_VDEVICE(TTI, 0x2310), chip_7042 },
|
||||
|
||||
/* add Marvell 7042 support */
|
||||
/* Marvell 7042 support */
|
||||
{ PCI_VDEVICE(MARVELL, 0x7042), chip_7042 },
|
||||
|
||||
/* Highpoint RocketRAID PCIe series */
|
||||
{ PCI_VDEVICE(TTI, 0x2300), chip_7042 },
|
||||
{ PCI_VDEVICE(TTI, 0x2310), chip_7042 },
|
||||
|
||||
{ } /* terminate list */
|
||||
};
|
||||
|
||||
|
|
@ -1648,13 +1657,14 @@ static void mv_host_intr(struct ata_host *host, u32 relevant, unsigned int hc)
|
|||
|
||||
static void mv_pci_error(struct ata_host *host, void __iomem *mmio)
|
||||
{
|
||||
struct mv_host_priv *hpriv = host->private_data;
|
||||
struct ata_port *ap;
|
||||
struct ata_queued_cmd *qc;
|
||||
struct ata_eh_info *ehi;
|
||||
unsigned int i, err_mask, printed = 0;
|
||||
u32 err_cause;
|
||||
|
||||
err_cause = readl(mmio + PCI_IRQ_CAUSE_OFS);
|
||||
err_cause = readl(mmio + hpriv->irq_cause_ofs);
|
||||
|
||||
dev_printk(KERN_ERR, host->dev, "PCI ERROR; PCI IRQ cause=0x%08x\n",
|
||||
err_cause);
|
||||
|
|
@ -1662,7 +1672,7 @@ static void mv_pci_error(struct ata_host *host, void __iomem *mmio)
|
|||
DPRINTK("All regs @ PCI error\n");
|
||||
mv_dump_all_regs(mmio, -1, to_pci_dev(host->dev));
|
||||
|
||||
writelfl(0, mmio + PCI_IRQ_CAUSE_OFS);
|
||||
writelfl(0, mmio + hpriv->irq_cause_ofs);
|
||||
|
||||
for (i = 0; i < host->n_ports; i++) {
|
||||
ap = host->ports[i];
|
||||
|
|
@ -1926,6 +1936,8 @@ static int mv5_reset_hc(struct mv_host_priv *hpriv, void __iomem *mmio,
|
|||
#define ZERO(reg) writel(0, mmio + (reg))
|
||||
static void mv_reset_pci_bus(struct pci_dev *pdev, void __iomem *mmio)
|
||||
{
|
||||
struct ata_host *host = dev_get_drvdata(&pdev->dev);
|
||||
struct mv_host_priv *hpriv = host->private_data;
|
||||
u32 tmp;
|
||||
|
||||
tmp = readl(mmio + MV_PCI_MODE);
|
||||
|
|
@ -1937,8 +1949,8 @@ static void mv_reset_pci_bus(struct pci_dev *pdev, void __iomem *mmio)
|
|||
writel(0x000100ff, mmio + MV_PCI_XBAR_TMOUT);
|
||||
ZERO(HC_MAIN_IRQ_MASK_OFS);
|
||||
ZERO(MV_PCI_SERR_MASK);
|
||||
ZERO(PCI_IRQ_CAUSE_OFS);
|
||||
ZERO(PCI_IRQ_MASK_OFS);
|
||||
ZERO(hpriv->irq_cause_ofs);
|
||||
ZERO(hpriv->irq_mask_ofs);
|
||||
ZERO(MV_PCI_ERR_LOW_ADDRESS);
|
||||
ZERO(MV_PCI_ERR_HIGH_ADDRESS);
|
||||
ZERO(MV_PCI_ERR_ATTRIBUTE);
|
||||
|
|
@ -2170,7 +2182,7 @@ static void mv_phy_reset(struct ata_port *ap, unsigned int *class,
|
|||
mv_scr_read(ap, SCR_ERROR, &serror);
|
||||
mv_scr_read(ap, SCR_CONTROL, &scontrol);
|
||||
DPRINTK("S-regs after ATA_RST: SStat 0x%08x SErr 0x%08x "
|
||||
"SCtrl 0x%08x\n", status, serror, scontrol);
|
||||
"SCtrl 0x%08x\n", sstatus, serror, scontrol);
|
||||
}
|
||||
#endif
|
||||
|
||||
|
|
@ -2490,6 +2502,16 @@ static int mv_chip_id(struct ata_host *host, unsigned int board_idx)
|
|||
break;
|
||||
|
||||
case chip_7042:
|
||||
hp_flags |= MV_HP_PCIE;
|
||||
if (pdev->vendor == PCI_VENDOR_ID_TTI &&
|
||||
(pdev->device == 0x2300 || pdev->device == 0x2310))
|
||||
{
|
||||
printk(KERN_WARNING "sata_mv: Highpoint RocketRAID BIOS"
|
||||
" will CORRUPT DATA on attached drives when"
|
||||
" configured as \"Legacy\". BEWARE!\n");
|
||||
printk(KERN_WARNING "sata_mv: Use BIOS \"JBOD\" volumes"
|
||||
" instead for safety.\n");
|
||||
}
|
||||
case chip_6042:
|
||||
hpriv->ops = &mv6xxx_ops;
|
||||
hp_flags |= MV_HP_GEN_IIE;
|
||||
|
|
@ -2516,6 +2538,15 @@ static int mv_chip_id(struct ata_host *host, unsigned int board_idx)
|
|||
}
|
||||
|
||||
hpriv->hp_flags = hp_flags;
|
||||
if (hp_flags & MV_HP_PCIE) {
|
||||
hpriv->irq_cause_ofs = PCIE_IRQ_CAUSE_OFS;
|
||||
hpriv->irq_mask_ofs = PCIE_IRQ_MASK_OFS;
|
||||
hpriv->unmask_all_irqs = PCIE_UNMASK_ALL_IRQS;
|
||||
} else {
|
||||
hpriv->irq_cause_ofs = PCI_IRQ_CAUSE_OFS;
|
||||
hpriv->irq_mask_ofs = PCI_IRQ_MASK_OFS;
|
||||
hpriv->unmask_all_irqs = PCI_UNMASK_ALL_IRQS;
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
|
@ -2595,10 +2626,10 @@ static int mv_init_host(struct ata_host *host, unsigned int board_idx)
|
|||
}
|
||||
|
||||
/* Clear any currently outstanding host interrupt conditions */
|
||||
writelfl(0, mmio + PCI_IRQ_CAUSE_OFS);
|
||||
writelfl(0, mmio + hpriv->irq_cause_ofs);
|
||||
|
||||
/* and unmask interrupt generation for host regs */
|
||||
writelfl(PCI_UNMASK_ALL_IRQS, mmio + PCI_IRQ_MASK_OFS);
|
||||
writelfl(hpriv->unmask_all_irqs, mmio + hpriv->irq_mask_ofs);
|
||||
|
||||
if (IS_GEN_I(hpriv))
|
||||
writelfl(~HC_MAIN_MASKED_IRQS_5, mmio + HC_MAIN_IRQ_MASK_OFS);
|
||||
|
|
@ -2609,8 +2640,8 @@ static int mv_init_host(struct ata_host *host, unsigned int board_idx)
|
|||
"PCI int cause/mask=0x%08x/0x%08x\n",
|
||||
readl(mmio + HC_MAIN_IRQ_CAUSE_OFS),
|
||||
readl(mmio + HC_MAIN_IRQ_MASK_OFS),
|
||||
readl(mmio + PCI_IRQ_CAUSE_OFS),
|
||||
readl(mmio + PCI_IRQ_MASK_OFS));
|
||||
readl(mmio + hpriv->irq_cause_ofs),
|
||||
readl(mmio + hpriv->irq_mask_ofs));
|
||||
|
||||
done:
|
||||
return rc;
|
||||
|
|
|
|||
|
|
@ -791,11 +791,13 @@ static int nv_adma_check_atapi_dma(struct ata_queued_cmd *qc)
|
|||
|
||||
static void nv_adma_tf_read(struct ata_port *ap, struct ata_taskfile *tf)
|
||||
{
|
||||
/* Since commands where a result TF is requested are not
|
||||
executed in ADMA mode, the only time this function will be called
|
||||
in ADMA mode will be if a command fails. In this case we
|
||||
don't care about going into register mode with ADMA commands
|
||||
pending, as the commands will all shortly be aborted anyway. */
|
||||
/* Other than when internal or pass-through commands are executed,
|
||||
the only time this function will be called in ADMA mode will be
|
||||
if a command fails. In the failure case we don't care about going
|
||||
into register mode with ADMA commands pending, as the commands will
|
||||
all shortly be aborted anyway. We assume that NCQ commands are not
|
||||
issued via passthrough, which is the only way that switching into
|
||||
ADMA mode could abort outstanding commands. */
|
||||
nv_adma_register_mode(ap);
|
||||
|
||||
ata_tf_read(ap, tf);
|
||||
|
|
@ -1359,11 +1361,9 @@ static int nv_adma_use_reg_mode(struct ata_queued_cmd *qc)
|
|||
struct nv_adma_port_priv *pp = qc->ap->private_data;
|
||||
|
||||
/* ADMA engine can only be used for non-ATAPI DMA commands,
|
||||
or interrupt-driven no-data commands, where a result taskfile
|
||||
is not required. */
|
||||
or interrupt-driven no-data commands. */
|
||||
if ((pp->flags & NV_ADMA_ATAPI_SETUP_COMPLETE) ||
|
||||
(qc->tf.flags & ATA_TFLAG_POLLING) ||
|
||||
(qc->flags & ATA_QCFLAG_RESULT_TF))
|
||||
(qc->tf.flags & ATA_TFLAG_POLLING))
|
||||
return 1;
|
||||
|
||||
if ((qc->flags & ATA_QCFLAG_DMAMAP) ||
|
||||
|
|
@ -1381,6 +1381,8 @@ static void nv_adma_qc_prep(struct ata_queued_cmd *qc)
|
|||
NV_CPB_CTL_IEN;
|
||||
|
||||
if (nv_adma_use_reg_mode(qc)) {
|
||||
BUG_ON(!(pp->flags & NV_ADMA_ATAPI_SETUP_COMPLETE) &&
|
||||
(qc->flags & ATA_QCFLAG_DMAMAP));
|
||||
nv_adma_register_mode(qc->ap);
|
||||
ata_qc_prep(qc);
|
||||
return;
|
||||
|
|
@ -1425,9 +1427,21 @@ static unsigned int nv_adma_qc_issue(struct ata_queued_cmd *qc)
|
|||
|
||||
VPRINTK("ENTER\n");
|
||||
|
||||
/* We can't handle result taskfile with NCQ commands, since
|
||||
retrieving the taskfile switches us out of ADMA mode and would abort
|
||||
existing commands. */
|
||||
if (unlikely(qc->tf.protocol == ATA_PROT_NCQ &&
|
||||
(qc->flags & ATA_QCFLAG_RESULT_TF))) {
|
||||
ata_dev_printk(qc->dev, KERN_ERR,
|
||||
"NCQ w/ RESULT_TF not allowed\n");
|
||||
return AC_ERR_SYSTEM;
|
||||
}
|
||||
|
||||
if (nv_adma_use_reg_mode(qc)) {
|
||||
/* use ATA register mode */
|
||||
VPRINTK("using ATA register mode: 0x%lx\n", qc->flags);
|
||||
BUG_ON(!(pp->flags & NV_ADMA_ATAPI_SETUP_COMPLETE) &&
|
||||
(qc->flags & ATA_QCFLAG_DMAMAP));
|
||||
nv_adma_register_mode(qc->ap);
|
||||
return ata_qc_issue_prot(qc);
|
||||
} else
|
||||
|
|
|
|||
|
|
@ -295,7 +295,6 @@ static int
|
|||
apm_ioctl(struct inode * inode, struct file *filp, u_int cmd, u_long arg)
|
||||
{
|
||||
struct apm_user *as = filp->private_data;
|
||||
unsigned long flags;
|
||||
int err = -EINVAL;
|
||||
|
||||
if (!as->suser || !as->writer)
|
||||
|
|
@ -331,10 +330,16 @@ apm_ioctl(struct inode * inode, struct file *filp, u_int cmd, u_long arg)
|
|||
* Wait for the suspend/resume to complete. If there
|
||||
* are pending acknowledges, we wait here for them.
|
||||
*/
|
||||
flags = current->flags;
|
||||
freezer_do_not_count();
|
||||
|
||||
wait_event(apm_suspend_waitqueue,
|
||||
as->suspend_state == SUSPEND_DONE);
|
||||
|
||||
/*
|
||||
* Since we are waiting until the suspend is done, the
|
||||
* try_to_freeze() in freezer_count() will not trigger
|
||||
*/
|
||||
freezer_count();
|
||||
} else {
|
||||
as->suspend_state = SUSPEND_WAIT;
|
||||
mutex_unlock(&state_lock);
|
||||
|
|
@ -362,14 +367,10 @@ apm_ioctl(struct inode * inode, struct file *filp, u_int cmd, u_long arg)
|
|||
* Wait for the suspend/resume to complete. If there
|
||||
* are pending acknowledges, we wait here for them.
|
||||
*/
|
||||
flags = current->flags;
|
||||
|
||||
wait_event_interruptible(apm_suspend_waitqueue,
|
||||
wait_event_freezable(apm_suspend_waitqueue,
|
||||
as->suspend_state == SUSPEND_DONE);
|
||||
}
|
||||
|
||||
current->flags = flags;
|
||||
|
||||
mutex_lock(&state_lock);
|
||||
err = as->suspend_result;
|
||||
as->suspend_state = SUSPEND_NONE;
|
||||
|
|
|
|||
|
|
@ -104,6 +104,11 @@ static ssize_t cs5535_gpio_write(struct file *file, const char __user *data,
|
|||
for (j = 0; j < ARRAY_SIZE(rm); j++) {
|
||||
if (c == rm[j].on) {
|
||||
outl(m1, base + rm[j].wr_offset);
|
||||
/* If enabling output, turn off AUX 1 and AUX 2 */
|
||||
if (c == 'O') {
|
||||
outl(m0, base + 0x10);
|
||||
outl(m0, base + 0x14);
|
||||
}
|
||||
break;
|
||||
} else if (c == rm[j].off) {
|
||||
outl(m0, base + rm[j].wr_offset);
|
||||
|
|
|
|||
|
|
@ -12,7 +12,7 @@ if CRYPTO_HW
|
|||
|
||||
config CRYPTO_DEV_PADLOCK
|
||||
tristate "Support for VIA PadLock ACE"
|
||||
depends on X86_32
|
||||
depends on X86_32 && !UML
|
||||
select CRYPTO_ALGAPI
|
||||
help
|
||||
Some VIA processors come with an integrated crypto engine
|
||||
|
|
|
|||
|
|
@ -337,11 +337,10 @@ static int coretemp_cpu_callback(struct notifier_block *nfb,
|
|||
|
||||
switch (action) {
|
||||
case CPU_ONLINE:
|
||||
case CPU_ONLINE_FROZEN:
|
||||
case CPU_DOWN_FAILED:
|
||||
coretemp_device_add(cpu);
|
||||
break;
|
||||
case CPU_DEAD:
|
||||
case CPU_DEAD_FROZEN:
|
||||
case CPU_DOWN_PREPARE:
|
||||
coretemp_device_remove(cpu);
|
||||
break;
|
||||
}
|
||||
|
|
|
|||
|
|
@ -267,13 +267,12 @@ static int ads7846_read12_ser(struct device *dev, unsigned command)
|
|||
ts->irq_disabled = 0;
|
||||
enable_irq(spi->irq);
|
||||
|
||||
if (req->msg.status)
|
||||
status = req->msg.status;
|
||||
|
||||
/* on-wire is a must-ignore bit, a BE12 value, then padding */
|
||||
sample = be16_to_cpu(req->sample);
|
||||
sample = sample >> 3;
|
||||
sample &= 0x0fff;
|
||||
if (status == 0) {
|
||||
/* on-wire is a must-ignore bit, a BE12 value, then padding */
|
||||
sample = be16_to_cpu(req->sample);
|
||||
sample = sample >> 3;
|
||||
sample &= 0x0fff;
|
||||
}
|
||||
|
||||
kfree(req);
|
||||
return status ? status : sample;
|
||||
|
|
|
|||
|
|
@ -1515,6 +1515,7 @@ isdn_ioctl(struct inode *inode, struct file *file, uint cmd, ulong arg)
|
|||
if (copy_from_user(&iocts, argp,
|
||||
sizeof(isdn_ioctl_struct)))
|
||||
return -EFAULT;
|
||||
iocts.drvid[sizeof(iocts.drvid)-1] = 0;
|
||||
if (strlen(iocts.drvid)) {
|
||||
if ((p = strchr(iocts.drvid, ',')))
|
||||
*p = 0;
|
||||
|
|
@ -1599,6 +1600,7 @@ isdn_ioctl(struct inode *inode, struct file *file, uint cmd, ulong arg)
|
|||
if (copy_from_user(&iocts, argp,
|
||||
sizeof(isdn_ioctl_struct)))
|
||||
return -EFAULT;
|
||||
iocts.drvid[sizeof(iocts.drvid)-1] = 0;
|
||||
if (strlen(iocts.drvid)) {
|
||||
drvidx = -1;
|
||||
for (i = 0; i < ISDN_MAX_DRIVERS; i++)
|
||||
|
|
@ -1643,7 +1645,7 @@ isdn_ioctl(struct inode *inode, struct file *file, uint cmd, ulong arg)
|
|||
} else {
|
||||
p = (char __user *) iocts.arg;
|
||||
for (i = 0; i < 10; i++) {
|
||||
sprintf(bname, "%s%s",
|
||||
snprintf(bname, sizeof(bname), "%s%s",
|
||||
strlen(dev->drv[drvidx]->msn2eaz[i]) ?
|
||||
dev->drv[drvidx]->msn2eaz[i] : "_",
|
||||
(i < 9) ? "," : "\0");
|
||||
|
|
@ -1673,6 +1675,7 @@ isdn_ioctl(struct inode *inode, struct file *file, uint cmd, ulong arg)
|
|||
char *p;
|
||||
if (copy_from_user(&iocts, argp, sizeof(isdn_ioctl_struct)))
|
||||
return -EFAULT;
|
||||
iocts.drvid[sizeof(iocts.drvid)-1] = 0;
|
||||
if (strlen(iocts.drvid)) {
|
||||
if ((p = strchr(iocts.drvid, ',')))
|
||||
*p = 0;
|
||||
|
|
|
|||
|
|
@ -111,7 +111,7 @@ int led_classdev_register(struct device *parent, struct led_classdev *led_cdev)
|
|||
write_unlock(&leds_list_lock);
|
||||
|
||||
#ifdef CONFIG_LEDS_TRIGGERS
|
||||
rwlock_init(&led_cdev->trigger_lock);
|
||||
init_rwsem(&led_cdev->trigger_lock);
|
||||
|
||||
rc = device_create_file(led_cdev->dev, &dev_attr_trigger);
|
||||
if (rc)
|
||||
|
|
@ -147,10 +147,10 @@ void led_classdev_unregister(struct led_classdev *led_cdev)
|
|||
device_remove_file(led_cdev->dev, &dev_attr_brightness);
|
||||
#ifdef CONFIG_LEDS_TRIGGERS
|
||||
device_remove_file(led_cdev->dev, &dev_attr_trigger);
|
||||
write_lock(&led_cdev->trigger_lock);
|
||||
down_write(&led_cdev->trigger_lock);
|
||||
if (led_cdev->trigger)
|
||||
led_trigger_set(led_cdev, NULL);
|
||||
write_unlock(&led_cdev->trigger_lock);
|
||||
up_write(&led_cdev->trigger_lock);
|
||||
#endif
|
||||
|
||||
device_unregister(led_cdev->dev);
|
||||
|
|
|
|||
|
|
@ -19,13 +19,14 @@
|
|||
#include <linux/device.h>
|
||||
#include <linux/sysdev.h>
|
||||
#include <linux/timer.h>
|
||||
#include <linux/rwsem.h>
|
||||
#include <linux/leds.h>
|
||||
#include "leds.h"
|
||||
|
||||
/*
|
||||
* Nests outside led_cdev->trigger_lock
|
||||
*/
|
||||
static DEFINE_RWLOCK(triggers_list_lock);
|
||||
static DECLARE_RWSEM(triggers_list_lock);
|
||||
static LIST_HEAD(trigger_list);
|
||||
|
||||
ssize_t led_trigger_store(struct device *dev, struct device_attribute *attr,
|
||||
|
|
@ -44,24 +45,24 @@ ssize_t led_trigger_store(struct device *dev, struct device_attribute *attr,
|
|||
trigger_name[len - 1] = '\0';
|
||||
|
||||
if (!strcmp(trigger_name, "none")) {
|
||||
write_lock(&led_cdev->trigger_lock);
|
||||
down_write(&led_cdev->trigger_lock);
|
||||
led_trigger_set(led_cdev, NULL);
|
||||
write_unlock(&led_cdev->trigger_lock);
|
||||
up_write(&led_cdev->trigger_lock);
|
||||
return count;
|
||||
}
|
||||
|
||||
read_lock(&triggers_list_lock);
|
||||
down_read(&triggers_list_lock);
|
||||
list_for_each_entry(trig, &trigger_list, next_trig) {
|
||||
if (!strcmp(trigger_name, trig->name)) {
|
||||
write_lock(&led_cdev->trigger_lock);
|
||||
down_write(&led_cdev->trigger_lock);
|
||||
led_trigger_set(led_cdev, trig);
|
||||
write_unlock(&led_cdev->trigger_lock);
|
||||
up_write(&led_cdev->trigger_lock);
|
||||
|
||||
read_unlock(&triggers_list_lock);
|
||||
up_read(&triggers_list_lock);
|
||||
return count;
|
||||
}
|
||||
}
|
||||
read_unlock(&triggers_list_lock);
|
||||
up_read(&triggers_list_lock);
|
||||
|
||||
return -EINVAL;
|
||||
}
|
||||
|
|
@ -74,8 +75,8 @@ ssize_t led_trigger_show(struct device *dev, struct device_attribute *attr,
|
|||
struct led_trigger *trig;
|
||||
int len = 0;
|
||||
|
||||
read_lock(&triggers_list_lock);
|
||||
read_lock(&led_cdev->trigger_lock);
|
||||
down_read(&triggers_list_lock);
|
||||
down_read(&led_cdev->trigger_lock);
|
||||
|
||||
if (!led_cdev->trigger)
|
||||
len += sprintf(buf+len, "[none] ");
|
||||
|
|
@ -89,8 +90,8 @@ ssize_t led_trigger_show(struct device *dev, struct device_attribute *attr,
|
|||
else
|
||||
len += sprintf(buf+len, "%s ", trig->name);
|
||||
}
|
||||
read_unlock(&led_cdev->trigger_lock);
|
||||
read_unlock(&triggers_list_lock);
|
||||
up_read(&led_cdev->trigger_lock);
|
||||
up_read(&triggers_list_lock);
|
||||
|
||||
len += sprintf(len+buf, "\n");
|
||||
return len;
|
||||
|
|
@ -145,14 +146,14 @@ void led_trigger_set_default(struct led_classdev *led_cdev)
|
|||
if (!led_cdev->default_trigger)
|
||||
return;
|
||||
|
||||
read_lock(&triggers_list_lock);
|
||||
write_lock(&led_cdev->trigger_lock);
|
||||
down_read(&triggers_list_lock);
|
||||
down_write(&led_cdev->trigger_lock);
|
||||
list_for_each_entry(trig, &trigger_list, next_trig) {
|
||||
if (!strcmp(led_cdev->default_trigger, trig->name))
|
||||
led_trigger_set(led_cdev, trig);
|
||||
}
|
||||
write_unlock(&led_cdev->trigger_lock);
|
||||
read_unlock(&triggers_list_lock);
|
||||
up_write(&led_cdev->trigger_lock);
|
||||
up_read(&triggers_list_lock);
|
||||
}
|
||||
|
||||
int led_trigger_register(struct led_trigger *trigger)
|
||||
|
|
@ -163,18 +164,18 @@ int led_trigger_register(struct led_trigger *trigger)
|
|||
INIT_LIST_HEAD(&trigger->led_cdevs);
|
||||
|
||||
/* Add to the list of led triggers */
|
||||
write_lock(&triggers_list_lock);
|
||||
down_write(&triggers_list_lock);
|
||||
list_add_tail(&trigger->next_trig, &trigger_list);
|
||||
write_unlock(&triggers_list_lock);
|
||||
up_write(&triggers_list_lock);
|
||||
|
||||
/* Register with any LEDs that have this as a default trigger */
|
||||
read_lock(&leds_list_lock);
|
||||
list_for_each_entry(led_cdev, &leds_list, node) {
|
||||
write_lock(&led_cdev->trigger_lock);
|
||||
down_write(&led_cdev->trigger_lock);
|
||||
if (!led_cdev->trigger && led_cdev->default_trigger &&
|
||||
!strcmp(led_cdev->default_trigger, trigger->name))
|
||||
led_trigger_set(led_cdev, trigger);
|
||||
write_unlock(&led_cdev->trigger_lock);
|
||||
up_write(&led_cdev->trigger_lock);
|
||||
}
|
||||
read_unlock(&leds_list_lock);
|
||||
|
||||
|
|
@ -206,17 +207,17 @@ void led_trigger_unregister(struct led_trigger *trigger)
|
|||
struct led_classdev *led_cdev;
|
||||
|
||||
/* Remove from the list of led triggers */
|
||||
write_lock(&triggers_list_lock);
|
||||
down_write(&triggers_list_lock);
|
||||
list_del(&trigger->next_trig);
|
||||
write_unlock(&triggers_list_lock);
|
||||
up_write(&triggers_list_lock);
|
||||
|
||||
/* Remove anyone actively using this trigger */
|
||||
read_lock(&leds_list_lock);
|
||||
list_for_each_entry(led_cdev, &leds_list, node) {
|
||||
write_lock(&led_cdev->trigger_lock);
|
||||
down_write(&led_cdev->trigger_lock);
|
||||
if (led_cdev->trigger == trigger)
|
||||
led_trigger_set(led_cdev, NULL);
|
||||
write_unlock(&led_cdev->trigger_lock);
|
||||
up_write(&led_cdev->trigger_lock);
|
||||
}
|
||||
read_unlock(&leds_list_lock);
|
||||
}
|
||||
|
|
|
|||
|
|
@ -176,8 +176,6 @@ mmc_spi_readbytes(struct mmc_spi_host *host, unsigned len)
|
|||
DMA_FROM_DEVICE);
|
||||
|
||||
status = spi_sync(host->spi, &host->readback);
|
||||
if (status == 0)
|
||||
status = host->readback.status;
|
||||
|
||||
if (host->dma_dev)
|
||||
dma_sync_single_for_cpu(host->dma_dev,
|
||||
|
|
@ -480,8 +478,6 @@ mmc_spi_command_send(struct mmc_spi_host *host,
|
|||
DMA_BIDIRECTIONAL);
|
||||
}
|
||||
status = spi_sync(host->spi, &host->m);
|
||||
if (status == 0)
|
||||
status = host->m.status;
|
||||
|
||||
if (host->dma_dev)
|
||||
dma_sync_single_for_cpu(host->dma_dev,
|
||||
|
|
@ -624,8 +620,6 @@ mmc_spi_writeblock(struct mmc_spi_host *host, struct spi_transfer *t)
|
|||
DMA_BIDIRECTIONAL);
|
||||
|
||||
status = spi_sync(spi, &host->m);
|
||||
if (status == 0)
|
||||
status = host->m.status;
|
||||
|
||||
if (status != 0) {
|
||||
dev_dbg(&spi->dev, "write error (%d)\n", status);
|
||||
|
|
@ -726,8 +720,6 @@ mmc_spi_readblock(struct mmc_spi_host *host, struct spi_transfer *t)
|
|||
}
|
||||
|
||||
status = spi_sync(spi, &host->m);
|
||||
if (status == 0)
|
||||
status = host->m.status;
|
||||
|
||||
if (host->dma_dev) {
|
||||
dma_sync_single_for_cpu(host->dma_dev,
|
||||
|
|
@ -905,8 +897,6 @@ mmc_spi_data_do(struct mmc_spi_host *host, struct mmc_command *cmd,
|
|||
DMA_BIDIRECTIONAL);
|
||||
|
||||
tmp = spi_sync(spi, &host->m);
|
||||
if (tmp == 0)
|
||||
tmp = host->m.status;
|
||||
|
||||
if (host->dma_dev)
|
||||
dma_sync_single_for_cpu(host->dma_dev,
|
||||
|
|
|
|||
|
|
@ -888,7 +888,7 @@ config SMC91X
|
|||
tristate "SMC 91C9x/91C1xxx support"
|
||||
select CRC32
|
||||
select MII
|
||||
depends on ARM || REDWOOD_5 || REDWOOD_6 || M32R || SUPERH || SOC_AU1X00 || BFIN
|
||||
depends on ARM || REDWOOD_5 || REDWOOD_6 || M32R || SUPERH || SOC_AU1X00 || BLACKFIN
|
||||
help
|
||||
This is a driver for SMC's 91x series of Ethernet chipsets,
|
||||
including the SMC91C94 and the SMC91C111. Say Y if you want it
|
||||
|
|
@ -926,7 +926,7 @@ config SMC911X
|
|||
tristate "SMSC LAN911[5678] support"
|
||||
select CRC32
|
||||
select MII
|
||||
depends on ARCH_PXA || SUPERH
|
||||
depends on ARCH_PXA || SH_MAGIC_PANEL_R2
|
||||
help
|
||||
This is a driver for SMSC's LAN911x series of Ethernet chipsets
|
||||
including the new LAN9115, LAN9116, LAN9117, and LAN9118.
|
||||
|
|
@ -2588,6 +2588,7 @@ config MLX4_DEBUG
|
|||
config TEHUTI
|
||||
tristate "Tehuti Networks 10G Ethernet"
|
||||
depends on PCI
|
||||
select ZLIB_INFLATE
|
||||
help
|
||||
Tehuti Networks 10G Ethernet NIC
|
||||
|
||||
|
|
|
|||
|
|
@ -1340,7 +1340,9 @@ static int amd8111e_close(struct net_device * dev)
|
|||
struct amd8111e_priv *lp = netdev_priv(dev);
|
||||
netif_stop_queue(dev);
|
||||
|
||||
#ifdef CONFIG_AMD8111E_NAPI
|
||||
napi_disable(&lp->napi);
|
||||
#endif
|
||||
|
||||
spin_lock_irq(&lp->lock);
|
||||
|
||||
|
|
@ -1372,7 +1374,9 @@ static int amd8111e_open(struct net_device * dev )
|
|||
dev->name, dev))
|
||||
return -EAGAIN;
|
||||
|
||||
#ifdef CONFIG_AMD8111E_NAPI
|
||||
napi_enable(&lp->napi);
|
||||
#endif
|
||||
|
||||
spin_lock_irq(&lp->lock);
|
||||
|
||||
|
|
@ -1380,7 +1384,9 @@ static int amd8111e_open(struct net_device * dev )
|
|||
|
||||
if(amd8111e_restart(dev)){
|
||||
spin_unlock_irq(&lp->lock);
|
||||
#ifdef CONFIG_AMD8111E_NAPI
|
||||
napi_disable(&lp->napi);
|
||||
#endif
|
||||
if (dev->irq)
|
||||
free_irq(dev->irq, dev);
|
||||
return -ENOMEM;
|
||||
|
|
|
|||
|
|
@ -676,7 +676,7 @@ static void bf537mac_rx(struct net_device *dev)
|
|||
skb->protocol = eth_type_trans(skb, dev);
|
||||
#if defined(BFIN_MAC_CSUM_OFFLOAD)
|
||||
skb->csum = current_rx_ptr->status.ip_payload_csum;
|
||||
skb->ip_summed = CHECKSUM_PARTIAL;
|
||||
skb->ip_summed = CHECKSUM_COMPLETE;
|
||||
#endif
|
||||
|
||||
netif_rx(skb);
|
||||
|
|
|
|||
|
|
@ -74,6 +74,7 @@
|
|||
#include <linux/ethtool.h>
|
||||
#include <linux/if_vlan.h>
|
||||
#include <linux/if_bonding.h>
|
||||
#include <linux/jiffies.h>
|
||||
#include <net/route.h>
|
||||
#include <net/net_namespace.h>
|
||||
#include "bonding.h"
|
||||
|
|
@ -174,6 +175,7 @@ struct bond_parm_tbl bond_mode_tbl[] = {
|
|||
struct bond_parm_tbl xmit_hashtype_tbl[] = {
|
||||
{ "layer2", BOND_XMIT_POLICY_LAYER2},
|
||||
{ "layer3+4", BOND_XMIT_POLICY_LAYER34},
|
||||
{ "layer2+3", BOND_XMIT_POLICY_LAYER23},
|
||||
{ NULL, -1},
|
||||
};
|
||||
|
||||
|
|
@ -2722,8 +2724,8 @@ void bond_loadbalance_arp_mon(struct work_struct *work)
|
|||
*/
|
||||
bond_for_each_slave(bond, slave, i) {
|
||||
if (slave->link != BOND_LINK_UP) {
|
||||
if (((jiffies - slave->dev->trans_start) <= delta_in_ticks) &&
|
||||
((jiffies - slave->dev->last_rx) <= delta_in_ticks)) {
|
||||
if (time_before_eq(jiffies, slave->dev->trans_start + delta_in_ticks) &&
|
||||
time_before_eq(jiffies, slave->dev->last_rx + delta_in_ticks)) {
|
||||
|
||||
slave->link = BOND_LINK_UP;
|
||||
slave->state = BOND_STATE_ACTIVE;
|
||||
|
|
@ -2754,8 +2756,8 @@ void bond_loadbalance_arp_mon(struct work_struct *work)
|
|||
* when the source ip is 0, so don't take the link down
|
||||
* if we don't know our ip yet
|
||||
*/
|
||||
if (((jiffies - slave->dev->trans_start) >= (2*delta_in_ticks)) ||
|
||||
(((jiffies - slave->dev->last_rx) >= (2*delta_in_ticks)) &&
|
||||
if (time_after_eq(jiffies, slave->dev->trans_start + 2*delta_in_ticks) ||
|
||||
(time_after_eq(jiffies, slave->dev->last_rx + 2*delta_in_ticks) &&
|
||||
bond_has_ip(bond))) {
|
||||
|
||||
slave->link = BOND_LINK_DOWN;
|
||||
|
|
@ -2848,8 +2850,8 @@ void bond_activebackup_arp_mon(struct work_struct *work)
|
|||
*/
|
||||
bond_for_each_slave(bond, slave, i) {
|
||||
if (slave->link != BOND_LINK_UP) {
|
||||
if ((jiffies - slave_last_rx(bond, slave)) <=
|
||||
delta_in_ticks) {
|
||||
if (time_before_eq(jiffies,
|
||||
slave_last_rx(bond, slave) + delta_in_ticks)) {
|
||||
|
||||
slave->link = BOND_LINK_UP;
|
||||
|
||||
|
|
@ -2858,7 +2860,7 @@ void bond_activebackup_arp_mon(struct work_struct *work)
|
|||
write_lock_bh(&bond->curr_slave_lock);
|
||||
|
||||
if ((!bond->curr_active_slave) &&
|
||||
((jiffies - slave->dev->trans_start) <= delta_in_ticks)) {
|
||||
time_before_eq(jiffies, slave->dev->trans_start + delta_in_ticks)) {
|
||||
bond_change_active_slave(bond, slave);
|
||||
bond->current_arp_slave = NULL;
|
||||
} else if (bond->curr_active_slave != slave) {
|
||||
|
|
@ -2897,7 +2899,7 @@ void bond_activebackup_arp_mon(struct work_struct *work)
|
|||
|
||||
if ((slave != bond->curr_active_slave) &&
|
||||
(!bond->current_arp_slave) &&
|
||||
(((jiffies - slave_last_rx(bond, slave)) >= 3*delta_in_ticks) &&
|
||||
(time_after_eq(jiffies, slave_last_rx(bond, slave) + 3*delta_in_ticks) &&
|
||||
bond_has_ip(bond))) {
|
||||
/* a backup slave has gone down; three times
|
||||
* the delta allows the current slave to be
|
||||
|
|
@ -2943,10 +2945,10 @@ void bond_activebackup_arp_mon(struct work_struct *work)
|
|||
* before being taken out. if a primary is being used, check
|
||||
* if it is up and needs to take over as the curr_active_slave
|
||||
*/
|
||||
if ((((jiffies - slave->dev->trans_start) >= (2*delta_in_ticks)) ||
|
||||
(((jiffies - slave_last_rx(bond, slave)) >= (2*delta_in_ticks)) &&
|
||||
bond_has_ip(bond))) &&
|
||||
((jiffies - slave->jiffies) >= 2*delta_in_ticks)) {
|
||||
if ((time_after_eq(jiffies, slave->dev->trans_start + 2*delta_in_ticks) ||
|
||||
(time_after_eq(jiffies, slave_last_rx(bond, slave) + 2*delta_in_ticks) &&
|
||||
bond_has_ip(bond))) &&
|
||||
time_after_eq(jiffies, slave->jiffies + 2*delta_in_ticks)) {
|
||||
|
||||
slave->link = BOND_LINK_DOWN;
|
||||
|
||||
|
|
@ -3603,6 +3605,24 @@ void bond_unregister_arp(struct bonding *bond)
|
|||
|
||||
/*---------------------------- Hashing Policies -----------------------------*/
|
||||
|
||||
/*
|
||||
* Hash for the output device based upon layer 2 and layer 3 data. If
|
||||
* the packet is not IP mimic bond_xmit_hash_policy_l2()
|
||||
*/
|
||||
static int bond_xmit_hash_policy_l23(struct sk_buff *skb,
|
||||
struct net_device *bond_dev, int count)
|
||||
{
|
||||
struct ethhdr *data = (struct ethhdr *)skb->data;
|
||||
struct iphdr *iph = ip_hdr(skb);
|
||||
|
||||
if (skb->protocol == __constant_htons(ETH_P_IP)) {
|
||||
return ((ntohl(iph->saddr ^ iph->daddr) & 0xffff) ^
|
||||
(data->h_dest[5] ^ bond_dev->dev_addr[5])) % count;
|
||||
}
|
||||
|
||||
return (data->h_dest[5] ^ bond_dev->dev_addr[5]) % count;
|
||||
}
|
||||
|
||||
/*
|
||||
* Hash for the output device based upon layer 3 and layer 4 data. If
|
||||
* the packet is a frag or not TCP or UDP, just use layer 3 data. If it is
|
||||
|
|
@ -4305,6 +4325,22 @@ out:
|
|||
|
||||
/*------------------------- Device initialization ---------------------------*/
|
||||
|
||||
static void bond_set_xmit_hash_policy(struct bonding *bond)
|
||||
{
|
||||
switch (bond->params.xmit_policy) {
|
||||
case BOND_XMIT_POLICY_LAYER23:
|
||||
bond->xmit_hash_policy = bond_xmit_hash_policy_l23;
|
||||
break;
|
||||
case BOND_XMIT_POLICY_LAYER34:
|
||||
bond->xmit_hash_policy = bond_xmit_hash_policy_l34;
|
||||
break;
|
||||
case BOND_XMIT_POLICY_LAYER2:
|
||||
default:
|
||||
bond->xmit_hash_policy = bond_xmit_hash_policy_l2;
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
/*
|
||||
* set bond mode specific net device operations
|
||||
*/
|
||||
|
|
@ -4321,10 +4357,7 @@ void bond_set_mode_ops(struct bonding *bond, int mode)
|
|||
break;
|
||||
case BOND_MODE_XOR:
|
||||
bond_dev->hard_start_xmit = bond_xmit_xor;
|
||||
if (bond->params.xmit_policy == BOND_XMIT_POLICY_LAYER34)
|
||||
bond->xmit_hash_policy = bond_xmit_hash_policy_l34;
|
||||
else
|
||||
bond->xmit_hash_policy = bond_xmit_hash_policy_l2;
|
||||
bond_set_xmit_hash_policy(bond);
|
||||
break;
|
||||
case BOND_MODE_BROADCAST:
|
||||
bond_dev->hard_start_xmit = bond_xmit_broadcast;
|
||||
|
|
@ -4332,10 +4365,7 @@ void bond_set_mode_ops(struct bonding *bond, int mode)
|
|||
case BOND_MODE_8023AD:
|
||||
bond_set_master_3ad_flags(bond);
|
||||
bond_dev->hard_start_xmit = bond_3ad_xmit_xor;
|
||||
if (bond->params.xmit_policy == BOND_XMIT_POLICY_LAYER34)
|
||||
bond->xmit_hash_policy = bond_xmit_hash_policy_l34;
|
||||
else
|
||||
bond->xmit_hash_policy = bond_xmit_hash_policy_l2;
|
||||
bond_set_xmit_hash_policy(bond);
|
||||
break;
|
||||
case BOND_MODE_ALB:
|
||||
bond_set_master_alb_flags(bond);
|
||||
|
|
@ -4462,6 +4492,27 @@ static void bond_deinit(struct net_device *bond_dev)
|
|||
#endif
|
||||
}
|
||||
|
||||
static void bond_work_cancel_all(struct bonding *bond)
|
||||
{
|
||||
write_lock_bh(&bond->lock);
|
||||
bond->kill_timers = 1;
|
||||
write_unlock_bh(&bond->lock);
|
||||
|
||||
if (bond->params.miimon && delayed_work_pending(&bond->mii_work))
|
||||
cancel_delayed_work(&bond->mii_work);
|
||||
|
||||
if (bond->params.arp_interval && delayed_work_pending(&bond->arp_work))
|
||||
cancel_delayed_work(&bond->arp_work);
|
||||
|
||||
if (bond->params.mode == BOND_MODE_ALB &&
|
||||
delayed_work_pending(&bond->alb_work))
|
||||
cancel_delayed_work(&bond->alb_work);
|
||||
|
||||
if (bond->params.mode == BOND_MODE_8023AD &&
|
||||
delayed_work_pending(&bond->ad_work))
|
||||
cancel_delayed_work(&bond->ad_work);
|
||||
}
|
||||
|
||||
/* Unregister and free all bond devices.
|
||||
* Caller must hold rtnl_lock.
|
||||
*/
|
||||
|
|
@ -4472,6 +4523,7 @@ static void bond_free_all(void)
|
|||
list_for_each_entry_safe(bond, nxt, &bond_dev_list, bond_list) {
|
||||
struct net_device *bond_dev = bond->dev;
|
||||
|
||||
bond_work_cancel_all(bond);
|
||||
bond_mc_list_destroy(bond);
|
||||
/* Release the bonded slaves */
|
||||
bond_release_all(bond_dev);
|
||||
|
|
@ -4497,8 +4549,7 @@ int bond_parse_parm(char *mode_arg, struct bond_parm_tbl *tbl)
|
|||
for (i = 0; tbl[i].modename; i++) {
|
||||
if ((isdigit(*mode_arg) &&
|
||||
tbl[i].mode == simple_strtol(mode_arg, NULL, 0)) ||
|
||||
(strncmp(mode_arg, tbl[i].modename,
|
||||
strlen(tbl[i].modename)) == 0)) {
|
||||
(strcmp(mode_arg, tbl[i].modename) == 0)) {
|
||||
return tbl[i].mode;
|
||||
}
|
||||
}
|
||||
|
|
@ -4873,27 +4924,6 @@ out_rtnl:
|
|||
return res;
|
||||
}
|
||||
|
||||
static void bond_work_cancel_all(struct bonding *bond)
|
||||
{
|
||||
write_lock_bh(&bond->lock);
|
||||
bond->kill_timers = 1;
|
||||
write_unlock_bh(&bond->lock);
|
||||
|
||||
if (bond->params.miimon && delayed_work_pending(&bond->mii_work))
|
||||
cancel_delayed_work(&bond->mii_work);
|
||||
|
||||
if (bond->params.arp_interval && delayed_work_pending(&bond->arp_work))
|
||||
cancel_delayed_work(&bond->arp_work);
|
||||
|
||||
if (bond->params.mode == BOND_MODE_ALB &&
|
||||
delayed_work_pending(&bond->alb_work))
|
||||
cancel_delayed_work(&bond->alb_work);
|
||||
|
||||
if (bond->params.mode == BOND_MODE_8023AD &&
|
||||
delayed_work_pending(&bond->ad_work))
|
||||
cancel_delayed_work(&bond->ad_work);
|
||||
}
|
||||
|
||||
static int __init bonding_init(void)
|
||||
{
|
||||
int i;
|
||||
|
|
|
|||
|
|
@ -74,7 +74,7 @@ struct rw_semaphore bonding_rwsem;
|
|||
* "show" function for the bond_masters attribute.
|
||||
* The class parameter is ignored.
|
||||
*/
|
||||
static ssize_t bonding_show_bonds(struct class *cls, char *buffer)
|
||||
static ssize_t bonding_show_bonds(struct class *cls, char *buf)
|
||||
{
|
||||
int res = 0;
|
||||
struct bonding *bond;
|
||||
|
|
@ -86,14 +86,13 @@ static ssize_t bonding_show_bonds(struct class *cls, char *buffer)
|
|||
/* not enough space for another interface name */
|
||||
if ((PAGE_SIZE - res) > 10)
|
||||
res = PAGE_SIZE - 10;
|
||||
res += sprintf(buffer + res, "++more++");
|
||||
res += sprintf(buf + res, "++more++ ");
|
||||
break;
|
||||
}
|
||||
res += sprintf(buffer + res, "%s ",
|
||||
bond->dev->name);
|
||||
res += sprintf(buf + res, "%s ", bond->dev->name);
|
||||
}
|
||||
res += sprintf(buffer + res, "\n");
|
||||
res++;
|
||||
if (res)
|
||||
buf[res-1] = '\n'; /* eat the leftover space */
|
||||
up_read(&(bonding_rwsem));
|
||||
return res;
|
||||
}
|
||||
|
|
@ -235,14 +234,14 @@ static ssize_t bonding_show_slaves(struct device *d,
|
|||
/* not enough space for another interface name */
|
||||
if ((PAGE_SIZE - res) > 10)
|
||||
res = PAGE_SIZE - 10;
|
||||
res += sprintf(buf + res, "++more++");
|
||||
res += sprintf(buf + res, "++more++ ");
|
||||
break;
|
||||
}
|
||||
res += sprintf(buf + res, "%s ", slave->dev->name);
|
||||
}
|
||||
read_unlock(&bond->lock);
|
||||
res += sprintf(buf + res, "\n");
|
||||
res++;
|
||||
if (res)
|
||||
buf[res-1] = '\n'; /* eat the leftover space */
|
||||
return res;
|
||||
}
|
||||
|
||||
|
|
@ -406,7 +405,7 @@ static ssize_t bonding_show_mode(struct device *d,
|
|||
|
||||
return sprintf(buf, "%s %d\n",
|
||||
bond_mode_tbl[bond->params.mode].modename,
|
||||
bond->params.mode) + 1;
|
||||
bond->params.mode);
|
||||
}
|
||||
|
||||
static ssize_t bonding_store_mode(struct device *d,
|
||||
|
|
@ -457,20 +456,11 @@ static ssize_t bonding_show_xmit_hash(struct device *d,
|
|||
struct device_attribute *attr,
|
||||
char *buf)
|
||||
{
|
||||
int count;
|
||||
struct bonding *bond = to_bond(d);
|
||||
|
||||
if ((bond->params.mode != BOND_MODE_XOR) &&
|
||||
(bond->params.mode != BOND_MODE_8023AD)) {
|
||||
// Not Applicable
|
||||
count = sprintf(buf, "NA\n") + 1;
|
||||
} else {
|
||||
count = sprintf(buf, "%s %d\n",
|
||||
xmit_hashtype_tbl[bond->params.xmit_policy].modename,
|
||||
bond->params.xmit_policy) + 1;
|
||||
}
|
||||
|
||||
return count;
|
||||
return sprintf(buf, "%s %d\n",
|
||||
xmit_hashtype_tbl[bond->params.xmit_policy].modename,
|
||||
bond->params.xmit_policy);
|
||||
}
|
||||
|
||||
static ssize_t bonding_store_xmit_hash(struct device *d,
|
||||
|
|
@ -488,15 +478,6 @@ static ssize_t bonding_store_xmit_hash(struct device *d,
|
|||
goto out;
|
||||
}
|
||||
|
||||
if ((bond->params.mode != BOND_MODE_XOR) &&
|
||||
(bond->params.mode != BOND_MODE_8023AD)) {
|
||||
printk(KERN_ERR DRV_NAME
|
||||
"%s: Transmit hash policy is irrelevant in this mode.\n",
|
||||
bond->dev->name);
|
||||
ret = -EPERM;
|
||||
goto out;
|
||||
}
|
||||
|
||||
new_value = bond_parse_parm((char *)buf, xmit_hashtype_tbl);
|
||||
if (new_value < 0) {
|
||||
printk(KERN_ERR DRV_NAME
|
||||
|
|
@ -527,7 +508,7 @@ static ssize_t bonding_show_arp_validate(struct device *d,
|
|||
|
||||
return sprintf(buf, "%s %d\n",
|
||||
arp_validate_tbl[bond->params.arp_validate].modename,
|
||||
bond->params.arp_validate) + 1;
|
||||
bond->params.arp_validate);
|
||||
}
|
||||
|
||||
static ssize_t bonding_store_arp_validate(struct device *d,
|
||||
|
|
@ -627,7 +608,7 @@ static ssize_t bonding_show_arp_interval(struct device *d,
|
|||
{
|
||||
struct bonding *bond = to_bond(d);
|
||||
|
||||
return sprintf(buf, "%d\n", bond->params.arp_interval) + 1;
|
||||
return sprintf(buf, "%d\n", bond->params.arp_interval);
|
||||
}
|
||||
|
||||
static ssize_t bonding_store_arp_interval(struct device *d,
|
||||
|
|
@ -712,9 +693,7 @@ static ssize_t bonding_show_arp_targets(struct device *d,
|
|||
NIPQUAD(bond->params.arp_targets[i]));
|
||||
}
|
||||
if (res)
|
||||
res--; /* eat the leftover space */
|
||||
res += sprintf(buf + res, "\n");
|
||||
res++;
|
||||
buf[res-1] = '\n'; /* eat the leftover space */
|
||||
return res;
|
||||
}
|
||||
|
||||
|
|
@ -815,7 +794,7 @@ static ssize_t bonding_show_downdelay(struct device *d,
|
|||
{
|
||||
struct bonding *bond = to_bond(d);
|
||||
|
||||
return sprintf(buf, "%d\n", bond->params.downdelay * bond->params.miimon) + 1;
|
||||
return sprintf(buf, "%d\n", bond->params.downdelay * bond->params.miimon);
|
||||
}
|
||||
|
||||
static ssize_t bonding_store_downdelay(struct device *d,
|
||||
|
|
@ -872,7 +851,7 @@ static ssize_t bonding_show_updelay(struct device *d,
|
|||
{
|
||||
struct bonding *bond = to_bond(d);
|
||||
|
||||
return sprintf(buf, "%d\n", bond->params.updelay * bond->params.miimon) + 1;
|
||||
return sprintf(buf, "%d\n", bond->params.updelay * bond->params.miimon);
|
||||
|
||||
}
|
||||
|
||||
|
|
@ -936,7 +915,7 @@ static ssize_t bonding_show_lacp(struct device *d,
|
|||
|
||||
return sprintf(buf, "%s %d\n",
|
||||
bond_lacp_tbl[bond->params.lacp_fast].modename,
|
||||
bond->params.lacp_fast) + 1;
|
||||
bond->params.lacp_fast);
|
||||
}
|
||||
|
||||
static ssize_t bonding_store_lacp(struct device *d,
|
||||
|
|
@ -992,7 +971,7 @@ static ssize_t bonding_show_miimon(struct device *d,
|
|||
{
|
||||
struct bonding *bond = to_bond(d);
|
||||
|
||||
return sprintf(buf, "%d\n", bond->params.miimon) + 1;
|
||||
return sprintf(buf, "%d\n", bond->params.miimon);
|
||||
}
|
||||
|
||||
static ssize_t bonding_store_miimon(struct device *d,
|
||||
|
|
@ -1083,9 +1062,7 @@ static ssize_t bonding_show_primary(struct device *d,
|
|||
struct bonding *bond = to_bond(d);
|
||||
|
||||
if (bond->primary_slave)
|
||||
count = sprintf(buf, "%s\n", bond->primary_slave->dev->name) + 1;
|
||||
else
|
||||
count = sprintf(buf, "\n") + 1;
|
||||
count = sprintf(buf, "%s\n", bond->primary_slave->dev->name);
|
||||
|
||||
return count;
|
||||
}
|
||||
|
|
@ -1149,7 +1126,7 @@ static ssize_t bonding_show_carrier(struct device *d,
|
|||
{
|
||||
struct bonding *bond = to_bond(d);
|
||||
|
||||
return sprintf(buf, "%d\n", bond->params.use_carrier) + 1;
|
||||
return sprintf(buf, "%d\n", bond->params.use_carrier);
|
||||
}
|
||||
|
||||
static ssize_t bonding_store_carrier(struct device *d,
|
||||
|
|
@ -1191,16 +1168,14 @@ static ssize_t bonding_show_active_slave(struct device *d,
|
|||
{
|
||||
struct slave *curr;
|
||||
struct bonding *bond = to_bond(d);
|
||||
int count;
|
||||
int count = 0;
|
||||
|
||||
read_lock(&bond->curr_slave_lock);
|
||||
curr = bond->curr_active_slave;
|
||||
read_unlock(&bond->curr_slave_lock);
|
||||
|
||||
if (USES_PRIMARY(bond->params.mode) && curr)
|
||||
count = sprintf(buf, "%s\n", curr->dev->name) + 1;
|
||||
else
|
||||
count = sprintf(buf, "\n") + 1;
|
||||
count = sprintf(buf, "%s\n", curr->dev->name);
|
||||
return count;
|
||||
}
|
||||
|
||||
|
|
@ -1295,7 +1270,7 @@ static ssize_t bonding_show_mii_status(struct device *d,
|
|||
curr = bond->curr_active_slave;
|
||||
read_unlock(&bond->curr_slave_lock);
|
||||
|
||||
return sprintf(buf, "%s\n", (curr) ? "up" : "down") + 1;
|
||||
return sprintf(buf, "%s\n", (curr) ? "up" : "down");
|
||||
}
|
||||
static DEVICE_ATTR(mii_status, S_IRUGO, bonding_show_mii_status, NULL);
|
||||
|
||||
|
|
@ -1312,10 +1287,8 @@ static ssize_t bonding_show_ad_aggregator(struct device *d,
|
|||
|
||||
if (bond->params.mode == BOND_MODE_8023AD) {
|
||||
struct ad_info ad_info;
|
||||
count = sprintf(buf, "%d\n", (bond_3ad_get_active_agg_info(bond, &ad_info)) ? 0 : ad_info.aggregator_id) + 1;
|
||||
count = sprintf(buf, "%d\n", (bond_3ad_get_active_agg_info(bond, &ad_info)) ? 0 : ad_info.aggregator_id);
|
||||
}
|
||||
else
|
||||
count = sprintf(buf, "\n") + 1;
|
||||
|
||||
return count;
|
||||
}
|
||||
|
|
@ -1334,10 +1307,8 @@ static ssize_t bonding_show_ad_num_ports(struct device *d,
|
|||
|
||||
if (bond->params.mode == BOND_MODE_8023AD) {
|
||||
struct ad_info ad_info;
|
||||
count = sprintf(buf, "%d\n", (bond_3ad_get_active_agg_info(bond, &ad_info)) ? 0: ad_info.ports) + 1;
|
||||
count = sprintf(buf, "%d\n", (bond_3ad_get_active_agg_info(bond, &ad_info)) ? 0: ad_info.ports);
|
||||
}
|
||||
else
|
||||
count = sprintf(buf, "\n") + 1;
|
||||
|
||||
return count;
|
||||
}
|
||||
|
|
@ -1356,10 +1327,8 @@ static ssize_t bonding_show_ad_actor_key(struct device *d,
|
|||
|
||||
if (bond->params.mode == BOND_MODE_8023AD) {
|
||||
struct ad_info ad_info;
|
||||
count = sprintf(buf, "%d\n", (bond_3ad_get_active_agg_info(bond, &ad_info)) ? 0 : ad_info.actor_key) + 1;
|
||||
count = sprintf(buf, "%d\n", (bond_3ad_get_active_agg_info(bond, &ad_info)) ? 0 : ad_info.actor_key);
|
||||
}
|
||||
else
|
||||
count = sprintf(buf, "\n") + 1;
|
||||
|
||||
return count;
|
||||
}
|
||||
|
|
@ -1378,10 +1347,8 @@ static ssize_t bonding_show_ad_partner_key(struct device *d,
|
|||
|
||||
if (bond->params.mode == BOND_MODE_8023AD) {
|
||||
struct ad_info ad_info;
|
||||
count = sprintf(buf, "%d\n", (bond_3ad_get_active_agg_info(bond, &ad_info)) ? 0 : ad_info.partner_key) + 1;
|
||||
count = sprintf(buf, "%d\n", (bond_3ad_get_active_agg_info(bond, &ad_info)) ? 0 : ad_info.partner_key);
|
||||
}
|
||||
else
|
||||
count = sprintf(buf, "\n") + 1;
|
||||
|
||||
return count;
|
||||
}
|
||||
|
|
@ -1403,12 +1370,9 @@ static ssize_t bonding_show_ad_partner_mac(struct device *d,
|
|||
struct ad_info ad_info;
|
||||
if (!bond_3ad_get_active_agg_info(bond, &ad_info)) {
|
||||
count = sprintf(buf,"%s\n",
|
||||
print_mac(mac, ad_info.partner_system))
|
||||
+ 1;
|
||||
print_mac(mac, ad_info.partner_system));
|
||||
}
|
||||
}
|
||||
else
|
||||
count = sprintf(buf, "\n") + 1;
|
||||
|
||||
return count;
|
||||
}
|
||||
|
|
|
|||
|
|
@ -22,8 +22,8 @@
|
|||
#include "bond_3ad.h"
|
||||
#include "bond_alb.h"
|
||||
|
||||
#define DRV_VERSION "3.2.1"
|
||||
#define DRV_RELDATE "October 15, 2007"
|
||||
#define DRV_VERSION "3.2.3"
|
||||
#define DRV_RELDATE "December 6, 2007"
|
||||
#define DRV_NAME "bonding"
|
||||
#define DRV_DESCRIPTION "Ethernet Channel Bonding Driver"
|
||||
|
||||
|
|
|
|||
|
|
@ -374,7 +374,9 @@ static char stats_strings[][ETH_GSTRING_LEN] = {
|
|||
"TxInternalMACXmitError",
|
||||
"TxFramesWithExcessiveDeferral",
|
||||
"TxFCSErrors",
|
||||
|
||||
"TxJumboFramesOk",
|
||||
"TxJumboOctetsOk",
|
||||
|
||||
"RxOctetsOK",
|
||||
"RxOctetsBad",
|
||||
"RxUnicastFramesOK",
|
||||
|
|
@ -392,16 +394,17 @@ static char stats_strings[][ETH_GSTRING_LEN] = {
|
|||
"RxInRangeLengthErrors",
|
||||
"RxOutOfRangeLengthField",
|
||||
"RxFrameTooLongErrors",
|
||||
"RxJumboFramesOk",
|
||||
"RxJumboOctetsOk",
|
||||
|
||||
/* Port stats */
|
||||
"RxPackets",
|
||||
"RxCsumGood",
|
||||
"TxPackets",
|
||||
"TxCsumOffload",
|
||||
"TxTso",
|
||||
"RxVlan",
|
||||
"TxVlan",
|
||||
|
||||
"TxNeedHeadroom",
|
||||
|
||||
/* Interrupt stats */
|
||||
"rx drops",
|
||||
"pure_rsps",
|
||||
|
|
@ -463,23 +466,56 @@ static void get_stats(struct net_device *dev, struct ethtool_stats *stats,
|
|||
const struct cmac_statistics *s;
|
||||
const struct sge_intr_counts *t;
|
||||
struct sge_port_stats ss;
|
||||
unsigned int len;
|
||||
|
||||
s = mac->ops->statistics_update(mac, MAC_STATS_UPDATE_FULL);
|
||||
|
||||
len = sizeof(u64)*(&s->TxFCSErrors + 1 - &s->TxOctetsOK);
|
||||
memcpy(data, &s->TxOctetsOK, len);
|
||||
data += len;
|
||||
|
||||
len = sizeof(u64)*(&s->RxFrameTooLongErrors + 1 - &s->RxOctetsOK);
|
||||
memcpy(data, &s->RxOctetsOK, len);
|
||||
data += len;
|
||||
|
||||
t1_sge_get_port_stats(adapter->sge, dev->if_port, &ss);
|
||||
memcpy(data, &ss, sizeof(ss));
|
||||
data += sizeof(ss);
|
||||
|
||||
t = t1_sge_get_intr_counts(adapter->sge);
|
||||
t1_sge_get_port_stats(adapter->sge, dev->if_port, &ss);
|
||||
|
||||
*data++ = s->TxOctetsOK;
|
||||
*data++ = s->TxOctetsBad;
|
||||
*data++ = s->TxUnicastFramesOK;
|
||||
*data++ = s->TxMulticastFramesOK;
|
||||
*data++ = s->TxBroadcastFramesOK;
|
||||
*data++ = s->TxPauseFrames;
|
||||
*data++ = s->TxFramesWithDeferredXmissions;
|
||||
*data++ = s->TxLateCollisions;
|
||||
*data++ = s->TxTotalCollisions;
|
||||
*data++ = s->TxFramesAbortedDueToXSCollisions;
|
||||
*data++ = s->TxUnderrun;
|
||||
*data++ = s->TxLengthErrors;
|
||||
*data++ = s->TxInternalMACXmitError;
|
||||
*data++ = s->TxFramesWithExcessiveDeferral;
|
||||
*data++ = s->TxFCSErrors;
|
||||
*data++ = s->TxJumboFramesOK;
|
||||
*data++ = s->TxJumboOctetsOK;
|
||||
|
||||
*data++ = s->RxOctetsOK;
|
||||
*data++ = s->RxOctetsBad;
|
||||
*data++ = s->RxUnicastFramesOK;
|
||||
*data++ = s->RxMulticastFramesOK;
|
||||
*data++ = s->RxBroadcastFramesOK;
|
||||
*data++ = s->RxPauseFrames;
|
||||
*data++ = s->RxFCSErrors;
|
||||
*data++ = s->RxAlignErrors;
|
||||
*data++ = s->RxSymbolErrors;
|
||||
*data++ = s->RxDataErrors;
|
||||
*data++ = s->RxSequenceErrors;
|
||||
*data++ = s->RxRuntErrors;
|
||||
*data++ = s->RxJabberErrors;
|
||||
*data++ = s->RxInternalMACRcvError;
|
||||
*data++ = s->RxInRangeLengthErrors;
|
||||
*data++ = s->RxOutOfRangeLengthField;
|
||||
*data++ = s->RxFrameTooLongErrors;
|
||||
*data++ = s->RxJumboFramesOK;
|
||||
*data++ = s->RxJumboOctetsOK;
|
||||
|
||||
*data++ = ss.rx_cso_good;
|
||||
*data++ = ss.tx_cso;
|
||||
*data++ = ss.tx_tso;
|
||||
*data++ = ss.vlan_xtract;
|
||||
*data++ = ss.vlan_insert;
|
||||
*data++ = ss.tx_need_hdrroom;
|
||||
|
||||
*data++ = t->rx_drops;
|
||||
*data++ = t->pure_rsps;
|
||||
*data++ = t->unhandled_irqs;
|
||||
|
|
|
|||
|
|
@ -45,7 +45,7 @@
|
|||
|
||||
#include <linux/crc32.h>
|
||||
|
||||
#define OFFSET(REG_ADDR) (REG_ADDR << 2)
|
||||
#define OFFSET(REG_ADDR) ((REG_ADDR) << 2)
|
||||
|
||||
/* Max frame size PM3393 can handle. Includes Ethernet header and CRC. */
|
||||
#define MAX_FRAME_SIZE 9600
|
||||
|
|
@ -428,69 +428,26 @@ static int pm3393_set_speed_duplex_fc(struct cmac *cmac, int speed, int duplex,
|
|||
return 0;
|
||||
}
|
||||
|
||||
static void pm3393_rmon_update(struct adapter *adapter, u32 offs, u64 *val,
|
||||
int over)
|
||||
{
|
||||
u32 val0, val1, val2;
|
||||
|
||||
t1_tpi_read(adapter, offs, &val0);
|
||||
t1_tpi_read(adapter, offs + 4, &val1);
|
||||
t1_tpi_read(adapter, offs + 8, &val2);
|
||||
|
||||
*val &= ~0ull << 40;
|
||||
*val |= val0 & 0xffff;
|
||||
*val |= (val1 & 0xffff) << 16;
|
||||
*val |= (u64)(val2 & 0xff) << 32;
|
||||
|
||||
if (over)
|
||||
*val += 1ull << 40;
|
||||
#define RMON_UPDATE(mac, name, stat_name) \
|
||||
{ \
|
||||
t1_tpi_read((mac)->adapter, OFFSET(name), &val0); \
|
||||
t1_tpi_read((mac)->adapter, OFFSET((name)+1), &val1); \
|
||||
t1_tpi_read((mac)->adapter, OFFSET((name)+2), &val2); \
|
||||
(mac)->stats.stat_name = (u64)(val0 & 0xffff) | \
|
||||
((u64)(val1 & 0xffff) << 16) | \
|
||||
((u64)(val2 & 0xff) << 32) | \
|
||||
((mac)->stats.stat_name & \
|
||||
0xffffff0000000000ULL); \
|
||||
if (ro & \
|
||||
(1ULL << ((name - SUNI1x10GEXP_REG_MSTAT_COUNTER_0_LOW) >> 2))) \
|
||||
(mac)->stats.stat_name += 1ULL << 40; \
|
||||
}
|
||||
|
||||
static const struct cmac_statistics *pm3393_update_statistics(struct cmac *mac,
|
||||
int flag)
|
||||
{
|
||||
static struct {
|
||||
unsigned int reg;
|
||||
unsigned int offset;
|
||||
} hw_stats [] = {
|
||||
|
||||
#define HW_STAT(name, stat_name) \
|
||||
{ name, (&((struct cmac_statistics *)NULL)->stat_name) - (u64 *)NULL }
|
||||
|
||||
/* Rx stats */
|
||||
HW_STAT(RxOctetsReceivedOK, RxOctetsOK),
|
||||
HW_STAT(RxUnicastFramesReceivedOK, RxUnicastFramesOK),
|
||||
HW_STAT(RxMulticastFramesReceivedOK, RxMulticastFramesOK),
|
||||
HW_STAT(RxBroadcastFramesReceivedOK, RxBroadcastFramesOK),
|
||||
HW_STAT(RxPAUSEMACCtrlFramesReceived, RxPauseFrames),
|
||||
HW_STAT(RxFrameCheckSequenceErrors, RxFCSErrors),
|
||||
HW_STAT(RxFramesLostDueToInternalMACErrors,
|
||||
RxInternalMACRcvError),
|
||||
HW_STAT(RxSymbolErrors, RxSymbolErrors),
|
||||
HW_STAT(RxInRangeLengthErrors, RxInRangeLengthErrors),
|
||||
HW_STAT(RxFramesTooLongErrors , RxFrameTooLongErrors),
|
||||
HW_STAT(RxJabbers, RxJabberErrors),
|
||||
HW_STAT(RxFragments, RxRuntErrors),
|
||||
HW_STAT(RxUndersizedFrames, RxRuntErrors),
|
||||
HW_STAT(RxJumboFramesReceivedOK, RxJumboFramesOK),
|
||||
HW_STAT(RxJumboOctetsReceivedOK, RxJumboOctetsOK),
|
||||
|
||||
/* Tx stats */
|
||||
HW_STAT(TxOctetsTransmittedOK, TxOctetsOK),
|
||||
HW_STAT(TxFramesLostDueToInternalMACTransmissionError,
|
||||
TxInternalMACXmitError),
|
||||
HW_STAT(TxTransmitSystemError, TxFCSErrors),
|
||||
HW_STAT(TxUnicastFramesTransmittedOK, TxUnicastFramesOK),
|
||||
HW_STAT(TxMulticastFramesTransmittedOK, TxMulticastFramesOK),
|
||||
HW_STAT(TxBroadcastFramesTransmittedOK, TxBroadcastFramesOK),
|
||||
HW_STAT(TxPAUSEMACCtrlFramesTransmitted, TxPauseFrames),
|
||||
HW_STAT(TxJumboFramesReceivedOK, TxJumboFramesOK),
|
||||
HW_STAT(TxJumboOctetsReceivedOK, TxJumboOctetsOK)
|
||||
}, *p = hw_stats;
|
||||
u64 ro;
|
||||
u32 val0, val1, val2, val3;
|
||||
u64 *stats = (u64 *) &mac->stats;
|
||||
unsigned int i;
|
||||
u64 ro;
|
||||
u32 val0, val1, val2, val3;
|
||||
|
||||
/* Snap the counters */
|
||||
pmwrite(mac, SUNI1x10GEXP_REG_MSTAT_CONTROL,
|
||||
|
|
@ -504,14 +461,35 @@ static const struct cmac_statistics *pm3393_update_statistics(struct cmac *mac,
|
|||
ro = ((u64)val0 & 0xffff) | (((u64)val1 & 0xffff) << 16) |
|
||||
(((u64)val2 & 0xffff) << 32) | (((u64)val3 & 0xffff) << 48);
|
||||
|
||||
for (i = 0; i < ARRAY_SIZE(hw_stats); i++) {
|
||||
unsigned reg = p->reg - SUNI1x10GEXP_REG_MSTAT_COUNTER_0_LOW;
|
||||
|
||||
pm3393_rmon_update((mac)->adapter, OFFSET(p->reg),
|
||||
stats + p->offset, ro & (reg >> 2));
|
||||
}
|
||||
|
||||
/* Rx stats */
|
||||
RMON_UPDATE(mac, RxOctetsReceivedOK, RxOctetsOK);
|
||||
RMON_UPDATE(mac, RxUnicastFramesReceivedOK, RxUnicastFramesOK);
|
||||
RMON_UPDATE(mac, RxMulticastFramesReceivedOK, RxMulticastFramesOK);
|
||||
RMON_UPDATE(mac, RxBroadcastFramesReceivedOK, RxBroadcastFramesOK);
|
||||
RMON_UPDATE(mac, RxPAUSEMACCtrlFramesReceived, RxPauseFrames);
|
||||
RMON_UPDATE(mac, RxFrameCheckSequenceErrors, RxFCSErrors);
|
||||
RMON_UPDATE(mac, RxFramesLostDueToInternalMACErrors,
|
||||
RxInternalMACRcvError);
|
||||
RMON_UPDATE(mac, RxSymbolErrors, RxSymbolErrors);
|
||||
RMON_UPDATE(mac, RxInRangeLengthErrors, RxInRangeLengthErrors);
|
||||
RMON_UPDATE(mac, RxFramesTooLongErrors , RxFrameTooLongErrors);
|
||||
RMON_UPDATE(mac, RxJabbers, RxJabberErrors);
|
||||
RMON_UPDATE(mac, RxFragments, RxRuntErrors);
|
||||
RMON_UPDATE(mac, RxUndersizedFrames, RxRuntErrors);
|
||||
RMON_UPDATE(mac, RxJumboFramesReceivedOK, RxJumboFramesOK);
|
||||
RMON_UPDATE(mac, RxJumboOctetsReceivedOK, RxJumboOctetsOK);
|
||||
|
||||
/* Tx stats */
|
||||
RMON_UPDATE(mac, TxOctetsTransmittedOK, TxOctetsOK);
|
||||
RMON_UPDATE(mac, TxFramesLostDueToInternalMACTransmissionError,
|
||||
TxInternalMACXmitError);
|
||||
RMON_UPDATE(mac, TxTransmitSystemError, TxFCSErrors);
|
||||
RMON_UPDATE(mac, TxUnicastFramesTransmittedOK, TxUnicastFramesOK);
|
||||
RMON_UPDATE(mac, TxMulticastFramesTransmittedOK, TxMulticastFramesOK);
|
||||
RMON_UPDATE(mac, TxBroadcastFramesTransmittedOK, TxBroadcastFramesOK);
|
||||
RMON_UPDATE(mac, TxPAUSEMACCtrlFramesTransmitted, TxPauseFrames);
|
||||
RMON_UPDATE(mac, TxJumboFramesReceivedOK, TxJumboFramesOK);
|
||||
RMON_UPDATE(mac, TxJumboOctetsReceivedOK, TxJumboOctetsOK);
|
||||
|
||||
return &mac->stats;
|
||||
}
|
||||
|
|
|
|||
|
|
@ -986,11 +986,10 @@ void t1_sge_get_port_stats(const struct sge *sge, int port,
|
|||
for_each_possible_cpu(cpu) {
|
||||
struct sge_port_stats *st = per_cpu_ptr(sge->port_stats[port], cpu);
|
||||
|
||||
ss->rx_packets += st->rx_packets;
|
||||
ss->rx_cso_good += st->rx_cso_good;
|
||||
ss->tx_packets += st->tx_packets;
|
||||
ss->tx_cso += st->tx_cso;
|
||||
ss->tx_tso += st->tx_tso;
|
||||
ss->tx_need_hdrroom += st->tx_need_hdrroom;
|
||||
ss->vlan_xtract += st->vlan_xtract;
|
||||
ss->vlan_insert += st->vlan_insert;
|
||||
}
|
||||
|
|
@ -1380,7 +1379,6 @@ static void sge_rx(struct sge *sge, struct freelQ *fl, unsigned int len)
|
|||
__skb_pull(skb, sizeof(*p));
|
||||
|
||||
st = per_cpu_ptr(sge->port_stats[p->iff], smp_processor_id());
|
||||
st->rx_packets++;
|
||||
|
||||
skb->protocol = eth_type_trans(skb, adapter->port[p->iff].dev);
|
||||
skb->dev->last_rx = jiffies;
|
||||
|
|
@ -1624,11 +1622,9 @@ int t1_poll(struct napi_struct *napi, int budget)
|
|||
{
|
||||
struct adapter *adapter = container_of(napi, struct adapter, napi);
|
||||
struct net_device *dev = adapter->port[0].dev;
|
||||
int work_done;
|
||||
int work_done = process_responses(adapter, budget);
|
||||
|
||||
work_done = process_responses(adapter, budget);
|
||||
|
||||
if (likely(!responses_pending(adapter))) {
|
||||
if (likely(work_done < budget)) {
|
||||
netif_rx_complete(dev, napi);
|
||||
writel(adapter->sge->respQ.cidx,
|
||||
adapter->regs + A_SG_SLEEPING);
|
||||
|
|
@ -1848,7 +1844,8 @@ int t1_start_xmit(struct sk_buff *skb, struct net_device *dev)
|
|||
{
|
||||
struct adapter *adapter = dev->priv;
|
||||
struct sge *sge = adapter->sge;
|
||||
struct sge_port_stats *st = per_cpu_ptr(sge->port_stats[dev->if_port], smp_processor_id());
|
||||
struct sge_port_stats *st = per_cpu_ptr(sge->port_stats[dev->if_port],
|
||||
smp_processor_id());
|
||||
struct cpl_tx_pkt *cpl;
|
||||
struct sk_buff *orig_skb = skb;
|
||||
int ret;
|
||||
|
|
@ -1856,6 +1853,18 @@ int t1_start_xmit(struct sk_buff *skb, struct net_device *dev)
|
|||
if (skb->protocol == htons(ETH_P_CPL5))
|
||||
goto send;
|
||||
|
||||
/*
|
||||
* We are using a non-standard hard_header_len.
|
||||
* Allocate more header room in the rare cases it is not big enough.
|
||||
*/
|
||||
if (unlikely(skb_headroom(skb) < dev->hard_header_len - ETH_HLEN)) {
|
||||
skb = skb_realloc_headroom(skb, sizeof(struct cpl_tx_pkt_lso));
|
||||
++st->tx_need_hdrroom;
|
||||
dev_kfree_skb_any(orig_skb);
|
||||
if (!skb)
|
||||
return NETDEV_TX_OK;
|
||||
}
|
||||
|
||||
if (skb_shinfo(skb)->gso_size) {
|
||||
int eth_type;
|
||||
struct cpl_tx_pkt_lso *hdr;
|
||||
|
|
@ -1889,24 +1898,6 @@ int t1_start_xmit(struct sk_buff *skb, struct net_device *dev)
|
|||
return NETDEV_TX_OK;
|
||||
}
|
||||
|
||||
/*
|
||||
* We are using a non-standard hard_header_len and some kernel
|
||||
* components, such as pktgen, do not handle it right.
|
||||
* Complain when this happens but try to fix things up.
|
||||
*/
|
||||
if (unlikely(skb_headroom(skb) < dev->hard_header_len - ETH_HLEN)) {
|
||||
pr_debug("%s: headroom %d header_len %d\n", dev->name,
|
||||
skb_headroom(skb), dev->hard_header_len);
|
||||
|
||||
if (net_ratelimit())
|
||||
printk(KERN_ERR "%s: inadequate headroom in "
|
||||
"Tx packet\n", dev->name);
|
||||
skb = skb_realloc_headroom(skb, sizeof(*cpl));
|
||||
dev_kfree_skb_any(orig_skb);
|
||||
if (!skb)
|
||||
return NETDEV_TX_OK;
|
||||
}
|
||||
|
||||
if (!(adapter->flags & UDP_CSUM_CAPABLE) &&
|
||||
skb->ip_summed == CHECKSUM_PARTIAL &&
|
||||
ip_hdr(skb)->protocol == IPPROTO_UDP) {
|
||||
|
|
@ -1952,7 +1943,6 @@ int t1_start_xmit(struct sk_buff *skb, struct net_device *dev)
|
|||
cpl->vlan_valid = 0;
|
||||
|
||||
send:
|
||||
st->tx_packets++;
|
||||
dev->trans_start = jiffies;
|
||||
ret = t1_sge_tx(skb, adapter, 0, dev);
|
||||
|
||||
|
|
|
|||
|
|
@ -57,13 +57,12 @@ struct sge_intr_counts {
|
|||
};
|
||||
|
||||
struct sge_port_stats {
|
||||
u64 rx_packets; /* # of Ethernet packets received */
|
||||
u64 rx_cso_good; /* # of successful RX csum offloads */
|
||||
u64 tx_packets; /* # of TX packets */
|
||||
u64 tx_cso; /* # of TX checksum offloads */
|
||||
u64 tx_tso; /* # of TSO requests */
|
||||
u64 vlan_xtract; /* # of VLAN tag extractions */
|
||||
u64 vlan_insert; /* # of VLAN tag insertions */
|
||||
u64 tx_need_hdrroom; /* # of TX skbs in need of more header room */
|
||||
};
|
||||
|
||||
struct sk_buff;
|
||||
|
|
|
|||
|
|
@ -1937,6 +1937,10 @@
|
|||
|
||||
#define A_XGM_RXFIFO_CFG 0x884
|
||||
|
||||
#define S_RXFIFO_EMPTY 31
|
||||
#define V_RXFIFO_EMPTY(x) ((x) << S_RXFIFO_EMPTY)
|
||||
#define F_RXFIFO_EMPTY V_RXFIFO_EMPTY(1U)
|
||||
|
||||
#define S_RXFIFOPAUSEHWM 17
|
||||
#define M_RXFIFOPAUSEHWM 0xfff
|
||||
|
||||
|
|
@ -1961,6 +1965,10 @@
|
|||
|
||||
#define A_XGM_TXFIFO_CFG 0x888
|
||||
|
||||
#define S_UNDERUNFIX 22
|
||||
#define V_UNDERUNFIX(x) ((x) << S_UNDERUNFIX)
|
||||
#define F_UNDERUNFIX V_UNDERUNFIX(1U)
|
||||
|
||||
#define S_TXIPG 13
|
||||
#define M_TXIPG 0xff
|
||||
#define V_TXIPG(x) ((x) << S_TXIPG)
|
||||
|
|
@ -2034,10 +2042,27 @@
|
|||
#define V_XAUIIMP(x) ((x) << S_XAUIIMP)
|
||||
|
||||
#define A_XGM_RX_MAX_PKT_SIZE 0x8a8
|
||||
#define A_XGM_RX_MAX_PKT_SIZE_ERR_CNT 0x9a4
|
||||
|
||||
#define S_RXMAXFRAMERSIZE 17
|
||||
#define M_RXMAXFRAMERSIZE 0x3fff
|
||||
#define V_RXMAXFRAMERSIZE(x) ((x) << S_RXMAXFRAMERSIZE)
|
||||
#define G_RXMAXFRAMERSIZE(x) (((x) >> S_RXMAXFRAMERSIZE) & M_RXMAXFRAMERSIZE)
|
||||
|
||||
#define S_RXENFRAMER 14
|
||||
#define V_RXENFRAMER(x) ((x) << S_RXENFRAMER)
|
||||
#define F_RXENFRAMER V_RXENFRAMER(1U)
|
||||
|
||||
#define S_RXMAXPKTSIZE 0
|
||||
#define M_RXMAXPKTSIZE 0x3fff
|
||||
#define V_RXMAXPKTSIZE(x) ((x) << S_RXMAXPKTSIZE)
|
||||
#define G_RXMAXPKTSIZE(x) (((x) >> S_RXMAXPKTSIZE) & M_RXMAXPKTSIZE)
|
||||
|
||||
#define A_XGM_RESET_CTRL 0x8ac
|
||||
|
||||
#define S_XGMAC_STOP_EN 4
|
||||
#define V_XGMAC_STOP_EN(x) ((x) << S_XGMAC_STOP_EN)
|
||||
#define F_XGMAC_STOP_EN V_XGMAC_STOP_EN(1U)
|
||||
|
||||
#define S_XG2G_RESET_ 3
|
||||
#define V_XG2G_RESET_(x) ((x) << S_XG2G_RESET_)
|
||||
#define F_XG2G_RESET_ V_XG2G_RESET_(1U)
|
||||
|
|
|
|||
|
|
@ -447,8 +447,8 @@ static const struct adapter_info t3_adap_info[] = {
|
|||
&mi1_mdio_ops, "Chelsio T302"},
|
||||
{1, 0, 0, 0,
|
||||
F_GPIO1_OEN | F_GPIO6_OEN | F_GPIO7_OEN | F_GPIO10_OEN |
|
||||
F_GPIO1_OUT_VAL | F_GPIO6_OUT_VAL | F_GPIO10_OUT_VAL, 0,
|
||||
SUPPORTED_10000baseT_Full | SUPPORTED_AUI,
|
||||
F_GPIO11_OEN | F_GPIO1_OUT_VAL | F_GPIO6_OUT_VAL | F_GPIO10_OUT_VAL,
|
||||
0, SUPPORTED_10000baseT_Full | SUPPORTED_AUI,
|
||||
&mi1_mdio_ext_ops, "Chelsio T310"},
|
||||
{2, 0, 0, 0,
|
||||
F_GPIO1_OEN | F_GPIO2_OEN | F_GPIO4_OEN | F_GPIO5_OEN | F_GPIO6_OEN |
|
||||
|
|
@ -2613,7 +2613,7 @@ static void __devinit init_mtus(unsigned short mtus[])
|
|||
* it can accomodate max size TCP/IP headers when SACK and timestamps
|
||||
* are enabled and still have at least 8 bytes of payload.
|
||||
*/
|
||||
mtus[1] = 88;
|
||||
mtus[0] = 88;
|
||||
mtus[1] = 88;
|
||||
mtus[2] = 256;
|
||||
mtus[3] = 512;
|
||||
|
|
|
|||
|
|
@ -106,6 +106,7 @@ int t3_mac_reset(struct cmac *mac)
|
|||
t3_set_reg_field(adap, A_XGM_RXFIFO_CFG + oft,
|
||||
F_RXSTRFRWRD | F_DISERRFRAMES,
|
||||
uses_xaui(adap) ? 0 : F_RXSTRFRWRD);
|
||||
t3_set_reg_field(adap, A_XGM_TXFIFO_CFG + oft, 0, F_UNDERUNFIX);
|
||||
|
||||
if (uses_xaui(adap)) {
|
||||
if (adap->params.rev == 0) {
|
||||
|
|
@ -124,7 +125,11 @@ int t3_mac_reset(struct cmac *mac)
|
|||
xaui_serdes_reset(mac);
|
||||
}
|
||||
|
||||
val = F_MAC_RESET_;
|
||||
t3_set_reg_field(adap, A_XGM_RX_MAX_PKT_SIZE + oft,
|
||||
V_RXMAXFRAMERSIZE(M_RXMAXFRAMERSIZE),
|
||||
V_RXMAXFRAMERSIZE(MAX_FRAME_SIZE) | F_RXENFRAMER);
|
||||
val = F_MAC_RESET_ | F_XGMAC_STOP_EN;
|
||||
|
||||
if (is_10G(adap))
|
||||
val |= F_PCS_RESET_;
|
||||
else if (uses_xaui(adap))
|
||||
|
|
@ -313,8 +318,9 @@ static int rx_fifo_hwm(int mtu)
|
|||
|
||||
int t3_mac_set_mtu(struct cmac *mac, unsigned int mtu)
|
||||
{
|
||||
int hwm, lwm;
|
||||
unsigned int thres, v;
|
||||
int hwm, lwm, divisor;
|
||||
int ipg;
|
||||
unsigned int thres, v, reg;
|
||||
struct adapter *adap = mac->adapter;
|
||||
|
||||
/*
|
||||
|
|
@ -335,27 +341,32 @@ int t3_mac_set_mtu(struct cmac *mac, unsigned int mtu)
|
|||
hwm = min(hwm, MAC_RXFIFO_SIZE - 8192);
|
||||
lwm = min(3 * (int)mtu, MAC_RXFIFO_SIZE / 4);
|
||||
|
||||
if (adap->params.rev == T3_REV_B2 &&
|
||||
if (adap->params.rev >= T3_REV_B2 &&
|
||||
(t3_read_reg(adap, A_XGM_RX_CTRL + mac->offset) & F_RXEN)) {
|
||||
disable_exact_filters(mac);
|
||||
v = t3_read_reg(adap, A_XGM_RX_CFG + mac->offset);
|
||||
t3_set_reg_field(adap, A_XGM_RX_CFG + mac->offset,
|
||||
F_ENHASHMCAST | F_COPYALLFRAMES, F_DISBCAST);
|
||||
|
||||
/* drain rx FIFO */
|
||||
if (t3_wait_op_done(adap,
|
||||
A_XGM_RX_MAX_PKT_SIZE_ERR_CNT +
|
||||
mac->offset,
|
||||
1 << 31, 1, 20, 5)) {
|
||||
reg = adap->params.rev == T3_REV_B2 ?
|
||||
A_XGM_RX_MAX_PKT_SIZE_ERR_CNT : A_XGM_RXFIFO_CFG;
|
||||
|
||||
/* drain RX FIFO */
|
||||
if (t3_wait_op_done(adap, reg + mac->offset,
|
||||
F_RXFIFO_EMPTY, 1, 20, 5)) {
|
||||
t3_write_reg(adap, A_XGM_RX_CFG + mac->offset, v);
|
||||
enable_exact_filters(mac);
|
||||
return -EIO;
|
||||
}
|
||||
t3_write_reg(adap, A_XGM_RX_MAX_PKT_SIZE + mac->offset, mtu);
|
||||
t3_set_reg_field(adap, A_XGM_RX_MAX_PKT_SIZE + mac->offset,
|
||||
V_RXMAXPKTSIZE(M_RXMAXPKTSIZE),
|
||||
V_RXMAXPKTSIZE(mtu));
|
||||
t3_write_reg(adap, A_XGM_RX_CFG + mac->offset, v);
|
||||
enable_exact_filters(mac);
|
||||
} else
|
||||
t3_write_reg(adap, A_XGM_RX_MAX_PKT_SIZE + mac->offset, mtu);
|
||||
t3_set_reg_field(adap, A_XGM_RX_MAX_PKT_SIZE + mac->offset,
|
||||
V_RXMAXPKTSIZE(M_RXMAXPKTSIZE),
|
||||
V_RXMAXPKTSIZE(mtu));
|
||||
|
||||
/*
|
||||
* Adjust the PAUSE frame watermarks. We always set the LWM, and the
|
||||
|
|
@ -379,13 +390,16 @@ int t3_mac_set_mtu(struct cmac *mac, unsigned int mtu)
|
|||
thres /= 10;
|
||||
thres = mtu > thres ? (mtu - thres + 7) / 8 : 0;
|
||||
thres = max(thres, 8U); /* need at least 8 */
|
||||
ipg = (adap->params.rev == T3_REV_C) ? 0 : 1;
|
||||
t3_set_reg_field(adap, A_XGM_TXFIFO_CFG + mac->offset,
|
||||
V_TXFIFOTHRESH(M_TXFIFOTHRESH) | V_TXIPG(M_TXIPG),
|
||||
V_TXFIFOTHRESH(thres) | V_TXIPG(1));
|
||||
V_TXFIFOTHRESH(thres) | V_TXIPG(ipg));
|
||||
|
||||
if (adap->params.rev > 0)
|
||||
if (adap->params.rev > 0) {
|
||||
divisor = (adap->params.rev == T3_REV_C) ? 64 : 8;
|
||||
t3_write_reg(adap, A_XGM_PAUSE_TIMER + mac->offset,
|
||||
(hwm - lwm) * 4 / 8);
|
||||
(hwm - lwm) * 4 / divisor);
|
||||
}
|
||||
t3_write_reg(adap, A_XGM_TX_PAUSE_QUANTA + mac->offset,
|
||||
MAC_RXFIFO_SIZE * 4 * 8 / 512);
|
||||
return 0;
|
||||
|
|
@ -522,7 +536,7 @@ int t3b2_mac_watchdog_task(struct cmac *mac)
|
|||
goto rxcheck;
|
||||
}
|
||||
|
||||
if ((tx_tcnt != mac->tx_tcnt) && (mac->tx_xcnt == 0)) {
|
||||
if ((tx_tcnt != mac->tx_tcnt) && (mac->tx_xcnt == 0)) {
|
||||
if (mac->toggle_cnt > 4) {
|
||||
status = 2;
|
||||
goto out;
|
||||
|
|
|
|||
|
|
@ -2214,13 +2214,11 @@ static void e100_get_drvinfo(struct net_device *netdev,
|
|||
strcpy(info->bus_info, pci_name(nic->pdev));
|
||||
}
|
||||
|
||||
#define E100_PHY_REGS 0x1C
|
||||
static int e100_get_regs_len(struct net_device *netdev)
|
||||
{
|
||||
struct nic *nic = netdev_priv(netdev);
|
||||
#define E100_PHY_REGS 0x1C
|
||||
#define E100_REGS_LEN 1 + E100_PHY_REGS + \
|
||||
sizeof(nic->mem->dump_buf) / sizeof(u32)
|
||||
return E100_REGS_LEN * sizeof(u32);
|
||||
return 1 + E100_PHY_REGS + sizeof(nic->mem->dump_buf);
|
||||
}
|
||||
|
||||
static void e100_get_regs(struct net_device *netdev,
|
||||
|
|
|
|||
|
|
@ -1923,7 +1923,7 @@ e1000_get_strings(struct net_device *netdev, uint32_t stringset, uint8_t *data)
|
|||
switch (stringset) {
|
||||
case ETH_SS_TEST:
|
||||
memcpy(data, *e1000_gstrings_test,
|
||||
E1000_TEST_LEN*ETH_GSTRING_LEN);
|
||||
sizeof(e1000_gstrings_test));
|
||||
break;
|
||||
case ETH_SS_STATS:
|
||||
for (i = 0; i < E1000_GLOBAL_STATS_LEN; i++) {
|
||||
|
|
|
|||
|
|
@ -3942,7 +3942,7 @@ e1000_clean(struct napi_struct *napi, int budget)
|
|||
&work_done, budget);
|
||||
|
||||
/* If no Tx and not enough Rx work done, exit the polling mode */
|
||||
if ((!tx_cleaned && (work_done < budget)) ||
|
||||
if ((!tx_cleaned && (work_done == 0)) ||
|
||||
!netif_running(poll_dev)) {
|
||||
quit_polling:
|
||||
if (likely(adapter->itr_setting & 3))
|
||||
|
|
|
|||
|
|
@ -1739,7 +1739,7 @@ static void e1000_get_strings(struct net_device *netdev, u32 stringset,
|
|||
switch (stringset) {
|
||||
case ETH_SS_TEST:
|
||||
memcpy(data, *e1000_gstrings_test,
|
||||
E1000_TEST_LEN*ETH_GSTRING_LEN);
|
||||
sizeof(e1000_gstrings_test));
|
||||
break;
|
||||
case ETH_SS_STATS:
|
||||
for (i = 0; i < E1000_GLOBAL_STATS_LEN; i++) {
|
||||
|
|
|
|||
|
|
@ -40,7 +40,7 @@
|
|||
#include <asm/io.h>
|
||||
|
||||
#define DRV_NAME "ehea"
|
||||
#define DRV_VERSION "EHEA_0080"
|
||||
#define DRV_VERSION "EHEA_0083"
|
||||
|
||||
/* eHEA capability flags */
|
||||
#define DLPAR_PORT_ADD_REM 1
|
||||
|
|
|
|||
|
|
@ -136,7 +136,7 @@ static struct net_device_stats *ehea_get_stats(struct net_device *dev)
|
|||
struct ehea_port *port = netdev_priv(dev);
|
||||
struct net_device_stats *stats = &port->stats;
|
||||
struct hcp_ehea_port_cb2 *cb2;
|
||||
u64 hret, rx_packets;
|
||||
u64 hret, rx_packets, tx_packets;
|
||||
int i;
|
||||
|
||||
memset(stats, 0, sizeof(*stats));
|
||||
|
|
@ -162,7 +162,11 @@ static struct net_device_stats *ehea_get_stats(struct net_device *dev)
|
|||
for (i = 0; i < port->num_def_qps; i++)
|
||||
rx_packets += port->port_res[i].rx_packets;
|
||||
|
||||
stats->tx_packets = cb2->txucp + cb2->txmcp + cb2->txbcp;
|
||||
tx_packets = 0;
|
||||
for (i = 0; i < port->num_def_qps + port->num_add_tx_qps; i++)
|
||||
tx_packets += port->port_res[i].tx_packets;
|
||||
|
||||
stats->tx_packets = tx_packets;
|
||||
stats->multicast = cb2->rxmcp;
|
||||
stats->rx_errors = cb2->rxuerr;
|
||||
stats->rx_bytes = cb2->rxo;
|
||||
|
|
@ -406,11 +410,6 @@ static int ehea_treat_poll_error(struct ehea_port_res *pr, int rq,
|
|||
if (cqe->status & EHEA_CQE_STAT_ERR_CRC)
|
||||
pr->p_stats.err_frame_crc++;
|
||||
|
||||
if (netif_msg_rx_err(pr->port)) {
|
||||
ehea_error("CQE Error for QP %d", pr->qp->init_attr.qp_nr);
|
||||
ehea_dump(cqe, sizeof(*cqe), "CQE");
|
||||
}
|
||||
|
||||
if (rq == 2) {
|
||||
*processed_rq2 += 1;
|
||||
skb = get_skb_by_index(pr->rq2_skba.arr, pr->rq2_skba.len, cqe);
|
||||
|
|
@ -422,7 +421,11 @@ static int ehea_treat_poll_error(struct ehea_port_res *pr, int rq,
|
|||
}
|
||||
|
||||
if (cqe->status & EHEA_CQE_STAT_FAT_ERR_MASK) {
|
||||
ehea_error("Critical receive error. Resetting port.");
|
||||
if (netif_msg_rx_err(pr->port)) {
|
||||
ehea_error("Critical receive error for QP %d. "
|
||||
"Resetting port.", pr->qp->init_attr.qp_nr);
|
||||
ehea_dump(cqe, sizeof(*cqe), "CQE");
|
||||
}
|
||||
schedule_work(&pr->port->reset_task);
|
||||
return 1;
|
||||
}
|
||||
|
|
@ -2000,6 +2003,7 @@ static int ehea_start_xmit(struct sk_buff *skb, struct net_device *dev)
|
|||
}
|
||||
|
||||
ehea_post_swqe(pr->qp, swqe);
|
||||
pr->tx_packets++;
|
||||
|
||||
if (unlikely(atomic_read(&pr->swqe_avail) <= 1)) {
|
||||
spin_lock_irqsave(&pr->netif_queue, flags);
|
||||
|
|
|
|||
|
|
@ -145,8 +145,8 @@ struct ehea_rwqe {
|
|||
#define EHEA_CQE_VLAN_TAG_XTRACT 0x0400
|
||||
|
||||
#define EHEA_CQE_TYPE_RQ 0x60
|
||||
#define EHEA_CQE_STAT_ERR_MASK 0x720F
|
||||
#define EHEA_CQE_STAT_FAT_ERR_MASK 0x1F
|
||||
#define EHEA_CQE_STAT_ERR_MASK 0x700F
|
||||
#define EHEA_CQE_STAT_FAT_ERR_MASK 0xF
|
||||
#define EHEA_CQE_STAT_ERR_TCP 0x4000
|
||||
#define EHEA_CQE_STAT_ERR_IP 0x2000
|
||||
#define EHEA_CQE_STAT_ERR_CRC 0x1000
|
||||
|
|
|
|||
|
|
@ -422,7 +422,7 @@ static irqreturn_t mpc52xx_fec_rx_interrupt(int irq, void *dev_id)
|
|||
|
||||
rskb = bcom_retrieve_buffer(priv->rx_dmatsk, &status,
|
||||
(struct bcom_bd **)&bd);
|
||||
dma_unmap_single(&dev->dev, bd->skb_pa, skb->len, DMA_FROM_DEVICE);
|
||||
dma_unmap_single(&dev->dev, bd->skb_pa, rskb->len, DMA_FROM_DEVICE);
|
||||
|
||||
/* Test for errors in received frame */
|
||||
if (status & BCOM_FEC_RX_BD_ERRORS) {
|
||||
|
|
@ -467,7 +467,7 @@ static irqreturn_t mpc52xx_fec_rx_interrupt(int irq, void *dev_id)
|
|||
bcom_prepare_next_buffer(priv->rx_dmatsk);
|
||||
|
||||
bd->status = FEC_RX_BUFFER_SIZE;
|
||||
bd->skb_pa = dma_map_single(&dev->dev, rskb->data,
|
||||
bd->skb_pa = dma_map_single(&dev->dev, skb->data,
|
||||
FEC_RX_BUFFER_SIZE, DMA_FROM_DEVICE);
|
||||
|
||||
bcom_submit_next_buffer(priv->rx_dmatsk, skb);
|
||||
|
|
@ -971,6 +971,8 @@ mpc52xx_fec_probe(struct of_device *op, const struct of_device_id *match)
|
|||
|
||||
mpc52xx_fec_reset_stats(ndev);
|
||||
|
||||
SET_NETDEV_DEV(ndev, &op->dev);
|
||||
|
||||
/* Register the new network device */
|
||||
rv = register_netdev(ndev);
|
||||
if (rv < 0)
|
||||
|
|
|
|||
|
|
@ -5286,19 +5286,15 @@ static int __devinit nv_probe(struct pci_dev *pci_dev, const struct pci_device_i
|
|||
if (readl(base + NvRegTransmitterControl) & NVREG_XMITCTL_SYNC_PHY_INIT) {
|
||||
np->mac_in_use = readl(base + NvRegTransmitterControl) & NVREG_XMITCTL_MGMT_ST;
|
||||
dprintk(KERN_INFO "%s: mgmt unit is running. mac in use %x.\n", pci_name(pci_dev), np->mac_in_use);
|
||||
for (i = 0; i < 5000; i++) {
|
||||
msleep(1);
|
||||
if (nv_mgmt_acquire_sema(dev)) {
|
||||
/* management unit setup the phy already? */
|
||||
if ((readl(base + NvRegTransmitterControl) & NVREG_XMITCTL_SYNC_MASK) ==
|
||||
NVREG_XMITCTL_SYNC_PHY_INIT) {
|
||||
/* phy is inited by mgmt unit */
|
||||
phyinitialized = 1;
|
||||
dprintk(KERN_INFO "%s: Phy already initialized by mgmt unit.\n", pci_name(pci_dev));
|
||||
} else {
|
||||
/* we need to init the phy */
|
||||
}
|
||||
break;
|
||||
if (nv_mgmt_acquire_sema(dev)) {
|
||||
/* management unit setup the phy already? */
|
||||
if ((readl(base + NvRegTransmitterControl) & NVREG_XMITCTL_SYNC_MASK) ==
|
||||
NVREG_XMITCTL_SYNC_PHY_INIT) {
|
||||
/* phy is inited by mgmt unit */
|
||||
phyinitialized = 1;
|
||||
dprintk(KERN_INFO "%s: Phy already initialized by mgmt unit.\n", pci_name(pci_dev));
|
||||
} else {
|
||||
/* we need to init the phy */
|
||||
}
|
||||
}
|
||||
}
|
||||
|
|
@ -5613,6 +5609,22 @@ static struct pci_device_id pci_tbl[] = {
|
|||
PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NVENET_35),
|
||||
.driver_data = DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER|DEV_HAS_CHECKSUM|DEV_HAS_HIGH_DMA|DEV_HAS_MSI|DEV_HAS_POWER_CNTRL|DEV_HAS_PAUSEFRAME_TX|DEV_HAS_STATISTICS_V2|DEV_HAS_TEST_EXTENDED|DEV_HAS_MGMT_UNIT,
|
||||
},
|
||||
{ /* MCP79 Ethernet Controller */
|
||||
PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NVENET_36),
|
||||
.driver_data = DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER|DEV_HAS_CHECKSUM|DEV_HAS_HIGH_DMA|DEV_HAS_MSI|DEV_HAS_POWER_CNTRL|DEV_HAS_PAUSEFRAME_TX|DEV_HAS_STATISTICS_V2|DEV_HAS_TEST_EXTENDED|DEV_HAS_MGMT_UNIT,
|
||||
},
|
||||
{ /* MCP79 Ethernet Controller */
|
||||
PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NVENET_37),
|
||||
.driver_data = DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER|DEV_HAS_CHECKSUM|DEV_HAS_HIGH_DMA|DEV_HAS_MSI|DEV_HAS_POWER_CNTRL|DEV_HAS_PAUSEFRAME_TX|DEV_HAS_STATISTICS_V2|DEV_HAS_TEST_EXTENDED|DEV_HAS_MGMT_UNIT,
|
||||
},
|
||||
{ /* MCP79 Ethernet Controller */
|
||||
PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NVENET_38),
|
||||
.driver_data = DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER|DEV_HAS_CHECKSUM|DEV_HAS_HIGH_DMA|DEV_HAS_MSI|DEV_HAS_POWER_CNTRL|DEV_HAS_PAUSEFRAME_TX|DEV_HAS_STATISTICS_V2|DEV_HAS_TEST_EXTENDED|DEV_HAS_MGMT_UNIT,
|
||||
},
|
||||
{ /* MCP79 Ethernet Controller */
|
||||
PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NVENET_39),
|
||||
.driver_data = DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER|DEV_HAS_CHECKSUM|DEV_HAS_HIGH_DMA|DEV_HAS_MSI|DEV_HAS_POWER_CNTRL|DEV_HAS_PAUSEFRAME_TX|DEV_HAS_STATISTICS_V2|DEV_HAS_TEST_EXTENDED|DEV_HAS_MGMT_UNIT,
|
||||
},
|
||||
{0,},
|
||||
};
|
||||
|
||||
|
|
|
|||
|
|
@ -696,7 +696,7 @@ int startup_gfar(struct net_device *dev)
|
|||
{
|
||||
struct txbd8 *txbdp;
|
||||
struct rxbd8 *rxbdp;
|
||||
dma_addr_t addr;
|
||||
dma_addr_t addr = 0;
|
||||
unsigned long vaddr;
|
||||
int i;
|
||||
struct gfar_private *priv = netdev_priv(dev);
|
||||
|
|
|
|||
|
|
@ -3,6 +3,11 @@
|
|||
*
|
||||
* Driver for PowerPC 4xx on-chip ethernet controller.
|
||||
*
|
||||
* Copyright 2007 Benjamin Herrenschmidt, IBM Corp.
|
||||
* <benh@kernel.crashing.org>
|
||||
*
|
||||
* Based on the arch/ppc version of the driver:
|
||||
*
|
||||
* Copyright (c) 2004, 2005 Zultys Technologies.
|
||||
* Eugene Surovegin <eugene.surovegin@zultys.com> or <ebs@ebshome.net>
|
||||
*
|
||||
|
|
@ -402,7 +407,7 @@ static u32 __emac_calc_base_mr1(struct emac_instance *dev, int tx_size, int rx_s
|
|||
static u32 __emac4_calc_base_mr1(struct emac_instance *dev, int tx_size, int rx_size)
|
||||
{
|
||||
u32 ret = EMAC_MR1_VLE | EMAC_MR1_IST | EMAC4_MR1_TR |
|
||||
EMAC4_MR1_OBCI(dev->opb_bus_freq);
|
||||
EMAC4_MR1_OBCI(dev->opb_bus_freq / 1000000);
|
||||
|
||||
DBG2(dev, "__emac4_calc_base_mr1" NL);
|
||||
|
||||
|
|
@ -464,26 +469,34 @@ static int emac_configure(struct emac_instance *dev)
|
|||
{
|
||||
struct emac_regs __iomem *p = dev->emacp;
|
||||
struct net_device *ndev = dev->ndev;
|
||||
int tx_size, rx_size;
|
||||
int tx_size, rx_size, link = netif_carrier_ok(dev->ndev);
|
||||
u32 r, mr1 = 0;
|
||||
|
||||
DBG(dev, "configure" NL);
|
||||
|
||||
if (emac_reset(dev) < 0)
|
||||
if (!link) {
|
||||
out_be32(&p->mr1, in_be32(&p->mr1)
|
||||
| EMAC_MR1_FDE | EMAC_MR1_ILE);
|
||||
udelay(100);
|
||||
} else if (emac_reset(dev) < 0)
|
||||
return -ETIMEDOUT;
|
||||
|
||||
if (emac_has_feature(dev, EMAC_FTR_HAS_TAH))
|
||||
tah_reset(dev->tah_dev);
|
||||
|
||||
DBG(dev, " duplex = %d, pause = %d, asym_pause = %d\n",
|
||||
dev->phy.duplex, dev->phy.pause, dev->phy.asym_pause);
|
||||
DBG(dev, " link = %d duplex = %d, pause = %d, asym_pause = %d\n",
|
||||
link, dev->phy.duplex, dev->phy.pause, dev->phy.asym_pause);
|
||||
|
||||
/* Default fifo sizes */
|
||||
tx_size = dev->tx_fifo_size;
|
||||
rx_size = dev->rx_fifo_size;
|
||||
|
||||
/* No link, force loopback */
|
||||
if (!link)
|
||||
mr1 = EMAC_MR1_FDE | EMAC_MR1_ILE;
|
||||
|
||||
/* Check for full duplex */
|
||||
if (dev->phy.duplex == DUPLEX_FULL)
|
||||
else if (dev->phy.duplex == DUPLEX_FULL)
|
||||
mr1 |= EMAC_MR1_FDE | EMAC_MR1_MWSW_001;
|
||||
|
||||
/* Adjust fifo sizes, mr1 and timeouts based on link speed */
|
||||
|
|
@ -642,9 +655,11 @@ static void emac_reset_work(struct work_struct *work)
|
|||
DBG(dev, "reset_work" NL);
|
||||
|
||||
mutex_lock(&dev->link_lock);
|
||||
emac_netif_stop(dev);
|
||||
emac_full_tx_reset(dev);
|
||||
emac_netif_start(dev);
|
||||
if (dev->opened) {
|
||||
emac_netif_stop(dev);
|
||||
emac_full_tx_reset(dev);
|
||||
emac_netif_start(dev);
|
||||
}
|
||||
mutex_unlock(&dev->link_lock);
|
||||
}
|
||||
|
||||
|
|
@ -701,7 +716,7 @@ static int __emac_mdio_read(struct emac_instance *dev, u8 id, u8 reg)
|
|||
r = EMAC_STACR_BASE(dev->opb_bus_freq);
|
||||
if (emac_has_feature(dev, EMAC_FTR_STACR_OC_INVERT))
|
||||
r |= EMAC_STACR_OC;
|
||||
if (emac_has_feature(dev, EMAC_FTR_HAS_AXON_STACR))
|
||||
if (emac_has_feature(dev, EMAC_FTR_HAS_NEW_STACR))
|
||||
r |= EMACX_STACR_STAC_READ;
|
||||
else
|
||||
r |= EMAC_STACR_STAC_READ;
|
||||
|
|
@ -773,7 +788,7 @@ static void __emac_mdio_write(struct emac_instance *dev, u8 id, u8 reg,
|
|||
r = EMAC_STACR_BASE(dev->opb_bus_freq);
|
||||
if (emac_has_feature(dev, EMAC_FTR_STACR_OC_INVERT))
|
||||
r |= EMAC_STACR_OC;
|
||||
if (emac_has_feature(dev, EMAC_FTR_HAS_AXON_STACR))
|
||||
if (emac_has_feature(dev, EMAC_FTR_HAS_NEW_STACR))
|
||||
r |= EMACX_STACR_STAC_WRITE;
|
||||
else
|
||||
r |= EMAC_STACR_STAC_WRITE;
|
||||
|
|
@ -1063,10 +1078,9 @@ static int emac_open(struct net_device *ndev)
|
|||
dev->rx_sg_skb = NULL;
|
||||
|
||||
mutex_lock(&dev->link_lock);
|
||||
dev->opened = 1;
|
||||
|
||||
/* XXX Start PHY polling now. Shouldn't wr do like sungem instead and
|
||||
* always poll the PHY even when the iface is down ? That would allow
|
||||
* things like laptop-net to work. --BenH
|
||||
/* Start PHY polling now.
|
||||
*/
|
||||
if (dev->phy.address >= 0) {
|
||||
int link_poll_interval;
|
||||
|
|
@ -1145,9 +1159,11 @@ static void emac_link_timer(struct work_struct *work)
|
|||
int link_poll_interval;
|
||||
|
||||
mutex_lock(&dev->link_lock);
|
||||
|
||||
DBG2(dev, "link timer" NL);
|
||||
|
||||
if (!dev->opened)
|
||||
goto bail;
|
||||
|
||||
if (dev->phy.def->ops->poll_link(&dev->phy)) {
|
||||
if (!netif_carrier_ok(dev->ndev)) {
|
||||
/* Get new link parameters */
|
||||
|
|
@ -1162,21 +1178,22 @@ static void emac_link_timer(struct work_struct *work)
|
|||
link_poll_interval = PHY_POLL_LINK_ON;
|
||||
} else {
|
||||
if (netif_carrier_ok(dev->ndev)) {
|
||||
emac_reinitialize(dev);
|
||||
netif_carrier_off(dev->ndev);
|
||||
netif_tx_disable(dev->ndev);
|
||||
emac_reinitialize(dev);
|
||||
emac_print_link_status(dev);
|
||||
}
|
||||
link_poll_interval = PHY_POLL_LINK_OFF;
|
||||
}
|
||||
schedule_delayed_work(&dev->link_work, link_poll_interval);
|
||||
|
||||
bail:
|
||||
mutex_unlock(&dev->link_lock);
|
||||
}
|
||||
|
||||
static void emac_force_link_update(struct emac_instance *dev)
|
||||
{
|
||||
netif_carrier_off(dev->ndev);
|
||||
smp_rmb();
|
||||
if (dev->link_polling) {
|
||||
cancel_rearming_delayed_work(&dev->link_work);
|
||||
if (dev->link_polling)
|
||||
|
|
@ -1191,11 +1208,14 @@ static int emac_close(struct net_device *ndev)
|
|||
|
||||
DBG(dev, "close" NL);
|
||||
|
||||
if (dev->phy.address >= 0)
|
||||
if (dev->phy.address >= 0) {
|
||||
dev->link_polling = 0;
|
||||
cancel_rearming_delayed_work(&dev->link_work);
|
||||
|
||||
}
|
||||
mutex_lock(&dev->link_lock);
|
||||
emac_netif_stop(dev);
|
||||
flush_scheduled_work();
|
||||
dev->opened = 0;
|
||||
mutex_unlock(&dev->link_lock);
|
||||
|
||||
emac_rx_disable(dev);
|
||||
emac_tx_disable(dev);
|
||||
|
|
@ -2427,7 +2447,7 @@ static int __devinit emac_init_config(struct emac_instance *dev)
|
|||
if (emac_read_uint_prop(np, "tah-device", &dev->tah_ph, 0))
|
||||
dev->tah_ph = 0;
|
||||
if (emac_read_uint_prop(np, "tah-channel", &dev->tah_port, 0))
|
||||
dev->tah_ph = 0;
|
||||
dev->tah_port = 0;
|
||||
if (emac_read_uint_prop(np, "mdio-device", &dev->mdio_ph, 0))
|
||||
dev->mdio_ph = 0;
|
||||
if (emac_read_uint_prop(np, "zmii-device", &dev->zmii_ph, 0))
|
||||
|
|
@ -2465,16 +2485,19 @@ static int __devinit emac_init_config(struct emac_instance *dev)
|
|||
/* Check EMAC version */
|
||||
if (of_device_is_compatible(np, "ibm,emac4"))
|
||||
dev->features |= EMAC_FTR_EMAC4;
|
||||
if (of_device_is_compatible(np, "ibm,emac-axon")
|
||||
|| of_device_is_compatible(np, "ibm,emac-440epx"))
|
||||
dev->features |= EMAC_FTR_HAS_AXON_STACR
|
||||
| EMAC_FTR_STACR_OC_INVERT;
|
||||
if (of_device_is_compatible(np, "ibm,emac-440spe"))
|
||||
dev->features |= EMAC_FTR_STACR_OC_INVERT;
|
||||
|
||||
/* Fixup some feature bits based on the device tree and verify
|
||||
* we have support for them compiled in
|
||||
*/
|
||||
/* Fixup some feature bits based on the device tree */
|
||||
if (of_get_property(np, "has-inverted-stacr-oc", NULL))
|
||||
dev->features |= EMAC_FTR_STACR_OC_INVERT;
|
||||
if (of_get_property(np, "has-new-stacr-staopc", NULL))
|
||||
dev->features |= EMAC_FTR_HAS_NEW_STACR;
|
||||
|
||||
/* CAB lacks the appropriate properties */
|
||||
if (of_device_is_compatible(np, "ibm,emac-axon"))
|
||||
dev->features |= EMAC_FTR_HAS_NEW_STACR |
|
||||
EMAC_FTR_STACR_OC_INVERT;
|
||||
|
||||
/* Enable TAH/ZMII/RGMII features as found */
|
||||
if (dev->tah_ph != 0) {
|
||||
#ifdef CONFIG_IBM_NEW_EMAC_TAH
|
||||
dev->features |= EMAC_FTR_HAS_TAH;
|
||||
|
|
@ -2532,6 +2555,10 @@ static int __devinit emac_probe(struct of_device *ofdev,
|
|||
struct device_node **blist = NULL;
|
||||
int err, i;
|
||||
|
||||
/* Skip unused/unwired EMACS */
|
||||
if (of_get_property(np, "unused", NULL))
|
||||
return -ENODEV;
|
||||
|
||||
/* Find ourselves in the bootlist if we are there */
|
||||
for (i = 0; i < EMAC_BOOT_LIST_SIZE; i++)
|
||||
if (emac_boot_list[i] == np)
|
||||
|
|
@ -2756,6 +2783,8 @@ static int __devexit emac_remove(struct of_device *ofdev)
|
|||
|
||||
unregister_netdev(dev->ndev);
|
||||
|
||||
flush_scheduled_work();
|
||||
|
||||
if (emac_has_feature(dev, EMAC_FTR_HAS_TAH))
|
||||
tah_detach(dev->tah_dev, dev->tah_port);
|
||||
if (emac_has_feature(dev, EMAC_FTR_HAS_RGMII))
|
||||
|
|
|
|||
|
|
@ -3,6 +3,11 @@
|
|||
*
|
||||
* Driver for PowerPC 4xx on-chip ethernet controller.
|
||||
*
|
||||
* Copyright 2007 Benjamin Herrenschmidt, IBM Corp.
|
||||
* <benh@kernel.crashing.org>
|
||||
*
|
||||
* Based on the arch/ppc version of the driver:
|
||||
*
|
||||
* Copyright (c) 2004, 2005 Zultys Technologies.
|
||||
* Eugene Surovegin <eugene.surovegin@zultys.com> or <ebs@ebshome.net>
|
||||
*
|
||||
|
|
@ -258,6 +263,7 @@ struct emac_instance {
|
|||
int stop_timeout; /* in us */
|
||||
int no_mcast;
|
||||
int mcast_pending;
|
||||
int opened;
|
||||
struct work_struct reset_work;
|
||||
spinlock_t lock;
|
||||
};
|
||||
|
|
@ -292,9 +298,9 @@ struct emac_instance {
|
|||
*/
|
||||
#define EMAC_FTR_HAS_RGMII 0x00000020
|
||||
/*
|
||||
* Set if we have axon-type STACR
|
||||
* Set if we have new type STACR with STAOPC
|
||||
*/
|
||||
#define EMAC_FTR_HAS_AXON_STACR 0x00000040
|
||||
#define EMAC_FTR_HAS_NEW_STACR 0x00000040
|
||||
|
||||
|
||||
/* Right now, we don't quite handle the always/possible masks on the
|
||||
|
|
@ -306,7 +312,7 @@ enum {
|
|||
|
||||
EMAC_FTRS_POSSIBLE =
|
||||
#ifdef CONFIG_IBM_NEW_EMAC_EMAC4
|
||||
EMAC_FTR_EMAC4 | EMAC_FTR_HAS_AXON_STACR |
|
||||
EMAC_FTR_EMAC4 | EMAC_FTR_HAS_NEW_STACR |
|
||||
EMAC_FTR_STACR_OC_INVERT |
|
||||
#endif
|
||||
#ifdef CONFIG_IBM_NEW_EMAC_TAH
|
||||
|
|
|
|||
|
|
@ -3,6 +3,11 @@
|
|||
*
|
||||
* Driver for PowerPC 4xx on-chip ethernet controller, debug print routines.
|
||||
*
|
||||
* Copyright 2007 Benjamin Herrenschmidt, IBM Corp.
|
||||
* <benh@kernel.crashing.org>
|
||||
*
|
||||
* Based on the arch/ppc version of the driver:
|
||||
*
|
||||
* Copyright (c) 2004, 2005 Zultys Technologies
|
||||
* Eugene Surovegin <eugene.surovegin@zultys.com> or <ebs@ebshome.net>
|
||||
*
|
||||
|
|
|
|||
|
|
@ -3,6 +3,11 @@
|
|||
*
|
||||
* Driver for PowerPC 4xx on-chip ethernet controller, debug print routines.
|
||||
*
|
||||
* Copyright 2007 Benjamin Herrenschmidt, IBM Corp.
|
||||
* <benh@kernel.crashing.org>
|
||||
*
|
||||
* Based on the arch/ppc version of the driver:
|
||||
*
|
||||
* Copyright (c) 2004, 2005 Zultys Technologies
|
||||
* Eugene Surovegin <eugene.surovegin@zultys.com> or <ebs@ebshome.net>
|
||||
*
|
||||
|
|
|
|||
|
|
@ -3,6 +3,11 @@
|
|||
*
|
||||
* Register definitions for PowerPC 4xx on-chip ethernet contoller
|
||||
*
|
||||
* Copyright 2007 Benjamin Herrenschmidt, IBM Corp.
|
||||
* <benh@kernel.crashing.org>
|
||||
*
|
||||
* Based on the arch/ppc version of the driver:
|
||||
*
|
||||
* Copyright (c) 2004, 2005 Zultys Technologies.
|
||||
* Eugene Surovegin <eugene.surovegin@zultys.com> or <ebs@ebshome.net>
|
||||
*
|
||||
|
|
|
|||
|
|
@ -3,6 +3,11 @@
|
|||
*
|
||||
* Memory Access Layer (MAL) support
|
||||
*
|
||||
* Copyright 2007 Benjamin Herrenschmidt, IBM Corp.
|
||||
* <benh@kernel.crashing.org>
|
||||
*
|
||||
* Based on the arch/ppc version of the driver:
|
||||
*
|
||||
* Copyright (c) 2004, 2005 Zultys Technologies.
|
||||
* Eugene Surovegin <eugene.surovegin@zultys.com> or <ebs@ebshome.net>
|
||||
*
|
||||
|
|
|
|||
|
|
@ -3,6 +3,11 @@
|
|||
*
|
||||
* Memory Access Layer (MAL) support
|
||||
*
|
||||
* Copyright 2007 Benjamin Herrenschmidt, IBM Corp.
|
||||
* <benh@kernel.crashing.org>
|
||||
*
|
||||
* Based on the arch/ppc version of the driver:
|
||||
*
|
||||
* Copyright (c) 2004, 2005 Zultys Technologies.
|
||||
* Eugene Surovegin <eugene.surovegin@zultys.com> or <ebs@ebshome.net>
|
||||
*
|
||||
|
|
|
|||
|
|
@ -8,6 +8,11 @@
|
|||
* This file should be shared with other drivers or eventually
|
||||
* merged as the "low level" part of miilib
|
||||
*
|
||||
* Copyright 2007 Benjamin Herrenschmidt, IBM Corp.
|
||||
* <benh@kernel.crashing.org>
|
||||
*
|
||||
* Based on the arch/ppc version of the driver:
|
||||
*
|
||||
* (c) 2003, Benjamin Herrenscmidt (benh@kernel.crashing.org)
|
||||
* (c) 2004-2005, Eugene Surovegin <ebs@ebshome.net>
|
||||
*
|
||||
|
|
@ -306,8 +311,84 @@ static struct mii_phy_def cis8201_phy_def = {
|
|||
.ops = &cis8201_phy_ops
|
||||
};
|
||||
|
||||
static struct mii_phy_def bcm5248_phy_def = {
|
||||
|
||||
.phy_id = 0x0143bc00,
|
||||
.phy_id_mask = 0x0ffffff0,
|
||||
.name = "BCM5248 10/100 SMII Ethernet",
|
||||
.ops = &generic_phy_ops
|
||||
};
|
||||
|
||||
static int m88e1111_init(struct mii_phy *phy)
|
||||
{
|
||||
pr_debug("%s: Marvell 88E1111 Ethernet\n", __FUNCTION__);
|
||||
phy_write(phy, 0x14, 0x0ce3);
|
||||
phy_write(phy, 0x18, 0x4101);
|
||||
phy_write(phy, 0x09, 0x0e00);
|
||||
phy_write(phy, 0x04, 0x01e1);
|
||||
phy_write(phy, 0x00, 0x9140);
|
||||
phy_write(phy, 0x00, 0x1140);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int et1011c_init(struct mii_phy *phy)
|
||||
{
|
||||
u16 reg_short;
|
||||
|
||||
reg_short = (u16)(phy_read(phy, 0x16));
|
||||
reg_short &= ~(0x7);
|
||||
reg_short |= 0x6; /* RGMII Trace Delay*/
|
||||
phy_write(phy, 0x16, reg_short);
|
||||
|
||||
reg_short = (u16)(phy_read(phy, 0x17));
|
||||
reg_short &= ~(0x40);
|
||||
phy_write(phy, 0x17, reg_short);
|
||||
|
||||
phy_write(phy, 0x1c, 0x74f0);
|
||||
return 0;
|
||||
}
|
||||
|
||||
static struct mii_phy_ops et1011c_phy_ops = {
|
||||
.init = et1011c_init,
|
||||
.setup_aneg = genmii_setup_aneg,
|
||||
.setup_forced = genmii_setup_forced,
|
||||
.poll_link = genmii_poll_link,
|
||||
.read_link = genmii_read_link
|
||||
};
|
||||
|
||||
static struct mii_phy_def et1011c_phy_def = {
|
||||
.phy_id = 0x0282f000,
|
||||
.phy_id_mask = 0x0fffff00,
|
||||
.name = "ET1011C Gigabit Ethernet",
|
||||
.ops = &et1011c_phy_ops
|
||||
};
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
static struct mii_phy_ops m88e1111_phy_ops = {
|
||||
.init = m88e1111_init,
|
||||
.setup_aneg = genmii_setup_aneg,
|
||||
.setup_forced = genmii_setup_forced,
|
||||
.poll_link = genmii_poll_link,
|
||||
.read_link = genmii_read_link
|
||||
};
|
||||
|
||||
static struct mii_phy_def m88e1111_phy_def = {
|
||||
|
||||
.phy_id = 0x01410CC0,
|
||||
.phy_id_mask = 0x0ffffff0,
|
||||
.name = "Marvell 88E1111 Ethernet",
|
||||
.ops = &m88e1111_phy_ops,
|
||||
};
|
||||
|
||||
static struct mii_phy_def *mii_phy_table[] = {
|
||||
&et1011c_phy_def,
|
||||
&cis8201_phy_def,
|
||||
&bcm5248_phy_def,
|
||||
&m88e1111_phy_def,
|
||||
&genmii_phy_def,
|
||||
NULL
|
||||
};
|
||||
|
|
|
|||
|
|
@ -3,6 +3,11 @@
|
|||
*
|
||||
* Driver for PowerPC 4xx on-chip ethernet controller, PHY support
|
||||
*
|
||||
* Copyright 2007 Benjamin Herrenschmidt, IBM Corp.
|
||||
* <benh@kernel.crashing.org>
|
||||
*
|
||||
* Based on the arch/ppc version of the driver:
|
||||
*
|
||||
* Benjamin Herrenschmidt <benh@kernel.crashing.org>
|
||||
* February 2003
|
||||
*
|
||||
|
|
|
|||
|
|
@ -3,6 +3,11 @@
|
|||
*
|
||||
* Driver for PowerPC 4xx on-chip ethernet controller, RGMII bridge support.
|
||||
*
|
||||
* Copyright 2007 Benjamin Herrenschmidt, IBM Corp.
|
||||
* <benh@kernel.crashing.org>
|
||||
*
|
||||
* Based on the arch/ppc version of the driver:
|
||||
*
|
||||
* Copyright (c) 2004, 2005 Zultys Technologies.
|
||||
* Eugene Surovegin <eugene.surovegin@zultys.com> or <ebs@ebshome.net>
|
||||
*
|
||||
|
|
@ -140,7 +145,7 @@ void rgmii_get_mdio(struct of_device *ofdev, int input)
|
|||
|
||||
RGMII_DBG2(dev, "get_mdio(%d)" NL, input);
|
||||
|
||||
if (dev->type != RGMII_AXON)
|
||||
if (!(dev->flags & EMAC_RGMII_FLAG_HAS_MDIO))
|
||||
return;
|
||||
|
||||
mutex_lock(&dev->lock);
|
||||
|
|
@ -161,7 +166,7 @@ void rgmii_put_mdio(struct of_device *ofdev, int input)
|
|||
|
||||
RGMII_DBG2(dev, "put_mdio(%d)" NL, input);
|
||||
|
||||
if (dev->type != RGMII_AXON)
|
||||
if (!(dev->flags & EMAC_RGMII_FLAG_HAS_MDIO))
|
||||
return;
|
||||
|
||||
fer = in_be32(&p->fer);
|
||||
|
|
@ -250,11 +255,13 @@ static int __devinit rgmii_probe(struct of_device *ofdev,
|
|||
goto err_free;
|
||||
}
|
||||
|
||||
/* Check for RGMII type */
|
||||
/* Check for RGMII flags */
|
||||
if (of_get_property(ofdev->node, "has-mdio", NULL))
|
||||
dev->flags |= EMAC_RGMII_FLAG_HAS_MDIO;
|
||||
|
||||
/* CAB lacks the right properties, fix this up */
|
||||
if (of_device_is_compatible(ofdev->node, "ibm,rgmii-axon"))
|
||||
dev->type = RGMII_AXON;
|
||||
else
|
||||
dev->type = RGMII_STANDARD;
|
||||
dev->flags |= EMAC_RGMII_FLAG_HAS_MDIO;
|
||||
|
||||
DBG2(dev, " Boot FER = 0x%08x, SSR = 0x%08x\n",
|
||||
in_be32(&dev->base->fer), in_be32(&dev->base->ssr));
|
||||
|
|
@ -263,9 +270,9 @@ static int __devinit rgmii_probe(struct of_device *ofdev,
|
|||
out_be32(&dev->base->fer, 0);
|
||||
|
||||
printk(KERN_INFO
|
||||
"RGMII %s %s initialized\n",
|
||||
dev->type == RGMII_STANDARD ? "standard" : "axon",
|
||||
ofdev->node->full_name);
|
||||
"RGMII %s initialized with%s MDIO support\n",
|
||||
ofdev->node->full_name,
|
||||
(dev->flags & EMAC_RGMII_FLAG_HAS_MDIO) ? "" : "out");
|
||||
|
||||
wmb();
|
||||
dev_set_drvdata(&ofdev->dev, dev);
|
||||
|
|
|
|||
|
|
@ -3,6 +3,11 @@
|
|||
*
|
||||
* Driver for PowerPC 4xx on-chip ethernet controller, RGMII bridge support.
|
||||
*
|
||||
* Copyright 2007 Benjamin Herrenschmidt, IBM Corp.
|
||||
* <benh@kernel.crashing.org>
|
||||
*
|
||||
* Based on the arch/ppc version of the driver:
|
||||
*
|
||||
* Based on ocp_zmii.h/ibm_emac_zmii.h
|
||||
* Armin Kuster akuster@mvista.com
|
||||
*
|
||||
|
|
@ -35,8 +40,9 @@ struct rgmii_regs {
|
|||
struct rgmii_instance {
|
||||
struct rgmii_regs __iomem *base;
|
||||
|
||||
/* Type of RGMII bridge */
|
||||
int type;
|
||||
/* RGMII bridge flags */
|
||||
int flags;
|
||||
#define EMAC_RGMII_FLAG_HAS_MDIO 0x00000001
|
||||
|
||||
/* Only one EMAC whacks us at a time */
|
||||
struct mutex lock;
|
||||
|
|
|
|||
|
|
@ -3,6 +3,11 @@
|
|||
*
|
||||
* Driver for PowerPC 4xx on-chip ethernet controller, TAH support.
|
||||
*
|
||||
* Copyright 2007 Benjamin Herrenschmidt, IBM Corp.
|
||||
* <benh@kernel.crashing.org>
|
||||
*
|
||||
* Based on the arch/ppc version of the driver:
|
||||
*
|
||||
* Copyright 2004 MontaVista Software, Inc.
|
||||
* Matt Porter <mporter@kernel.crashing.org>
|
||||
*
|
||||
|
|
@ -116,13 +121,14 @@ static int __devinit tah_probe(struct of_device *ofdev,
|
|||
goto err_free;
|
||||
}
|
||||
|
||||
dev_set_drvdata(&ofdev->dev, dev);
|
||||
|
||||
/* Initialize TAH and enable IPv4 checksum verification, no TSO yet */
|
||||
tah_reset(ofdev);
|
||||
|
||||
printk(KERN_INFO
|
||||
"TAH %s initialized\n", ofdev->node->full_name);
|
||||
wmb();
|
||||
dev_set_drvdata(&ofdev->dev, dev);
|
||||
|
||||
return 0;
|
||||
|
||||
|
|
|
|||
|
|
@ -3,6 +3,11 @@
|
|||
*
|
||||
* Driver for PowerPC 4xx on-chip ethernet controller, TAH support.
|
||||
*
|
||||
* Copyright 2007 Benjamin Herrenschmidt, IBM Corp.
|
||||
* <benh@kernel.crashing.org>
|
||||
*
|
||||
* Based on the arch/ppc version of the driver:
|
||||
*
|
||||
* Copyright 2004 MontaVista Software, Inc.
|
||||
* Matt Porter <mporter@kernel.crashing.org>
|
||||
*
|
||||
|
|
|
|||
|
|
@ -3,6 +3,11 @@
|
|||
*
|
||||
* Driver for PowerPC 4xx on-chip ethernet controller, ZMII bridge support.
|
||||
*
|
||||
* Copyright 2007 Benjamin Herrenschmidt, IBM Corp.
|
||||
* <benh@kernel.crashing.org>
|
||||
*
|
||||
* Based on the arch/ppc version of the driver:
|
||||
*
|
||||
* Copyright (c) 2004, 2005 Zultys Technologies.
|
||||
* Eugene Surovegin <eugene.surovegin@zultys.com> or <ebs@ebshome.net>
|
||||
*
|
||||
|
|
@ -83,12 +88,14 @@ int __devinit zmii_attach(struct of_device *ofdev, int input, int *mode)
|
|||
|
||||
ZMII_DBG(dev, "init(%d, %d)" NL, input, *mode);
|
||||
|
||||
if (!zmii_valid_mode(*mode))
|
||||
if (!zmii_valid_mode(*mode)) {
|
||||
/* Probably an EMAC connected to RGMII,
|
||||
* but it still may need ZMII for MDIO so
|
||||
* we don't fail here.
|
||||
*/
|
||||
dev->users++;
|
||||
return 0;
|
||||
}
|
||||
|
||||
mutex_lock(&dev->lock);
|
||||
|
||||
|
|
|
|||
|
|
@ -3,6 +3,11 @@
|
|||
*
|
||||
* Driver for PowerPC 4xx on-chip ethernet controller, ZMII bridge support.
|
||||
*
|
||||
* Copyright 2007 Benjamin Herrenschmidt, IBM Corp.
|
||||
* <benh@kernel.crashing.org>
|
||||
*
|
||||
* Based on the arch/ppc version of the driver:
|
||||
*
|
||||
* Copyright (c) 2004, 2005 Zultys Technologies.
|
||||
* Eugene Surovegin <eugene.surovegin@zultys.com> or <ebs@ebshome.net>
|
||||
*
|
||||
|
|
|
|||
|
|
@ -176,8 +176,8 @@ struct i596_reg {
|
|||
struct i596_tbd {
|
||||
unsigned short size;
|
||||
unsigned short pad;
|
||||
dma_addr_t next;
|
||||
dma_addr_t data;
|
||||
u32 next;
|
||||
u32 data;
|
||||
u32 cache_pad[5]; /* Total 32 bytes... */
|
||||
};
|
||||
|
||||
|
|
@ -195,12 +195,12 @@ struct i596_cmd {
|
|||
struct i596_cmd *v_next; /* Address from CPUs viewpoint */
|
||||
unsigned short status;
|
||||
unsigned short command;
|
||||
dma_addr_t b_next; /* Address from i596 viewpoint */
|
||||
u32 b_next; /* Address from i596 viewpoint */
|
||||
};
|
||||
|
||||
struct tx_cmd {
|
||||
struct i596_cmd cmd;
|
||||
dma_addr_t tbd;
|
||||
u32 tbd;
|
||||
unsigned short size;
|
||||
unsigned short pad;
|
||||
struct sk_buff *skb; /* So we can free it after tx */
|
||||
|
|
@ -237,8 +237,8 @@ struct cf_cmd {
|
|||
struct i596_rfd {
|
||||
unsigned short stat;
|
||||
unsigned short cmd;
|
||||
dma_addr_t b_next; /* Address from i596 viewpoint */
|
||||
dma_addr_t rbd;
|
||||
u32 b_next; /* Address from i596 viewpoint */
|
||||
u32 rbd;
|
||||
unsigned short count;
|
||||
unsigned short size;
|
||||
struct i596_rfd *v_next; /* Address from CPUs viewpoint */
|
||||
|
|
@ -249,18 +249,18 @@ struct i596_rfd {
|
|||
};
|
||||
|
||||
struct i596_rbd {
|
||||
/* hardware data */
|
||||
unsigned short count;
|
||||
unsigned short zero1;
|
||||
dma_addr_t b_next;
|
||||
dma_addr_t b_data; /* Address from i596 viewpoint */
|
||||
unsigned short size;
|
||||
unsigned short zero2;
|
||||
/* driver data */
|
||||
struct sk_buff *skb;
|
||||
struct i596_rbd *v_next;
|
||||
dma_addr_t b_addr; /* This rbd addr from i596 view */
|
||||
unsigned char *v_data; /* Address from CPUs viewpoint */
|
||||
/* hardware data */
|
||||
unsigned short count;
|
||||
unsigned short zero1;
|
||||
u32 b_next;
|
||||
u32 b_data; /* Address from i596 viewpoint */
|
||||
unsigned short size;
|
||||
unsigned short zero2;
|
||||
/* driver data */
|
||||
struct sk_buff *skb;
|
||||
struct i596_rbd *v_next;
|
||||
u32 b_addr; /* This rbd addr from i596 view */
|
||||
unsigned char *v_data; /* Address from CPUs viewpoint */
|
||||
/* Total 32 bytes... */
|
||||
#ifdef __LP64__
|
||||
u32 cache_pad[4];
|
||||
|
|
@ -275,8 +275,8 @@ struct i596_rbd {
|
|||
struct i596_scb {
|
||||
unsigned short status;
|
||||
unsigned short command;
|
||||
dma_addr_t cmd;
|
||||
dma_addr_t rfd;
|
||||
u32 cmd;
|
||||
u32 rfd;
|
||||
u32 crc_err;
|
||||
u32 align_err;
|
||||
u32 resource_err;
|
||||
|
|
@ -288,14 +288,14 @@ struct i596_scb {
|
|||
};
|
||||
|
||||
struct i596_iscp {
|
||||
u32 stat;
|
||||
dma_addr_t scb;
|
||||
u32 stat;
|
||||
u32 scb;
|
||||
};
|
||||
|
||||
struct i596_scp {
|
||||
u32 sysbus;
|
||||
u32 pad;
|
||||
dma_addr_t iscp;
|
||||
u32 sysbus;
|
||||
u32 pad;
|
||||
u32 iscp;
|
||||
};
|
||||
|
||||
struct i596_dma {
|
||||
|
|
|
|||
|
|
@ -1979,6 +1979,7 @@ static int myri10ge_open(struct net_device *dev)
|
|||
lro_mgr->lro_arr = mgp->rx_done.lro_desc;
|
||||
lro_mgr->get_frag_header = myri10ge_get_frag_header;
|
||||
lro_mgr->max_aggr = myri10ge_lro_max_pkts;
|
||||
lro_mgr->frag_align_pad = 2;
|
||||
if (lro_mgr->max_aggr > MAX_SKB_FRAGS)
|
||||
lro_mgr->max_aggr = MAX_SKB_FRAGS;
|
||||
|
||||
|
|
|
|||
|
|
@ -1045,6 +1045,7 @@ static int niu_serdes_init(struct niu *np)
|
|||
}
|
||||
|
||||
static void niu_init_xif(struct niu *);
|
||||
static void niu_handle_led(struct niu *, int status);
|
||||
|
||||
static int niu_link_status_common(struct niu *np, int link_up)
|
||||
{
|
||||
|
|
@ -1066,11 +1067,15 @@ static int niu_link_status_common(struct niu *np, int link_up)
|
|||
|
||||
spin_lock_irqsave(&np->lock, flags);
|
||||
niu_init_xif(np);
|
||||
niu_handle_led(np, 1);
|
||||
spin_unlock_irqrestore(&np->lock, flags);
|
||||
|
||||
netif_carrier_on(dev);
|
||||
} else if (netif_carrier_ok(dev) && !link_up) {
|
||||
niuwarn(LINK, "%s: Link is down\n", dev->name);
|
||||
spin_lock_irqsave(&np->lock, flags);
|
||||
niu_handle_led(np, 0);
|
||||
spin_unlock_irqrestore(&np->lock, flags);
|
||||
netif_carrier_off(dev);
|
||||
}
|
||||
|
||||
|
|
@ -3915,16 +3920,14 @@ static int niu_init_ipp(struct niu *np)
|
|||
return 0;
|
||||
}
|
||||
|
||||
static void niu_init_xif_xmac(struct niu *np)
|
||||
static void niu_handle_led(struct niu *np, int status)
|
||||
{
|
||||
struct niu_link_config *lp = &np->link_config;
|
||||
u64 val;
|
||||
|
||||
val = nr64_mac(XMAC_CONFIG);
|
||||
|
||||
if ((np->flags & NIU_FLAGS_10G) != 0 &&
|
||||
(np->flags & NIU_FLAGS_FIBER) != 0) {
|
||||
if (netif_carrier_ok(np->dev)) {
|
||||
if (status) {
|
||||
val |= XMAC_CONFIG_LED_POLARITY;
|
||||
val &= ~XMAC_CONFIG_FORCE_LED_ON;
|
||||
} else {
|
||||
|
|
@ -3933,6 +3936,15 @@ static void niu_init_xif_xmac(struct niu *np)
|
|||
}
|
||||
}
|
||||
|
||||
nw64_mac(XMAC_CONFIG, val);
|
||||
}
|
||||
|
||||
static void niu_init_xif_xmac(struct niu *np)
|
||||
{
|
||||
struct niu_link_config *lp = &np->link_config;
|
||||
u64 val;
|
||||
|
||||
val = nr64_mac(XMAC_CONFIG);
|
||||
val &= ~XMAC_CONFIG_SEL_POR_CLK_SRC;
|
||||
|
||||
val |= XMAC_CONFIG_TX_OUTPUT_EN;
|
||||
|
|
@ -4776,6 +4788,8 @@ static int niu_close(struct net_device *dev)
|
|||
|
||||
niu_free_channels(np);
|
||||
|
||||
niu_handle_led(np, 0);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
|
|
|||
|
|
@ -586,7 +586,7 @@ static int pasemi_mac_clean_rx(struct pasemi_mac *mac, int limit)
|
|||
/* CRC error flagged */
|
||||
mac->netdev->stats.rx_errors++;
|
||||
mac->netdev->stats.rx_crc_errors++;
|
||||
dev_kfree_skb_irq(skb);
|
||||
/* No need to free skb, it'll be reused */
|
||||
goto next;
|
||||
}
|
||||
|
||||
|
|
@ -1362,7 +1362,7 @@ pasemi_mac_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
|
|||
|
||||
netif_napi_add(dev, &mac->napi, pasemi_mac_poll, 64);
|
||||
|
||||
dev->features = NETIF_F_HW_CSUM | NETIF_F_LLTX | NETIF_F_SG;
|
||||
dev->features = NETIF_F_IP_CSUM | NETIF_F_LLTX | NETIF_F_SG;
|
||||
|
||||
/* These should come out of the device tree eventually */
|
||||
mac->dma_txch = index;
|
||||
|
|
|
|||
|
|
@ -143,21 +143,29 @@ static int m88e1111_config_init(struct phy_device *phydev)
|
|||
int err;
|
||||
|
||||
if ((phydev->interface == PHY_INTERFACE_MODE_RGMII) ||
|
||||
(phydev->interface == PHY_INTERFACE_MODE_RGMII_ID)) {
|
||||
(phydev->interface == PHY_INTERFACE_MODE_RGMII_ID) ||
|
||||
(phydev->interface == PHY_INTERFACE_MODE_RGMII_RXID) ||
|
||||
(phydev->interface == PHY_INTERFACE_MODE_RGMII_TXID)) {
|
||||
int temp;
|
||||
|
||||
temp = phy_read(phydev, MII_M1111_PHY_EXT_CR);
|
||||
if (temp < 0)
|
||||
return temp;
|
||||
|
||||
if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID) {
|
||||
temp = phy_read(phydev, MII_M1111_PHY_EXT_CR);
|
||||
if (temp < 0)
|
||||
return temp;
|
||||
|
||||
temp |= (MII_M1111_RX_DELAY | MII_M1111_TX_DELAY);
|
||||
|
||||
err = phy_write(phydev, MII_M1111_PHY_EXT_CR, temp);
|
||||
if (err < 0)
|
||||
return err;
|
||||
} else if (phydev->interface == PHY_INTERFACE_MODE_RGMII_RXID) {
|
||||
temp &= ~MII_M1111_TX_DELAY;
|
||||
temp |= MII_M1111_RX_DELAY;
|
||||
} else if (phydev->interface == PHY_INTERFACE_MODE_RGMII_TXID) {
|
||||
temp &= ~MII_M1111_RX_DELAY;
|
||||
temp |= MII_M1111_TX_DELAY;
|
||||
}
|
||||
|
||||
err = phy_write(phydev, MII_M1111_PHY_EXT_CR, temp);
|
||||
if (err < 0)
|
||||
return err;
|
||||
|
||||
temp = phy_read(phydev, MII_M1111_PHY_EXT_SR);
|
||||
if (temp < 0)
|
||||
return temp;
|
||||
|
|
|
|||
|
|
@ -91,9 +91,12 @@ int mdiobus_register(struct mii_bus *bus)
|
|||
|
||||
err = device_register(&phydev->dev);
|
||||
|
||||
if (err)
|
||||
if (err) {
|
||||
printk(KERN_ERR "phy %d failed to register\n",
|
||||
i);
|
||||
phy_device_free(phydev);
|
||||
phydev = NULL;
|
||||
}
|
||||
}
|
||||
|
||||
bus->phy_map[i] = phydev;
|
||||
|
|
@ -110,10 +113,8 @@ void mdiobus_unregister(struct mii_bus *bus)
|
|||
int i;
|
||||
|
||||
for (i = 0; i < PHY_MAX_ADDR; i++) {
|
||||
if (bus->phy_map[i]) {
|
||||
if (bus->phy_map[i])
|
||||
device_unregister(&bus->phy_map[i]->dev);
|
||||
kfree(bus->phy_map[i]);
|
||||
}
|
||||
}
|
||||
}
|
||||
EXPORT_SYMBOL(mdiobus_unregister);
|
||||
|
|
|
|||
|
|
@ -406,6 +406,9 @@ int phy_mii_ioctl(struct phy_device *phydev,
|
|||
&& phydev->drv->config_init)
|
||||
phydev->drv->config_init(phydev);
|
||||
break;
|
||||
|
||||
default:
|
||||
return -ENOTTY;
|
||||
}
|
||||
|
||||
return 0;
|
||||
|
|
|
|||
|
|
@ -44,6 +44,16 @@ static struct phy_driver genphy_driver;
|
|||
extern int mdio_bus_init(void);
|
||||
extern void mdio_bus_exit(void);
|
||||
|
||||
void phy_device_free(struct phy_device *phydev)
|
||||
{
|
||||
kfree(phydev);
|
||||
}
|
||||
|
||||
static void phy_device_release(struct device *dev)
|
||||
{
|
||||
phy_device_free(to_phy_device(dev));
|
||||
}
|
||||
|
||||
struct phy_device* phy_device_create(struct mii_bus *bus, int addr, int phy_id)
|
||||
{
|
||||
struct phy_device *dev;
|
||||
|
|
@ -54,6 +64,8 @@ struct phy_device* phy_device_create(struct mii_bus *bus, int addr, int phy_id)
|
|||
if (NULL == dev)
|
||||
return (struct phy_device*) PTR_ERR((void*)-ENOMEM);
|
||||
|
||||
dev->dev.release = phy_device_release;
|
||||
|
||||
dev->speed = 0;
|
||||
dev->duplex = -1;
|
||||
dev->pause = dev->asym_pause = 0;
|
||||
|
|
|
|||
|
|
@ -66,6 +66,7 @@ struct XENA_dev_config {
|
|||
#define ADAPTER_STATUS_RC_PRC_QUIESCENT vBIT(0xFF,16,8)
|
||||
#define ADAPTER_STATUS_MC_DRAM_READY s2BIT(24)
|
||||
#define ADAPTER_STATUS_MC_QUEUES_READY s2BIT(25)
|
||||
#define ADAPTER_STATUS_RIC_RUNNING s2BIT(26)
|
||||
#define ADAPTER_STATUS_M_PLL_LOCK s2BIT(30)
|
||||
#define ADAPTER_STATUS_P_PLL_LOCK s2BIT(31)
|
||||
|
||||
|
|
|
|||
|
|
@ -84,7 +84,7 @@
|
|||
#include "s2io.h"
|
||||
#include "s2io-regs.h"
|
||||
|
||||
#define DRV_VERSION "2.0.26.6"
|
||||
#define DRV_VERSION "2.0.26.10"
|
||||
|
||||
/* S2io Driver name & version. */
|
||||
static char s2io_driver_name[] = "Neterion";
|
||||
|
|
@ -1081,7 +1081,7 @@ static int init_nic(struct s2io_nic *nic)
|
|||
/* to set the swapper controle on the card */
|
||||
if(s2io_set_swapper(nic)) {
|
||||
DBG_PRINT(ERR_DBG,"ERROR: Setting Swapper failed\n");
|
||||
return -1;
|
||||
return -EIO;
|
||||
}
|
||||
|
||||
/*
|
||||
|
|
@ -1100,6 +1100,20 @@ static int init_nic(struct s2io_nic *nic)
|
|||
msleep(500);
|
||||
val64 = readq(&bar0->sw_reset);
|
||||
|
||||
/* Ensure that it's safe to access registers by checking
|
||||
* RIC_RUNNING bit is reset. Check is valid only for XframeII.
|
||||
*/
|
||||
if (nic->device_type == XFRAME_II_DEVICE) {
|
||||
for (i = 0; i < 50; i++) {
|
||||
val64 = readq(&bar0->adapter_status);
|
||||
if (!(val64 & ADAPTER_STATUS_RIC_RUNNING))
|
||||
break;
|
||||
msleep(10);
|
||||
}
|
||||
if (i == 50)
|
||||
return -ENODEV;
|
||||
}
|
||||
|
||||
/* Enable Receiving broadcasts */
|
||||
add = &bar0->mac_cfg;
|
||||
val64 = readq(&bar0->mac_cfg);
|
||||
|
|
@ -1503,7 +1517,7 @@ static int init_nic(struct s2io_nic *nic)
|
|||
DBG_PRINT(ERR_DBG, "%s: failed rts ds steering",
|
||||
dev->name);
|
||||
DBG_PRINT(ERR_DBG, "set on codepoint %d\n", i);
|
||||
return FAILURE;
|
||||
return -ENODEV;
|
||||
}
|
||||
}
|
||||
|
||||
|
|
@ -1570,7 +1584,7 @@ static int init_nic(struct s2io_nic *nic)
|
|||
if (time > 10) {
|
||||
DBG_PRINT(ERR_DBG, "%s: TTI init Failed\n",
|
||||
dev->name);
|
||||
return -1;
|
||||
return -ENODEV;
|
||||
}
|
||||
msleep(50);
|
||||
time++;
|
||||
|
|
@ -1623,7 +1637,7 @@ static int init_nic(struct s2io_nic *nic)
|
|||
if (time > 10) {
|
||||
DBG_PRINT(ERR_DBG, "%s: RTI init Failed\n",
|
||||
dev->name);
|
||||
return -1;
|
||||
return -ENODEV;
|
||||
}
|
||||
time++;
|
||||
msleep(50);
|
||||
|
|
@ -3914,6 +3928,12 @@ static int s2io_close(struct net_device *dev)
|
|||
{
|
||||
struct s2io_nic *sp = dev->priv;
|
||||
|
||||
/* Return if the device is already closed *
|
||||
* Can happen when s2io_card_up failed in change_mtu *
|
||||
*/
|
||||
if (!is_s2io_card_up(sp))
|
||||
return 0;
|
||||
|
||||
netif_stop_queue(dev);
|
||||
napi_disable(&sp->napi);
|
||||
/* Reset card, kill tasklet and free Tx and Rx buffers. */
|
||||
|
|
@ -6355,6 +6375,7 @@ static int s2io_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
|
|||
static int s2io_change_mtu(struct net_device *dev, int new_mtu)
|
||||
{
|
||||
struct s2io_nic *sp = dev->priv;
|
||||
int ret = 0;
|
||||
|
||||
if ((new_mtu < MIN_MTU) || (new_mtu > S2IO_JUMBO_SIZE)) {
|
||||
DBG_PRINT(ERR_DBG, "%s: MTU size is invalid.\n",
|
||||
|
|
@ -6366,9 +6387,11 @@ static int s2io_change_mtu(struct net_device *dev, int new_mtu)
|
|||
if (netif_running(dev)) {
|
||||
s2io_card_down(sp);
|
||||
netif_stop_queue(dev);
|
||||
if (s2io_card_up(sp)) {
|
||||
ret = s2io_card_up(sp);
|
||||
if (ret) {
|
||||
DBG_PRINT(ERR_DBG, "%s: Device bring up failed\n",
|
||||
__FUNCTION__);
|
||||
return ret;
|
||||
}
|
||||
if (netif_queue_stopped(dev))
|
||||
netif_wake_queue(dev);
|
||||
|
|
@ -6379,7 +6402,7 @@ static int s2io_change_mtu(struct net_device *dev, int new_mtu)
|
|||
writeq(vBIT(val64, 2, 14), &bar0->rmac_max_pyld_len);
|
||||
}
|
||||
|
||||
return 0;
|
||||
return ret;
|
||||
}
|
||||
|
||||
/**
|
||||
|
|
@ -6777,6 +6800,9 @@ static void do_s2io_card_down(struct s2io_nic * sp, int do_io)
|
|||
unsigned long flags;
|
||||
register u64 val64 = 0;
|
||||
|
||||
if (!is_s2io_card_up(sp))
|
||||
return;
|
||||
|
||||
del_timer_sync(&sp->alarm_timer);
|
||||
/* If s2io_set_link task is executing, wait till it completes. */
|
||||
while (test_and_set_bit(__S2IO_STATE_LINK_TASK, &(sp->state))) {
|
||||
|
|
@ -6850,11 +6876,13 @@ static int s2io_card_up(struct s2io_nic * sp)
|
|||
u16 interruptible;
|
||||
|
||||
/* Initialize the H/W I/O registers */
|
||||
if (init_nic(sp) != 0) {
|
||||
ret = init_nic(sp);
|
||||
if (ret != 0) {
|
||||
DBG_PRINT(ERR_DBG, "%s: H/W initialization failed\n",
|
||||
dev->name);
|
||||
s2io_reset(sp);
|
||||
return -ENODEV;
|
||||
if (ret != -EIO)
|
||||
s2io_reset(sp);
|
||||
return ret;
|
||||
}
|
||||
|
||||
/*
|
||||
|
|
|
|||
|
|
@ -44,7 +44,7 @@
|
|||
#include "skge.h"
|
||||
|
||||
#define DRV_NAME "skge"
|
||||
#define DRV_VERSION "1.12"
|
||||
#define DRV_VERSION "1.13"
|
||||
#define PFX DRV_NAME " "
|
||||
|
||||
#define DEFAULT_TX_RING_SIZE 128
|
||||
|
|
@ -1095,16 +1095,9 @@ static void xm_link_down(struct skge_hw *hw, int port)
|
|||
{
|
||||
struct net_device *dev = hw->dev[port];
|
||||
struct skge_port *skge = netdev_priv(dev);
|
||||
u16 cmd = xm_read16(hw, port, XM_MMU_CMD);
|
||||
|
||||
xm_write16(hw, port, XM_IMSK, XM_IMSK_DISABLE);
|
||||
|
||||
cmd &= ~(XM_MMU_ENA_RX | XM_MMU_ENA_TX);
|
||||
xm_write16(hw, port, XM_MMU_CMD, cmd);
|
||||
|
||||
/* dummy read to ensure writing */
|
||||
xm_read16(hw, port, XM_MMU_CMD);
|
||||
|
||||
if (netif_carrier_ok(dev))
|
||||
skge_link_down(skge);
|
||||
}
|
||||
|
|
@ -1194,6 +1187,7 @@ static void genesis_init(struct skge_hw *hw)
|
|||
static void genesis_reset(struct skge_hw *hw, int port)
|
||||
{
|
||||
const u8 zero[8] = { 0 };
|
||||
u32 reg;
|
||||
|
||||
skge_write8(hw, SK_REG(port, GMAC_IRQ_MSK), 0);
|
||||
|
||||
|
|
@ -1209,6 +1203,11 @@ static void genesis_reset(struct skge_hw *hw, int port)
|
|||
xm_write16(hw, port, PHY_BCOM_INT_MASK, 0xffff);
|
||||
|
||||
xm_outhash(hw, port, XM_HSM, zero);
|
||||
|
||||
/* Flush TX and RX fifo */
|
||||
reg = xm_read32(hw, port, XM_MODE);
|
||||
xm_write32(hw, port, XM_MODE, reg | XM_MD_FTF);
|
||||
xm_write32(hw, port, XM_MODE, reg | XM_MD_FRF);
|
||||
}
|
||||
|
||||
|
||||
|
|
@ -1634,15 +1633,14 @@ static void genesis_mac_init(struct skge_hw *hw, int port)
|
|||
}
|
||||
xm_write16(hw, port, XM_RX_CMD, r);
|
||||
|
||||
|
||||
/* We want short frames padded to 60 bytes. */
|
||||
xm_write16(hw, port, XM_TX_CMD, XM_TX_AUTO_PAD);
|
||||
|
||||
/*
|
||||
* Bump up the transmit threshold. This helps hold off transmit
|
||||
* underruns when we're blasting traffic from both ports at once.
|
||||
*/
|
||||
xm_write16(hw, port, XM_TX_THR, 512);
|
||||
/* Increase threshold for jumbo frames on dual port */
|
||||
if (hw->ports > 1 && jumbo)
|
||||
xm_write16(hw, port, XM_TX_THR, 1020);
|
||||
else
|
||||
xm_write16(hw, port, XM_TX_THR, 512);
|
||||
|
||||
/*
|
||||
* Enable the reception of all error frames. This is is
|
||||
|
|
@ -1713,7 +1711,13 @@ static void genesis_stop(struct skge_port *skge)
|
|||
{
|
||||
struct skge_hw *hw = skge->hw;
|
||||
int port = skge->port;
|
||||
u32 reg;
|
||||
unsigned retries = 1000;
|
||||
u16 cmd;
|
||||
|
||||
/* Disable Tx and Rx */
|
||||
cmd = xm_read16(hw, port, XM_MMU_CMD);
|
||||
cmd &= ~(XM_MMU_ENA_RX | XM_MMU_ENA_TX);
|
||||
xm_write16(hw, port, XM_MMU_CMD, cmd);
|
||||
|
||||
genesis_reset(hw, port);
|
||||
|
||||
|
|
@ -1721,20 +1725,17 @@ static void genesis_stop(struct skge_port *skge)
|
|||
skge_write16(hw, B3_PA_CTRL,
|
||||
port == 0 ? PA_CLR_TO_TX1 : PA_CLR_TO_TX2);
|
||||
|
||||
/*
|
||||
* If the transfer sticks at the MAC the STOP command will not
|
||||
* terminate if we don't flush the XMAC's transmit FIFO !
|
||||
*/
|
||||
xm_write32(hw, port, XM_MODE,
|
||||
xm_read32(hw, port, XM_MODE)|XM_MD_FTF);
|
||||
|
||||
|
||||
/* Reset the MAC */
|
||||
skge_write16(hw, SK_REG(port, TX_MFF_CTRL1), MFF_SET_MAC_RST);
|
||||
skge_write16(hw, SK_REG(port, TX_MFF_CTRL1), MFF_CLR_MAC_RST);
|
||||
do {
|
||||
skge_write16(hw, SK_REG(port, TX_MFF_CTRL1), MFF_SET_MAC_RST);
|
||||
if (!(skge_read16(hw, SK_REG(port, TX_MFF_CTRL1)) & MFF_SET_MAC_RST))
|
||||
break;
|
||||
} while (--retries > 0);
|
||||
|
||||
/* For external PHYs there must be special handling */
|
||||
if (hw->phy_type != SK_PHY_XMAC) {
|
||||
reg = skge_read32(hw, B2_GP_IO);
|
||||
u32 reg = skge_read32(hw, B2_GP_IO);
|
||||
if (port == 0) {
|
||||
reg |= GP_DIR_0;
|
||||
reg &= ~GP_IO_0;
|
||||
|
|
@ -1801,11 +1802,6 @@ static void genesis_mac_intr(struct skge_hw *hw, int port)
|
|||
xm_write32(hw, port, XM_MODE, XM_MD_FTF);
|
||||
++dev->stats.tx_fifo_errors;
|
||||
}
|
||||
|
||||
if (status & XM_IS_RXF_OV) {
|
||||
xm_write32(hw, port, XM_MODE, XM_MD_FRF);
|
||||
++dev->stats.rx_fifo_errors;
|
||||
}
|
||||
}
|
||||
|
||||
static void genesis_link_up(struct skge_port *skge)
|
||||
|
|
@ -1862,9 +1858,9 @@ static void genesis_link_up(struct skge_port *skge)
|
|||
|
||||
xm_write32(hw, port, XM_MODE, mode);
|
||||
|
||||
/* Turn on detection of Tx underrun, Rx overrun */
|
||||
/* Turn on detection of Tx underrun */
|
||||
msk = xm_read16(hw, port, XM_IMSK);
|
||||
msk &= ~(XM_IS_RXF_OV | XM_IS_TXF_UR);
|
||||
msk &= ~XM_IS_TXF_UR;
|
||||
xm_write16(hw, port, XM_IMSK, msk);
|
||||
|
||||
xm_read16(hw, port, XM_ISRC);
|
||||
|
|
@ -2194,9 +2190,12 @@ static void yukon_mac_init(struct skge_hw *hw, int port)
|
|||
TX_JAM_IPG_VAL(TX_JAM_IPG_DEF) |
|
||||
TX_IPG_JAM_DATA(TX_IPG_JAM_DEF));
|
||||
|
||||
/* serial mode register */
|
||||
reg = GM_SMOD_VLAN_ENA | IPG_DATA_VAL(IPG_DATA_DEF);
|
||||
if (hw->dev[port]->mtu > 1500)
|
||||
/* configure the Serial Mode Register */
|
||||
reg = DATA_BLIND_VAL(DATA_BLIND_DEF)
|
||||
| GM_SMOD_VLAN_ENA
|
||||
| IPG_DATA_VAL(IPG_DATA_DEF);
|
||||
|
||||
if (hw->dev[port]->mtu > ETH_DATA_LEN)
|
||||
reg |= GM_SMOD_JUMBO_ENA;
|
||||
|
||||
gma_write16(hw, port, GM_SERIAL_MODE, reg);
|
||||
|
|
@ -2619,8 +2618,8 @@ static int skge_up(struct net_device *dev)
|
|||
yukon_mac_init(hw, port);
|
||||
spin_unlock_bh(&hw->phy_lock);
|
||||
|
||||
/* Configure RAMbuffers */
|
||||
chunk = hw->ram_size / ((hw->ports + 1)*2);
|
||||
/* Configure RAMbuffers - equally between ports and tx/rx */
|
||||
chunk = (hw->ram_size - hw->ram_offset) / (hw->ports * 2);
|
||||
ram_addr = hw->ram_offset + 2 * chunk * port;
|
||||
|
||||
skge_ramset(hw, rxqaddr[port], ram_addr, chunk);
|
||||
|
|
@ -2897,11 +2896,7 @@ static void skge_tx_timeout(struct net_device *dev)
|
|||
|
||||
static int skge_change_mtu(struct net_device *dev, int new_mtu)
|
||||
{
|
||||
struct skge_port *skge = netdev_priv(dev);
|
||||
struct skge_hw *hw = skge->hw;
|
||||
int port = skge->port;
|
||||
int err;
|
||||
u16 ctl, reg;
|
||||
|
||||
if (new_mtu < ETH_ZLEN || new_mtu > ETH_JUMBO_MTU)
|
||||
return -EINVAL;
|
||||
|
|
@ -2911,40 +2906,13 @@ static int skge_change_mtu(struct net_device *dev, int new_mtu)
|
|||
return 0;
|
||||
}
|
||||
|
||||
skge_write32(hw, B0_IMSK, 0);
|
||||
dev->trans_start = jiffies; /* prevent tx timeout */
|
||||
netif_stop_queue(dev);
|
||||
napi_disable(&skge->napi);
|
||||
|
||||
ctl = gma_read16(hw, port, GM_GP_CTRL);
|
||||
gma_write16(hw, port, GM_GP_CTRL, ctl & ~GM_GPCR_RX_ENA);
|
||||
|
||||
skge_rx_clean(skge);
|
||||
skge_rx_stop(hw, port);
|
||||
skge_down(dev);
|
||||
|
||||
dev->mtu = new_mtu;
|
||||
|
||||
reg = GM_SMOD_VLAN_ENA | IPG_DATA_VAL(IPG_DATA_DEF);
|
||||
if (new_mtu > 1500)
|
||||
reg |= GM_SMOD_JUMBO_ENA;
|
||||
gma_write16(hw, port, GM_SERIAL_MODE, reg);
|
||||
|
||||
skge_write8(hw, RB_ADDR(rxqaddr[port], RB_CTRL), RB_ENA_OP_MD);
|
||||
|
||||
err = skge_rx_fill(dev);
|
||||
wmb();
|
||||
if (!err)
|
||||
skge_write8(hw, Q_ADDR(rxqaddr[port], Q_CSR), CSR_START | CSR_IRQ_CL_F);
|
||||
skge_write32(hw, B0_IMSK, hw->intr_mask);
|
||||
|
||||
err = skge_up(dev);
|
||||
if (err)
|
||||
dev_close(dev);
|
||||
else {
|
||||
gma_write16(hw, port, GM_GP_CTRL, ctl);
|
||||
|
||||
napi_enable(&skge->napi);
|
||||
netif_wake_queue(dev);
|
||||
}
|
||||
|
||||
return err;
|
||||
}
|
||||
|
|
|
|||
|
|
@ -31,7 +31,6 @@
|
|||
#include <linux/etherdevice.h>
|
||||
#include <linux/ethtool.h>
|
||||
#include <linux/pci.h>
|
||||
#include <linux/aer.h>
|
||||
#include <linux/ip.h>
|
||||
#include <net/ip.h>
|
||||
#include <linux/tcp.h>
|
||||
|
|
@ -240,22 +239,21 @@ static void sky2_power_on(struct sky2_hw *hw)
|
|||
sky2_write8(hw, B2_Y2_CLK_GATE, 0);
|
||||
|
||||
if (hw->flags & SKY2_HW_ADV_POWER_CTL) {
|
||||
struct pci_dev *pdev = hw->pdev;
|
||||
u32 reg;
|
||||
|
||||
pci_write_config_dword(pdev, PCI_DEV_REG3, 0);
|
||||
sky2_pci_write32(hw, PCI_DEV_REG3, 0);
|
||||
|
||||
pci_read_config_dword(pdev, PCI_DEV_REG4, ®);
|
||||
reg = sky2_pci_read32(hw, PCI_DEV_REG4);
|
||||
/* set all bits to 0 except bits 15..12 and 8 */
|
||||
reg &= P_ASPM_CONTROL_MSK;
|
||||
pci_write_config_dword(pdev, PCI_DEV_REG4, reg);
|
||||
sky2_pci_write32(hw, PCI_DEV_REG4, reg);
|
||||
|
||||
pci_read_config_dword(pdev, PCI_DEV_REG5, ®);
|
||||
reg = sky2_pci_read32(hw, PCI_DEV_REG5);
|
||||
/* set all bits to 0 except bits 28 & 27 */
|
||||
reg &= P_CTL_TIM_VMAIN_AV_MSK;
|
||||
pci_write_config_dword(pdev, PCI_DEV_REG5, reg);
|
||||
sky2_pci_write32(hw, PCI_DEV_REG5, reg);
|
||||
|
||||
pci_write_config_dword(pdev, PCI_CFG_REG_1, 0);
|
||||
sky2_pci_write32(hw, PCI_CFG_REG_1, 0);
|
||||
|
||||
/* Enable workaround for dev 4.107 on Yukon-Ultra & Extreme */
|
||||
reg = sky2_read32(hw, B2_GP_IO);
|
||||
|
|
@ -619,12 +617,11 @@ static void sky2_phy_init(struct sky2_hw *hw, unsigned port)
|
|||
|
||||
static void sky2_phy_power(struct sky2_hw *hw, unsigned port, int onoff)
|
||||
{
|
||||
struct pci_dev *pdev = hw->pdev;
|
||||
u32 reg1;
|
||||
static const u32 phy_power[] = { PCI_Y2_PHY1_POWD, PCI_Y2_PHY2_POWD };
|
||||
static const u32 coma_mode[] = { PCI_Y2_PHY1_COMA, PCI_Y2_PHY2_COMA };
|
||||
|
||||
pci_read_config_dword(pdev, PCI_DEV_REG1, ®1);
|
||||
reg1 = sky2_pci_read32(hw, PCI_DEV_REG1);
|
||||
/* Turn on/off phy power saving */
|
||||
if (onoff)
|
||||
reg1 &= ~phy_power[port];
|
||||
|
|
@ -634,8 +631,8 @@ static void sky2_phy_power(struct sky2_hw *hw, unsigned port, int onoff)
|
|||
if (onoff && hw->chip_id == CHIP_ID_YUKON_XL && hw->chip_rev > 1)
|
||||
reg1 |= coma_mode[port];
|
||||
|
||||
pci_write_config_dword(pdev, PCI_DEV_REG1, reg1);
|
||||
pci_read_config_dword(pdev, PCI_DEV_REG1, ®1);
|
||||
sky2_pci_write32(hw, PCI_DEV_REG1, reg1);
|
||||
reg1 = sky2_pci_read32(hw, PCI_DEV_REG1);
|
||||
|
||||
udelay(100);
|
||||
}
|
||||
|
|
@ -704,9 +701,9 @@ static void sky2_wol_init(struct sky2_port *sky2)
|
|||
sky2_write16(hw, WOL_REGS(port, WOL_CTRL_STAT), ctrl);
|
||||
|
||||
/* Turn on legacy PCI-Express PME mode */
|
||||
pci_read_config_dword(hw->pdev, PCI_DEV_REG1, ®1);
|
||||
reg1 = sky2_pci_read32(hw, PCI_DEV_REG1);
|
||||
reg1 |= PCI_Y2_PME_LEGACY;
|
||||
pci_write_config_dword(hw->pdev, PCI_DEV_REG1, reg1);
|
||||
sky2_pci_write32(hw, PCI_DEV_REG1, reg1);
|
||||
|
||||
/* block receiver */
|
||||
sky2_write8(hw, SK_REG(port, RX_GMF_CTRL_T), GMF_RST_SET);
|
||||
|
|
@ -848,6 +845,13 @@ static void sky2_mac_init(struct sky2_hw *hw, unsigned port)
|
|||
sky2_set_tx_stfwd(hw, port);
|
||||
}
|
||||
|
||||
if (hw->chip_id == CHIP_ID_YUKON_FE_P &&
|
||||
hw->chip_rev == CHIP_REV_YU_FE2_A0) {
|
||||
/* disable dynamic watermark */
|
||||
reg = sky2_read16(hw, SK_REG(port, TX_GMF_EA));
|
||||
reg &= ~TX_DYN_WM_ENA;
|
||||
sky2_write16(hw, SK_REG(port, TX_GMF_EA), reg);
|
||||
}
|
||||
}
|
||||
|
||||
/* Assign Ram Buffer allocation to queue */
|
||||
|
|
@ -1320,15 +1324,12 @@ static int sky2_up(struct net_device *dev)
|
|||
*/
|
||||
if (otherdev && netif_running(otherdev) &&
|
||||
(cap = pci_find_capability(hw->pdev, PCI_CAP_ID_PCIX))) {
|
||||
struct sky2_port *osky2 = netdev_priv(otherdev);
|
||||
u16 cmd;
|
||||
|
||||
pci_read_config_word(hw->pdev, cap + PCI_X_CMD, &cmd);
|
||||
cmd = sky2_pci_read16(hw, cap + PCI_X_CMD);
|
||||
cmd &= ~PCI_X_CMD_MAX_SPLIT;
|
||||
pci_write_config_word(hw->pdev, cap + PCI_X_CMD, cmd);
|
||||
sky2_pci_write16(hw, cap + PCI_X_CMD, cmd);
|
||||
|
||||
sky2->rx_csum = 0;
|
||||
osky2->rx_csum = 0;
|
||||
}
|
||||
|
||||
if (netif_msg_ifup(sky2))
|
||||
|
|
@ -2426,37 +2427,26 @@ static void sky2_hw_intr(struct sky2_hw *hw)
|
|||
if (status & (Y2_IS_MST_ERR | Y2_IS_IRQ_STAT)) {
|
||||
u16 pci_err;
|
||||
|
||||
pci_read_config_word(pdev, PCI_STATUS, &pci_err);
|
||||
pci_err = sky2_pci_read16(hw, PCI_STATUS);
|
||||
if (net_ratelimit())
|
||||
dev_err(&pdev->dev, "PCI hardware error (0x%x)\n",
|
||||
pci_err);
|
||||
|
||||
pci_write_config_word(pdev, PCI_STATUS,
|
||||
sky2_pci_write16(hw, PCI_STATUS,
|
||||
pci_err | PCI_STATUS_ERROR_BITS);
|
||||
}
|
||||
|
||||
if (status & Y2_IS_PCI_EXP) {
|
||||
/* PCI-Express uncorrectable Error occurred */
|
||||
int aer = pci_find_aer_capability(hw->pdev);
|
||||
u32 err;
|
||||
|
||||
if (aer) {
|
||||
pci_read_config_dword(pdev, aer + PCI_ERR_UNCOR_STATUS,
|
||||
&err);
|
||||
pci_cleanup_aer_uncorrect_error_status(pdev);
|
||||
} else {
|
||||
/* Either AER not configured, or not working
|
||||
* because of bad MMCONFIG, so just do recover
|
||||
* manually.
|
||||
*/
|
||||
err = sky2_read32(hw, Y2_CFG_AER + PCI_ERR_UNCOR_STATUS);
|
||||
sky2_write32(hw, Y2_CFG_AER + PCI_ERR_UNCOR_STATUS,
|
||||
0xfffffffful);
|
||||
}
|
||||
|
||||
err = sky2_read32(hw, Y2_CFG_AER + PCI_ERR_UNCOR_STATUS);
|
||||
sky2_write32(hw, Y2_CFG_AER + PCI_ERR_UNCOR_STATUS,
|
||||
0xfffffffful);
|
||||
if (net_ratelimit())
|
||||
dev_err(&pdev->dev, "PCI Express error (0x%x)\n", err);
|
||||
|
||||
sky2_read32(hw, Y2_CFG_AER + PCI_ERR_UNCOR_STATUS);
|
||||
}
|
||||
|
||||
if (status & Y2_HWE_L1_MASK)
|
||||
|
|
@ -2703,13 +2693,10 @@ static inline u32 sky2_clk2us(const struct sky2_hw *hw, u32 clk)
|
|||
|
||||
static int __devinit sky2_init(struct sky2_hw *hw)
|
||||
{
|
||||
int rc;
|
||||
u8 t8;
|
||||
|
||||
/* Enable all clocks and check for bad PCI access */
|
||||
rc = pci_write_config_dword(hw->pdev, PCI_DEV_REG3, 0);
|
||||
if (rc)
|
||||
return rc;
|
||||
sky2_pci_write32(hw, PCI_DEV_REG3, 0);
|
||||
|
||||
sky2_write8(hw, B0_CTST, CS_RST_CLR);
|
||||
|
||||
|
|
@ -2806,32 +2793,21 @@ static void sky2_reset(struct sky2_hw *hw)
|
|||
sky2_write8(hw, B2_TST_CTRL1, TST_CFG_WRITE_ON);
|
||||
|
||||
/* clear PCI errors, if any */
|
||||
pci_read_config_word(pdev, PCI_STATUS, &status);
|
||||
status = sky2_pci_read16(hw, PCI_STATUS);
|
||||
status |= PCI_STATUS_ERROR_BITS;
|
||||
pci_write_config_word(pdev, PCI_STATUS, status);
|
||||
sky2_pci_write16(hw, PCI_STATUS, status);
|
||||
|
||||
sky2_write8(hw, B0_CTST, CS_MRST_CLR);
|
||||
|
||||
cap = pci_find_capability(pdev, PCI_CAP_ID_EXP);
|
||||
if (cap) {
|
||||
if (pci_find_aer_capability(pdev)) {
|
||||
/* Check for advanced error reporting */
|
||||
pci_cleanup_aer_uncorrect_error_status(pdev);
|
||||
pci_cleanup_aer_correct_error_status(pdev);
|
||||
} else {
|
||||
dev_warn(&pdev->dev,
|
||||
"PCI Express Advanced Error Reporting"
|
||||
" not configured or MMCONFIG problem?\n");
|
||||
|
||||
sky2_write32(hw, Y2_CFG_AER + PCI_ERR_UNCOR_STATUS,
|
||||
0xfffffffful);
|
||||
}
|
||||
sky2_write32(hw, Y2_CFG_AER + PCI_ERR_UNCOR_STATUS,
|
||||
0xfffffffful);
|
||||
|
||||
/* If error bit is stuck on ignore it */
|
||||
if (sky2_read32(hw, B0_HWE_ISRC) & Y2_IS_PCI_EXP)
|
||||
dev_info(&pdev->dev, "ignoring stuck error report bit\n");
|
||||
|
||||
else if (pci_enable_pcie_error_reporting(pdev))
|
||||
else
|
||||
hwe_mask |= Y2_IS_PCI_EXP;
|
||||
}
|
||||
|
||||
|
|
@ -2930,16 +2906,14 @@ static void sky2_restart(struct work_struct *work)
|
|||
int i, err;
|
||||
|
||||
rtnl_lock();
|
||||
sky2_write32(hw, B0_IMSK, 0);
|
||||
sky2_read32(hw, B0_IMSK);
|
||||
napi_disable(&hw->napi);
|
||||
|
||||
for (i = 0; i < hw->ports; i++) {
|
||||
dev = hw->dev[i];
|
||||
if (netif_running(dev))
|
||||
sky2_down(dev);
|
||||
}
|
||||
|
||||
napi_disable(&hw->napi);
|
||||
sky2_write32(hw, B0_IMSK, 0);
|
||||
sky2_reset(hw);
|
||||
sky2_write32(hw, B0_IMSK, Y2_IS_BASE);
|
||||
napi_enable(&hw->napi);
|
||||
|
|
@ -3672,32 +3646,33 @@ static int sky2_set_tso(struct net_device *dev, u32 data)
|
|||
static int sky2_get_eeprom_len(struct net_device *dev)
|
||||
{
|
||||
struct sky2_port *sky2 = netdev_priv(dev);
|
||||
struct sky2_hw *hw = sky2->hw;
|
||||
u16 reg2;
|
||||
|
||||
pci_read_config_word(sky2->hw->pdev, PCI_DEV_REG2, ®2);
|
||||
reg2 = sky2_pci_read16(hw, PCI_DEV_REG2);
|
||||
return 1 << ( ((reg2 & PCI_VPD_ROM_SZ) >> 14) + 8);
|
||||
}
|
||||
|
||||
static u32 sky2_vpd_read(struct pci_dev *pdev, int cap, u16 offset)
|
||||
static u32 sky2_vpd_read(struct sky2_hw *hw, int cap, u16 offset)
|
||||
{
|
||||
u32 val;
|
||||
|
||||
pci_write_config_word(pdev, cap + PCI_VPD_ADDR, offset);
|
||||
sky2_pci_write16(hw, cap + PCI_VPD_ADDR, offset);
|
||||
|
||||
do {
|
||||
pci_read_config_word(pdev, cap + PCI_VPD_ADDR, &offset);
|
||||
offset = sky2_pci_read16(hw, cap + PCI_VPD_ADDR);
|
||||
} while (!(offset & PCI_VPD_ADDR_F));
|
||||
|
||||
pci_read_config_dword(pdev, cap + PCI_VPD_DATA, &val);
|
||||
val = sky2_pci_read32(hw, cap + PCI_VPD_DATA);
|
||||
return val;
|
||||
}
|
||||
|
||||
static void sky2_vpd_write(struct pci_dev *pdev, int cap, u16 offset, u32 val)
|
||||
static void sky2_vpd_write(struct sky2_hw *hw, int cap, u16 offset, u32 val)
|
||||
{
|
||||
pci_write_config_word(pdev, cap + PCI_VPD_DATA, val);
|
||||
pci_write_config_dword(pdev, cap + PCI_VPD_ADDR, offset | PCI_VPD_ADDR_F);
|
||||
sky2_pci_write16(hw, cap + PCI_VPD_DATA, val);
|
||||
sky2_pci_write32(hw, cap + PCI_VPD_ADDR, offset | PCI_VPD_ADDR_F);
|
||||
do {
|
||||
pci_read_config_word(pdev, cap + PCI_VPD_ADDR, &offset);
|
||||
offset = sky2_pci_read16(hw, cap + PCI_VPD_ADDR);
|
||||
} while (offset & PCI_VPD_ADDR_F);
|
||||
}
|
||||
|
||||
|
|
@ -3715,7 +3690,7 @@ static int sky2_get_eeprom(struct net_device *dev, struct ethtool_eeprom *eeprom
|
|||
eeprom->magic = SKY2_EEPROM_MAGIC;
|
||||
|
||||
while (length > 0) {
|
||||
u32 val = sky2_vpd_read(sky2->hw->pdev, cap, offset);
|
||||
u32 val = sky2_vpd_read(sky2->hw, cap, offset);
|
||||
int n = min_t(int, length, sizeof(val));
|
||||
|
||||
memcpy(data, &val, n);
|
||||
|
|
@ -3745,10 +3720,10 @@ static int sky2_set_eeprom(struct net_device *dev, struct ethtool_eeprom *eeprom
|
|||
int n = min_t(int, length, sizeof(val));
|
||||
|
||||
if (n < sizeof(val))
|
||||
val = sky2_vpd_read(sky2->hw->pdev, cap, offset);
|
||||
val = sky2_vpd_read(sky2->hw, cap, offset);
|
||||
memcpy(&val, data, n);
|
||||
|
||||
sky2_vpd_write(sky2->hw->pdev, cap, offset, val);
|
||||
sky2_vpd_write(sky2->hw, cap, offset, val);
|
||||
|
||||
length -= n;
|
||||
data += n;
|
||||
|
|
@ -4013,7 +3988,7 @@ static __devinit struct net_device *sky2_init_netdev(struct sky2_hw *hw,
|
|||
sky2->duplex = -1;
|
||||
sky2->speed = -1;
|
||||
sky2->advertising = sky2_supported_modes(hw);
|
||||
sky2->rx_csum = 1;
|
||||
sky2->rx_csum = (hw->chip_id != CHIP_ID_YUKON_XL);
|
||||
sky2->wol = wol;
|
||||
|
||||
spin_lock_init(&sky2->phy_lock);
|
||||
|
|
@ -4184,9 +4159,9 @@ static int __devinit sky2_probe(struct pci_dev *pdev,
|
|||
*/
|
||||
{
|
||||
u32 reg;
|
||||
pci_read_config_dword(pdev,PCI_DEV_REG2, ®);
|
||||
reg = sky2_pci_read32(hw, PCI_DEV_REG2);
|
||||
reg &= ~PCI_REV_DESC;
|
||||
pci_write_config_dword(pdev, PCI_DEV_REG2, reg);
|
||||
sky2_pci_write32(hw, PCI_DEV_REG2, reg);
|
||||
}
|
||||
#endif
|
||||
|
||||
|
|
@ -4377,7 +4352,7 @@ static int sky2_resume(struct pci_dev *pdev)
|
|||
if (hw->chip_id == CHIP_ID_YUKON_EX ||
|
||||
hw->chip_id == CHIP_ID_YUKON_EC_U ||
|
||||
hw->chip_id == CHIP_ID_YUKON_FE_P)
|
||||
pci_write_config_dword(pdev, PCI_DEV_REG3, 0);
|
||||
sky2_pci_write32(hw, PCI_DEV_REG3, 0);
|
||||
|
||||
sky2_reset(hw);
|
||||
sky2_write32(hw, B0_IMSK, Y2_IS_BASE);
|
||||
|
|
|
|||
|
|
@ -2128,4 +2128,25 @@ static inline void gma_set_addr(struct sky2_hw *hw, unsigned port, unsigned reg,
|
|||
gma_write16(hw, port, reg+4,(u16) addr[2] | ((u16) addr[3] << 8));
|
||||
gma_write16(hw, port, reg+8,(u16) addr[4] | ((u16) addr[5] << 8));
|
||||
}
|
||||
|
||||
/* PCI config space access */
|
||||
static inline u32 sky2_pci_read32(const struct sky2_hw *hw, unsigned reg)
|
||||
{
|
||||
return sky2_read32(hw, Y2_CFG_SPC + reg);
|
||||
}
|
||||
|
||||
static inline u16 sky2_pci_read16(const struct sky2_hw *hw, unsigned reg)
|
||||
{
|
||||
return sky2_read16(hw, Y2_CFG_SPC + reg);
|
||||
}
|
||||
|
||||
static inline void sky2_pci_write32(struct sky2_hw *hw, unsigned reg, u32 val)
|
||||
{
|
||||
sky2_write32(hw, Y2_CFG_SPC + reg, val);
|
||||
}
|
||||
|
||||
static inline void sky2_pci_write16(struct sky2_hw *hw, unsigned reg, u16 val)
|
||||
{
|
||||
sky2_write16(hw, Y2_CFG_SPC + reg, val);
|
||||
}
|
||||
#endif
|
||||
|
|
|
|||
|
|
@ -428,7 +428,6 @@ static inline void smc911x_drop_pkt(struct net_device *dev)
|
|||
*/
|
||||
static inline void smc911x_rcv(struct net_device *dev)
|
||||
{
|
||||
struct smc911x_local *lp = netdev_priv(dev);
|
||||
unsigned long ioaddr = dev->base_addr;
|
||||
unsigned int pkt_len, status;
|
||||
struct sk_buff *skb;
|
||||
|
|
@ -473,6 +472,7 @@ static inline void smc911x_rcv(struct net_device *dev)
|
|||
skb_put(skb,pkt_len-4);
|
||||
#ifdef SMC_USE_DMA
|
||||
{
|
||||
struct smc911x_local *lp = netdev_priv(dev);
|
||||
unsigned int fifo;
|
||||
/* Lower the FIFO threshold if possible */
|
||||
fifo = SMC_GET_FIFO_INT();
|
||||
|
|
@ -1299,9 +1299,9 @@ smc911x_rx_dma_irq(int dma, void *data)
|
|||
PRINT_PKT(skb->data, skb->len);
|
||||
dev->last_rx = jiffies;
|
||||
skb->protocol = eth_type_trans(skb, dev);
|
||||
netif_rx(skb);
|
||||
dev->stats.rx_packets++;
|
||||
dev->stats.rx_bytes += skb->len;
|
||||
netif_rx(skb);
|
||||
|
||||
spin_lock_irqsave(&lp->lock, flags);
|
||||
pkts = (SMC_GET_RX_FIFO_INF() & RX_FIFO_INF_RXSUSED_) >> 16;
|
||||
|
|
@ -1379,13 +1379,6 @@ static void smc911x_set_multicast_list(struct net_device *dev)
|
|||
unsigned int multicast_table[2];
|
||||
unsigned int mcr, update_multicast = 0;
|
||||
unsigned long flags;
|
||||
/* table for flipping the order of 5 bits */
|
||||
static const unsigned char invert5[] =
|
||||
{0x00, 0x10, 0x08, 0x18, 0x04, 0x14, 0x0C, 0x1C,
|
||||
0x02, 0x12, 0x0A, 0x1A, 0x06, 0x16, 0x0E, 0x1E,
|
||||
0x01, 0x11, 0x09, 0x19, 0x05, 0x15, 0x0D, 0x1D,
|
||||
0x03, 0x13, 0x0B, 0x1B, 0x07, 0x17, 0x0F, 0x1F};
|
||||
|
||||
|
||||
DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __FUNCTION__);
|
||||
|
||||
|
|
@ -1432,7 +1425,7 @@ static void smc911x_set_multicast_list(struct net_device *dev)
|
|||
|
||||
cur_addr = dev->mc_list;
|
||||
for (i = 0; i < dev->mc_count; i++, cur_addr = cur_addr->next) {
|
||||
int position;
|
||||
u32 position;
|
||||
|
||||
/* do we have a pointer here? */
|
||||
if (!cur_addr)
|
||||
|
|
@ -1442,12 +1435,10 @@ static void smc911x_set_multicast_list(struct net_device *dev)
|
|||
if (!(*cur_addr->dmi_addr & 1))
|
||||
continue;
|
||||
|
||||
/* only use the low order bits */
|
||||
position = crc32_le(~0, cur_addr->dmi_addr, 6) & 0x3f;
|
||||
/* upper 6 bits are used as hash index */
|
||||
position = ether_crc(ETH_ALEN, cur_addr->dmi_addr)>>26;
|
||||
|
||||
/* do some messy swapping to put the bit in the right spot */
|
||||
multicast_table[invert5[position&0x1F]&0x1] |=
|
||||
(1<<invert5[(position>>1)&0x1F]);
|
||||
multicast_table[position>>5] |= 1 << (position&0x1f);
|
||||
}
|
||||
|
||||
/* be sure I get rid of flags I might have set */
|
||||
|
|
|
|||
|
|
@ -37,7 +37,7 @@
|
|||
#define SMC_USE_16BIT 0
|
||||
#define SMC_USE_32BIT 1
|
||||
#define SMC_IRQ_SENSE IRQF_TRIGGER_FALLING
|
||||
#elif CONFIG_SH_MAGIC_PANEL_R2
|
||||
#elif defined(CONFIG_SH_MAGIC_PANEL_R2)
|
||||
#define SMC_USE_SH_DMA 0
|
||||
#define SMC_USE_16BIT 0
|
||||
#define SMC_USE_32BIT 1
|
||||
|
|
|
|||
|
|
@ -55,7 +55,7 @@
|
|||
#define SMC_insw(a, r, p, l) readsw((a) + (r), p, l)
|
||||
#define SMC_outsw(a, r, p, l) writesw((a) + (r), p, l)
|
||||
|
||||
#elif defined(CONFIG_BFIN)
|
||||
#elif defined(CONFIG_BLACKFIN)
|
||||
|
||||
#define SMC_IRQ_FLAGS IRQF_TRIGGER_HIGH
|
||||
#define RPC_LSA_DEFAULT RPC_LED_100_10
|
||||
|
|
|
|||
|
|
@ -2281,14 +2281,12 @@ static void gem_reset_task(struct work_struct *work)
|
|||
|
||||
mutex_lock(&gp->pm_mutex);
|
||||
|
||||
napi_disable(&gp->napi);
|
||||
if (gp->opened)
|
||||
napi_disable(&gp->napi);
|
||||
|
||||
spin_lock_irq(&gp->lock);
|
||||
spin_lock(&gp->tx_lock);
|
||||
|
||||
if (gp->running == 0)
|
||||
goto not_running;
|
||||
|
||||
if (gp->running) {
|
||||
netif_stop_queue(gp->dev);
|
||||
|
||||
|
|
@ -2298,13 +2296,14 @@ static void gem_reset_task(struct work_struct *work)
|
|||
gem_set_link_modes(gp);
|
||||
netif_wake_queue(gp->dev);
|
||||
}
|
||||
not_running:
|
||||
|
||||
gp->reset_task_pending = 0;
|
||||
|
||||
spin_unlock(&gp->tx_lock);
|
||||
spin_unlock_irq(&gp->lock);
|
||||
|
||||
napi_enable(&gp->napi);
|
||||
if (gp->opened)
|
||||
napi_enable(&gp->napi);
|
||||
|
||||
mutex_unlock(&gp->pm_mutex);
|
||||
}
|
||||
|
|
|
|||
|
|
@ -2118,8 +2118,8 @@ static int dmfe_suspend(struct pci_dev *pci_dev, pm_message_t state)
|
|||
pci_enable_wake(pci_dev, PCI_D3cold, 1);
|
||||
|
||||
/* Power down device*/
|
||||
pci_set_power_state(pci_dev, pci_choose_state (pci_dev,state));
|
||||
pci_save_state(pci_dev);
|
||||
pci_set_power_state(pci_dev, pci_choose_state (pci_dev, state));
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
|
@ -2129,8 +2129,8 @@ static int dmfe_resume(struct pci_dev *pci_dev)
|
|||
struct net_device *dev = pci_get_drvdata(pci_dev);
|
||||
u32 tmp;
|
||||
|
||||
pci_restore_state(pci_dev);
|
||||
pci_set_power_state(pci_dev, PCI_D0);
|
||||
pci_restore_state(pci_dev);
|
||||
|
||||
/* Re-initilize DM910X board */
|
||||
dmfe_init_dm910x(dev);
|
||||
|
|
|
|||
|
|
@ -1460,6 +1460,8 @@ static int adjust_enet_interface(struct ucc_geth_private *ugeth)
|
|||
if ((ugeth->phy_interface == PHY_INTERFACE_MODE_RMII) ||
|
||||
(ugeth->phy_interface == PHY_INTERFACE_MODE_RGMII) ||
|
||||
(ugeth->phy_interface == PHY_INTERFACE_MODE_RGMII_ID) ||
|
||||
(ugeth->phy_interface == PHY_INTERFACE_MODE_RGMII_RXID) ||
|
||||
(ugeth->phy_interface == PHY_INTERFACE_MODE_RGMII_TXID) ||
|
||||
(ugeth->phy_interface == PHY_INTERFACE_MODE_RTBI)) {
|
||||
upsmr |= UPSMR_RPM;
|
||||
switch (ugeth->max_speed) {
|
||||
|
|
@ -1557,6 +1559,8 @@ static void adjust_link(struct net_device *dev)
|
|||
if ((ugeth->phy_interface == PHY_INTERFACE_MODE_RMII) ||
|
||||
(ugeth->phy_interface == PHY_INTERFACE_MODE_RGMII) ||
|
||||
(ugeth->phy_interface == PHY_INTERFACE_MODE_RGMII_ID) ||
|
||||
(ugeth->phy_interface == PHY_INTERFACE_MODE_RGMII_RXID) ||
|
||||
(ugeth->phy_interface == PHY_INTERFACE_MODE_RGMII_TXID) ||
|
||||
(ugeth->phy_interface == PHY_INTERFACE_MODE_RTBI)) {
|
||||
if (phydev->speed == SPEED_10)
|
||||
upsmr |= UPSMR_R10M;
|
||||
|
|
@ -3795,6 +3799,10 @@ static phy_interface_t to_phy_interface(const char *phy_connection_type)
|
|||
return PHY_INTERFACE_MODE_RGMII;
|
||||
if (strcasecmp(phy_connection_type, "rgmii-id") == 0)
|
||||
return PHY_INTERFACE_MODE_RGMII_ID;
|
||||
if (strcasecmp(phy_connection_type, "rgmii-txid") == 0)
|
||||
return PHY_INTERFACE_MODE_RGMII_TXID;
|
||||
if (strcasecmp(phy_connection_type, "rgmii-rxid") == 0)
|
||||
return PHY_INTERFACE_MODE_RGMII_RXID;
|
||||
if (strcasecmp(phy_connection_type, "rtbi") == 0)
|
||||
return PHY_INTERFACE_MODE_RTBI;
|
||||
|
||||
|
|
@ -3889,6 +3897,8 @@ static int ucc_geth_probe(struct of_device* ofdev, const struct of_device_id *ma
|
|||
case PHY_INTERFACE_MODE_GMII:
|
||||
case PHY_INTERFACE_MODE_RGMII:
|
||||
case PHY_INTERFACE_MODE_RGMII_ID:
|
||||
case PHY_INTERFACE_MODE_RGMII_RXID:
|
||||
case PHY_INTERFACE_MODE_RGMII_TXID:
|
||||
case PHY_INTERFACE_MODE_TBI:
|
||||
case PHY_INTERFACE_MODE_RTBI:
|
||||
max_speed = SPEED_1000;
|
||||
|
|
|
|||
|
|
@ -94,7 +94,7 @@ static void dm_write_async_callback(struct urb *urb)
|
|||
struct usb_ctrlrequest *req = (struct usb_ctrlrequest *)urb->context;
|
||||
|
||||
if (urb->status < 0)
|
||||
printk(KERN_DEBUG "dm_write_async_callback() failed with %d",
|
||||
printk(KERN_DEBUG "dm_write_async_callback() failed with %d\n",
|
||||
urb->status);
|
||||
|
||||
kfree(req);
|
||||
|
|
|
|||
|
|
@ -1242,6 +1242,9 @@ static int velocity_rx_refill(struct velocity_info *vptr)
|
|||
static int velocity_init_rd_ring(struct velocity_info *vptr)
|
||||
{
|
||||
int ret;
|
||||
int mtu = vptr->dev->mtu;
|
||||
|
||||
vptr->rx_buf_sz = (mtu <= ETH_DATA_LEN) ? PKT_BUF_SZ : mtu + 32;
|
||||
|
||||
vptr->rd_info = kcalloc(vptr->options.numrx,
|
||||
sizeof(struct velocity_rd_info), GFP_KERNEL);
|
||||
|
|
@ -1898,8 +1901,6 @@ static int velocity_open(struct net_device *dev)
|
|||
struct velocity_info *vptr = netdev_priv(dev);
|
||||
int ret;
|
||||
|
||||
vptr->rx_buf_sz = (dev->mtu <= 1504 ? PKT_BUF_SZ : dev->mtu + 32);
|
||||
|
||||
ret = velocity_init_rings(vptr);
|
||||
if (ret < 0)
|
||||
goto out;
|
||||
|
|
@ -1978,12 +1979,6 @@ static int velocity_change_mtu(struct net_device *dev, int new_mtu)
|
|||
velocity_free_rd_ring(vptr);
|
||||
|
||||
dev->mtu = new_mtu;
|
||||
if (new_mtu > 8192)
|
||||
vptr->rx_buf_sz = 9 * 1024;
|
||||
else if (new_mtu > 4096)
|
||||
vptr->rx_buf_sz = 8192;
|
||||
else
|
||||
vptr->rx_buf_sz = 4 * 1024;
|
||||
|
||||
ret = velocity_init_rd_ring(vptr);
|
||||
if (ret < 0)
|
||||
|
|
|
|||
|
|
@ -1566,7 +1566,7 @@ static void b43_release_firmware(struct b43_wldev *dev)
|
|||
static void b43_print_fw_helptext(struct b43_wl *wl)
|
||||
{
|
||||
b43err(wl, "You must go to "
|
||||
"http://linuxwireless.org/en/users/Drivers/bcm43xx#devicefirmware "
|
||||
"http://linuxwireless.org/en/users/Drivers/b43#devicefirmware "
|
||||
"and download the correct firmware (version 4).\n");
|
||||
}
|
||||
|
||||
|
|
|
|||
|
|
@ -2214,7 +2214,7 @@ int b43_phy_init_tssi2dbm_table(struct b43_wldev *dev)
|
|||
}
|
||||
dyn_tssi2dbm = kmalloc(64, GFP_KERNEL);
|
||||
if (dyn_tssi2dbm == NULL) {
|
||||
b43err(dev->wl, "Could not allocate memory"
|
||||
b43err(dev->wl, "Could not allocate memory "
|
||||
"for tssi2dbm table\n");
|
||||
return -ENOMEM;
|
||||
}
|
||||
|
|
|
|||
|
|
@ -996,7 +996,7 @@ int b43legacy_dma_init(struct b43legacy_wldev *dev)
|
|||
|
||||
err = ssb_dma_set_mask(dev->dev, dmamask);
|
||||
if (err) {
|
||||
#ifdef BCM43XX_PIO
|
||||
#ifdef CONFIG_B43LEGACY_PIO
|
||||
b43legacywarn(dev->wl, "DMA for this device not supported. "
|
||||
"Falling back to PIO\n");
|
||||
dev->__using_pio = 1;
|
||||
|
|
|
|||
|
|
@ -1419,7 +1419,7 @@ static void b43legacy_release_firmware(struct b43legacy_wldev *dev)
|
|||
static void b43legacy_print_fw_helptext(struct b43legacy_wl *wl)
|
||||
{
|
||||
b43legacyerr(wl, "You must go to http://linuxwireless.org/en/users/"
|
||||
"Drivers/bcm43xx#devicefirmware "
|
||||
"Drivers/b43#devicefirmware "
|
||||
"and download the correct firmware (version 3).\n");
|
||||
}
|
||||
|
||||
|
|
|
|||
|
|
@ -2020,7 +2020,7 @@ int b43legacy_phy_init_tssi2dbm_table(struct b43legacy_wldev *dev)
|
|||
phy->idle_tssi = 62;
|
||||
dyn_tssi2dbm = kmalloc(64, GFP_KERNEL);
|
||||
if (dyn_tssi2dbm == NULL) {
|
||||
b43legacyerr(dev->wl, "Could not allocate memory"
|
||||
b43legacyerr(dev->wl, "Could not allocate memory "
|
||||
"for tssi2dbm table\n");
|
||||
return -ENOMEM;
|
||||
}
|
||||
|
|
|
|||
|
|
@ -2149,7 +2149,7 @@ int bcm43xx_phy_init_tssi2dbm_table(struct bcm43xx_private *bcm)
|
|||
}
|
||||
dyn_tssi2dbm = kmalloc(64, GFP_KERNEL);
|
||||
if (dyn_tssi2dbm == NULL) {
|
||||
printk(KERN_ERR PFX "Could not allocate memory"
|
||||
printk(KERN_ERR PFX "Could not allocate memory "
|
||||
"for tssi2dbm table\n");
|
||||
return -ENOMEM;
|
||||
}
|
||||
|
|
|
|||
|
|
@ -2915,6 +2915,10 @@ static void iwl_set_rate(struct iwl_priv *priv)
|
|||
int i;
|
||||
|
||||
hw = iwl_get_hw_mode(priv, priv->phymode);
|
||||
if (!hw) {
|
||||
IWL_ERROR("Failed to set rate: unable to get hw mode\n");
|
||||
return;
|
||||
}
|
||||
|
||||
priv->active_rate = 0;
|
||||
priv->active_rate_basic = 0;
|
||||
|
|
@ -6936,13 +6940,10 @@ static int iwl_mac_add_interface(struct ieee80211_hw *hw,
|
|||
DECLARE_MAC_BUF(mac);
|
||||
|
||||
IWL_DEBUG_MAC80211("enter: id %d, type %d\n", conf->if_id, conf->type);
|
||||
if (conf->mac_addr)
|
||||
IWL_DEBUG_MAC80211("enter: MAC %s\n",
|
||||
print_mac(mac, conf->mac_addr));
|
||||
|
||||
if (priv->interface_id) {
|
||||
IWL_DEBUG_MAC80211("leave - interface_id != 0\n");
|
||||
return 0;
|
||||
return -EOPNOTSUPP;
|
||||
}
|
||||
|
||||
spin_lock_irqsave(&priv->lock, flags);
|
||||
|
|
@ -6951,6 +6952,12 @@ static int iwl_mac_add_interface(struct ieee80211_hw *hw,
|
|||
spin_unlock_irqrestore(&priv->lock, flags);
|
||||
|
||||
mutex_lock(&priv->mutex);
|
||||
|
||||
if (conf->mac_addr) {
|
||||
IWL_DEBUG_MAC80211("Set: %s\n", print_mac(mac, conf->mac_addr));
|
||||
memcpy(priv->mac_addr, conf->mac_addr, ETH_ALEN);
|
||||
}
|
||||
|
||||
iwl_set_mode(priv, conf->type);
|
||||
|
||||
IWL_DEBUG_MAC80211("leave\n");
|
||||
|
|
@ -8270,6 +8277,7 @@ static void iwl_cancel_deferred_work(struct iwl_priv *priv)
|
|||
{
|
||||
iwl_hw_cancel_deferred_work(priv);
|
||||
|
||||
cancel_delayed_work_sync(&priv->init_alive_start);
|
||||
cancel_delayed_work(&priv->scan_check);
|
||||
cancel_delayed_work(&priv->alive_start);
|
||||
cancel_delayed_work(&priv->post_associate);
|
||||
|
|
|
|||
|
|
@ -3003,6 +3003,10 @@ static void iwl_set_rate(struct iwl_priv *priv)
|
|||
int i;
|
||||
|
||||
hw = iwl_get_hw_mode(priv, priv->phymode);
|
||||
if (!hw) {
|
||||
IWL_ERROR("Failed to set rate: unable to get hw mode\n");
|
||||
return;
|
||||
}
|
||||
|
||||
priv->active_rate = 0;
|
||||
priv->active_rate_basic = 0;
|
||||
|
|
@ -7326,9 +7330,6 @@ static int iwl_mac_add_interface(struct ieee80211_hw *hw,
|
|||
DECLARE_MAC_BUF(mac);
|
||||
|
||||
IWL_DEBUG_MAC80211("enter: id %d, type %d\n", conf->if_id, conf->type);
|
||||
if (conf->mac_addr)
|
||||
IWL_DEBUG_MAC80211("enter: MAC %s\n",
|
||||
print_mac(mac, conf->mac_addr));
|
||||
|
||||
if (priv->interface_id) {
|
||||
IWL_DEBUG_MAC80211("leave - interface_id != 0\n");
|
||||
|
|
@ -7341,6 +7342,11 @@ static int iwl_mac_add_interface(struct ieee80211_hw *hw,
|
|||
spin_unlock_irqrestore(&priv->lock, flags);
|
||||
|
||||
mutex_lock(&priv->mutex);
|
||||
|
||||
if (conf->mac_addr) {
|
||||
IWL_DEBUG_MAC80211("Set %s\n", print_mac(mac, conf->mac_addr));
|
||||
memcpy(priv->mac_addr, conf->mac_addr, ETH_ALEN);
|
||||
}
|
||||
iwl_set_mode(priv, conf->type);
|
||||
|
||||
IWL_DEBUG_MAC80211("leave\n");
|
||||
|
|
@ -8864,6 +8870,7 @@ static void iwl_cancel_deferred_work(struct iwl_priv *priv)
|
|||
{
|
||||
iwl_hw_cancel_deferred_work(priv);
|
||||
|
||||
cancel_delayed_work_sync(&priv->init_alive_start);
|
||||
cancel_delayed_work(&priv->scan_check);
|
||||
cancel_delayed_work(&priv->alive_start);
|
||||
cancel_delayed_work(&priv->post_associate);
|
||||
|
|
|
|||
|
|
@ -170,7 +170,8 @@ static int if_cs_poll_while_fw_download(struct if_cs_card *card, uint addr, u8 r
|
|||
#define IF_CS_H_IC_TX_OVER 0x0001
|
||||
#define IF_CS_H_IC_RX_OVER 0x0002
|
||||
#define IF_CS_H_IC_DNLD_OVER 0x0004
|
||||
#define IF_CS_H_IC_HOST_EVENT 0x0008
|
||||
#define IF_CS_H_IC_POWER_DOWN 0x0008
|
||||
#define IF_CS_H_IC_HOST_EVENT 0x0010
|
||||
#define IF_CS_H_IC_MASK 0x001f
|
||||
|
||||
#define IF_CS_H_INT_MASK 0x00000004
|
||||
|
|
|
|||
|
|
@ -1165,8 +1165,6 @@ wlan_private *libertas_add_card(void *card, struct device *dmdev)
|
|||
#ifdef WIRELESS_EXT
|
||||
dev->wireless_handlers = (struct iw_handler_def *)&libertas_handler_def;
|
||||
#endif
|
||||
#define NETIF_F_DYNALLOC 16
|
||||
dev->features |= NETIF_F_DYNALLOC;
|
||||
dev->flags |= IFF_BROADCAST | IFF_MULTICAST;
|
||||
dev->set_multicast_list = libertas_set_multicast_list;
|
||||
|
||||
|
|
@ -1348,8 +1346,6 @@ int libertas_add_mesh(wlan_private *priv, struct device *dev)
|
|||
#ifdef WIRELESS_EXT
|
||||
mesh_dev->wireless_handlers = (struct iw_handler_def *)&mesh_handler_def;
|
||||
#endif
|
||||
#define NETIF_F_DYNALLOC 16
|
||||
|
||||
/* Register virtual mesh interface */
|
||||
ret = register_netdev(mesh_dev);
|
||||
if (ret) {
|
||||
|
|
|
|||
|
|
@ -1528,7 +1528,7 @@ static int wlan_set_encodeext(struct net_device *dev,
|
|||
&& (ext->key_len != KEY_LEN_WPA_TKIP))
|
||||
|| ((alg == IW_ENCODE_ALG_CCMP)
|
||||
&& (ext->key_len != KEY_LEN_WPA_AES))) {
|
||||
lbs_deb_wext("invalid size %d for key of alg"
|
||||
lbs_deb_wext("invalid size %d for key of alg "
|
||||
"type %d\n",
|
||||
ext->key_len,
|
||||
alg);
|
||||
|
|
|
|||
|
|
@ -806,7 +806,7 @@ static int netwave_pcmcia_config(struct pcmcia_device *link) {
|
|||
for (i = 0; i < 6; i++)
|
||||
dev->dev_addr[i] = readb(ramBase + NETWAVE_EREG_PA + i);
|
||||
|
||||
printk(KERN_INFO "%s: Netwave: port %#3lx, irq %d, mem %lx"
|
||||
printk(KERN_INFO "%s: Netwave: port %#3lx, irq %d, mem %lx, "
|
||||
"id %c%c, hw_addr %s\n",
|
||||
dev->name, dev->base_addr, dev->irq,
|
||||
(u_long) ramBase,
|
||||
|
|
|
|||
|
|
@ -308,7 +308,7 @@ static int p54u_read_eeprom(struct ieee80211_hw *dev)
|
|||
|
||||
buf = kmalloc(0x2020, GFP_KERNEL);
|
||||
if (!buf) {
|
||||
printk(KERN_ERR "prism54usb: cannot allocate memory for"
|
||||
printk(KERN_ERR "prism54usb: cannot allocate memory for "
|
||||
"eeprom readback!\n");
|
||||
return -ENOMEM;
|
||||
}
|
||||
|
|
|
|||
|
|
@ -768,9 +768,13 @@ lba_fixup_bus(struct pci_bus *bus)
|
|||
DBG("lba_fixup_bus() WTF? 0x%lx [%lx/%lx] XXX",
|
||||
res->flags, res->start, res->end);
|
||||
}
|
||||
if ((i != PCI_ROM_RESOURCE) ||
|
||||
(res->flags & IORESOURCE_ROM_ENABLE))
|
||||
pci_claim_resource(dev, i);
|
||||
|
||||
/*
|
||||
** FIXME: this will result in whinging for devices
|
||||
** that share expansion ROMs (think quad tulip), but
|
||||
** isn't harmful.
|
||||
*/
|
||||
pci_claim_resource(dev, i);
|
||||
}
|
||||
|
||||
#ifdef FBB_SUPPORT
|
||||
|
|
|
|||
|
|
@ -293,7 +293,7 @@ int rtc_irq_register(struct rtc_device *rtc, struct rtc_task *task)
|
|||
return -EINVAL;
|
||||
|
||||
/* Cannot register while the char dev is in use */
|
||||
if (test_and_set_bit(RTC_DEV_BUSY, &rtc->flags))
|
||||
if (test_and_set_bit_lock(RTC_DEV_BUSY, &rtc->flags))
|
||||
return -EBUSY;
|
||||
|
||||
spin_lock_irq(&rtc->irq_task_lock);
|
||||
|
|
@ -303,7 +303,7 @@ int rtc_irq_register(struct rtc_device *rtc, struct rtc_task *task)
|
|||
}
|
||||
spin_unlock_irq(&rtc->irq_task_lock);
|
||||
|
||||
clear_bit(RTC_DEV_BUSY, &rtc->flags);
|
||||
clear_bit_unlock(RTC_DEV_BUSY, &rtc->flags);
|
||||
|
||||
return retval;
|
||||
}
|
||||
|
|
|
|||
|
|
@ -26,7 +26,7 @@ static int rtc_dev_open(struct inode *inode, struct file *file)
|
|||
struct rtc_device, char_dev);
|
||||
const struct rtc_class_ops *ops = rtc->ops;
|
||||
|
||||
if (test_and_set_bit(RTC_DEV_BUSY, &rtc->flags))
|
||||
if (test_and_set_bit_lock(RTC_DEV_BUSY, &rtc->flags))
|
||||
return -EBUSY;
|
||||
|
||||
file->private_data = rtc;
|
||||
|
|
@ -41,7 +41,7 @@ static int rtc_dev_open(struct inode *inode, struct file *file)
|
|||
}
|
||||
|
||||
/* something has gone wrong */
|
||||
clear_bit(RTC_DEV_BUSY, &rtc->flags);
|
||||
clear_bit_unlock(RTC_DEV_BUSY, &rtc->flags);
|
||||
return err;
|
||||
}
|
||||
|
||||
|
|
@ -402,7 +402,7 @@ static int rtc_dev_release(struct inode *inode, struct file *file)
|
|||
if (rtc->ops->release)
|
||||
rtc->ops->release(rtc->dev.parent);
|
||||
|
||||
clear_bit(RTC_DEV_BUSY, &rtc->flags);
|
||||
clear_bit_unlock(RTC_DEV_BUSY, &rtc->flags);
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
|
|
|||
|
|
@ -89,13 +89,9 @@ static int max6902_get_reg(struct device *dev, unsigned char address,
|
|||
|
||||
/* do the i/o */
|
||||
status = spi_sync(spi, &message);
|
||||
|
||||
if (status == 0)
|
||||
status = message.status;
|
||||
else
|
||||
return status;
|
||||
|
||||
*data = chip->rx_buf[1];
|
||||
|
||||
*data = chip->rx_buf[1];
|
||||
return status;
|
||||
}
|
||||
|
||||
|
|
@ -125,9 +121,7 @@ static int max6902_get_datetime(struct device *dev, struct rtc_time *dt)
|
|||
|
||||
/* do the i/o */
|
||||
status = spi_sync(spi, &message);
|
||||
if (status == 0)
|
||||
status = message.status;
|
||||
else
|
||||
if (status)
|
||||
return status;
|
||||
|
||||
/* The chip sends data in this order:
|
||||
|
|
|
|||
|
|
@ -472,11 +472,11 @@ dcssblk_add_store(struct device *dev, struct device_attribute *attr, const char
|
|||
if (rc)
|
||||
goto unregister_dev;
|
||||
|
||||
add_disk(dev_info->gd);
|
||||
|
||||
blk_queue_make_request(dev_info->dcssblk_queue, dcssblk_make_request);
|
||||
blk_queue_hardsect_size(dev_info->dcssblk_queue, 4096);
|
||||
|
||||
add_disk(dev_info->gd);
|
||||
|
||||
switch (dev_info->segment_type) {
|
||||
case SEG_TYPE_SR:
|
||||
case SEG_TYPE_ER:
|
||||
|
|
|
|||
|
|
@ -451,6 +451,7 @@ static int reprobe_subchannel(struct subchannel_id schid, void *data)
|
|||
break;
|
||||
case -ENXIO:
|
||||
case -ENOMEM:
|
||||
case -EIO:
|
||||
/* These should abort looping */
|
||||
break;
|
||||
default:
|
||||
|
|
|
|||
Some files were not shown because too many files have changed in this diff Show more
Loading…
Reference in a new issue