From 17cc4c9e6cb4d7e4552743257fabff8d7de6de2c Mon Sep 17 00:00:00 2001 From: Mike Tipton Date: Wed, 11 Dec 2019 22:27:07 -0800 Subject: [PATCH] clk: qcom: Fix orphaned sleep clocks for Lahaina Use correct name for sleep_clk across Lahaina camcc, dispcc, and videocc to prevent sleep_clk-derived clocks from being orphaned. Change-Id: Ia6cfbc8d89d8c51fd63e5708fe87ba4bc0c5ba60 Signed-off-by: Mike Tipton --- drivers/clk/qcom/camcc-lahaina.c | 8 ++++---- drivers/clk/qcom/dispcc-lahaina.c | 8 ++++---- drivers/clk/qcom/videocc-lahaina.c | 8 ++++---- 3 files changed, 12 insertions(+), 12 deletions(-) diff --git a/drivers/clk/qcom/camcc-lahaina.c b/drivers/clk/qcom/camcc-lahaina.c index f09ad2026e21..af979032a7b7 100644 --- a/drivers/clk/qcom/camcc-lahaina.c +++ b/drivers/clk/qcom/camcc-lahaina.c @@ -39,8 +39,8 @@ enum { P_CAM_CC_PLL4_OUT_EVEN, P_CAM_CC_PLL5_OUT_EVEN, P_CAM_CC_PLL6_OUT_EVEN, - P_CHIP_SLEEP_CLK, P_CORE_BI_PLL_TEST_SE, + P_SLEEP_CLK, }; static struct pll_vco lucid_5lpe_vco[] = { @@ -563,12 +563,12 @@ static const struct clk_parent_data cam_cc_parent_data_5[] = { }; static const struct parent_map cam_cc_parent_map_6[] = { - { P_CHIP_SLEEP_CLK, 0 }, + { P_SLEEP_CLK, 0 }, { P_CORE_BI_PLL_TEST_SE, 7 }, }; static const struct clk_parent_data cam_cc_parent_data_6[] = { - { .fw_name = "chip_sleep_clk", .name = "chip_sleep_clk" }, + { .fw_name = "sleep_clk", .name = "sleep_clk" }, { .fw_name = "core_bi_pll_test_se", .name = "core_bi_pll_test_se" }, }; @@ -1410,7 +1410,7 @@ static struct clk_rcg2 cam_cc_sbi_csid_clk_src = { }; static const struct freq_tbl ftbl_cam_cc_sleep_clk_src[] = { - F(32000, P_CHIP_SLEEP_CLK, 1, 0, 0), + F(32000, P_SLEEP_CLK, 1, 0, 0), { } }; diff --git a/drivers/clk/qcom/dispcc-lahaina.c b/drivers/clk/qcom/dispcc-lahaina.c index 735e2830f594..41c03d5b7628 100644 --- a/drivers/clk/qcom/dispcc-lahaina.c +++ b/drivers/clk/qcom/dispcc-lahaina.c @@ -30,7 +30,6 @@ static DEFINE_VDD_REGULATORS(vdd_mm, VDD_NUM, 1, vdd_corner); enum { P_BI_TCXO, - P_CHIP_SLEEP_CLK, P_CORE_BI_PLL_TEST_SE, P_DISP_CC_PLL0_OUT_MAIN, P_DISP_CC_PLL1_OUT_EVEN, @@ -47,6 +46,7 @@ enum { P_DSI1_PHY_PLL_OUT_DSICLK, P_EDP_PHY_PLL_LINK_CLK, P_EDP_PHY_PLL_VCO_DIV_CLK, + P_SLEEP_CLK, }; static struct pll_vco lucid_5lpe_vco[] = { @@ -251,12 +251,12 @@ static const struct clk_parent_data disp_cc_parent_data_6[] = { }; static const struct parent_map disp_cc_parent_map_7[] = { - { P_CHIP_SLEEP_CLK, 0 }, + { P_SLEEP_CLK, 0 }, { P_CORE_BI_PLL_TEST_SE, 7 }, }; static const struct clk_parent_data disp_cc_parent_data_7[] = { - { .fw_name = "chip_sleep_clk", .name = "chip_sleep_clk" }, + { .fw_name = "sleep_clk", .name = "sleep_clk" }, { .fw_name = "core_bi_pll_test_se", .name = "core_bi_pll_test_se" }, }; @@ -755,7 +755,7 @@ static struct clk_rcg2 disp_cc_mdss_vsync_clk_src = { }; static const struct freq_tbl ftbl_disp_cc_sleep_clk_src[] = { - F(32000, P_CHIP_SLEEP_CLK, 1, 0, 0), + F(32000, P_SLEEP_CLK, 1, 0, 0), { } }; diff --git a/drivers/clk/qcom/videocc-lahaina.c b/drivers/clk/qcom/videocc-lahaina.c index 7de9e74b50d3..eab153a3c87d 100644 --- a/drivers/clk/qcom/videocc-lahaina.c +++ b/drivers/clk/qcom/videocc-lahaina.c @@ -29,8 +29,8 @@ static DEFINE_VDD_REGULATORS(vdd_mx, VDD_NUM, 1, vdd_corner); enum { P_BI_TCXO, - P_CHIP_SLEEP_CLK, P_CORE_BI_PLL_TEST_SE, + P_SLEEP_CLK, P_VIDEO_PLL0_OUT_MAIN, P_VIDEO_PLL1_OUT_MAIN, }; @@ -152,12 +152,12 @@ static const struct clk_parent_data video_cc_parent_data_2[] = { }; static const struct parent_map video_cc_parent_map_3[] = { - { P_CHIP_SLEEP_CLK, 0 }, + { P_SLEEP_CLK, 0 }, { P_CORE_BI_PLL_TEST_SE, 7 }, }; static const struct clk_parent_data video_cc_parent_data_3[] = { - { .fw_name = "chip_sleep_clk", .name = "chip_sleep_clk" }, + { .fw_name = "sleep_clk", .name = "sleep_clk" }, { .fw_name = "core_bi_pll_test_se", .name = "core_bi_pll_test_se" }, }; @@ -250,7 +250,7 @@ static struct clk_rcg2 video_cc_mvs1_clk_src = { }; static const struct freq_tbl ftbl_video_cc_sleep_clk_src[] = { - F(32000, P_CHIP_SLEEP_CLK, 1, 0, 0), + F(32000, P_SLEEP_CLK, 1, 0, 0), { } };