mirror of
https://github.com/BobTheBlinker/android_kernel_motorola_sm6375.git
synced 2026-10-14 08:36:12 -04:00
mt76x0: merge mt76x0_dev in mt76x02_dev
Merge mt76x0_dev data structure in mt76x02_dev one and remove duplicated code. Remove unused definition in mt76x0.h. Moreover merge mt76x0_caldata and mt76x02_rx_freq_cal data structures. This is a preliminary patch for rxwi unification. Signed-off-by: Lorenzo Bianconi <lorenzo.bianconi@redhat.com> Signed-off-by: Felix Fietkau <nbd@nbd.name>
This commit is contained in:
Lorenzo Bianconi
Felix Fietkau
parent
e40803f2af
commit
b2d871c049
16 changed files with 157 additions and 210 deletions
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@ -21,7 +21,7 @@
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static int
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mt76x0_ampdu_stat_read(struct seq_file *file, void *data)
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{
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struct mt76x0_dev *dev = file->private;
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struct mt76x02_dev *dev = file->private;
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int i, j;
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#define stat_printf(grp, off, name) \
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@ -75,7 +75,7 @@ static const struct file_operations fops_ampdu_stat = {
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.release = single_release,
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};
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void mt76x0_init_debugfs(struct mt76x0_dev *dev)
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void mt76x0_init_debugfs(struct mt76x02_dev *dev)
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{
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struct dentry *dir;
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@ -25,7 +25,7 @@
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#define MT_MAP_READS DIV_ROUND_UP(MT_EFUSE_USAGE_MAP_SIZE, 16)
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static int
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mt76x0_efuse_physical_size_check(struct mt76x0_dev *dev)
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mt76x0_efuse_physical_size_check(struct mt76x02_dev *dev)
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{
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u8 data[MT_MAP_READS * 16];
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int ret, i;
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@ -53,7 +53,7 @@ mt76x0_efuse_physical_size_check(struct mt76x0_dev *dev)
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return 0;
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}
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static void mt76x0_set_chip_cap(struct mt76x0_dev *dev)
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static void mt76x0_set_chip_cap(struct mt76x02_dev *dev)
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{
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u16 nic_conf0 = mt76x02_eeprom_get(&dev->mt76, MT_EE_NIC_CONF_0);
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u16 nic_conf1 = mt76x02_eeprom_get(&dev->mt76, MT_EE_NIC_CONF_1);
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@ -82,20 +82,20 @@ static void mt76x0_set_chip_cap(struct mt76x0_dev *dev)
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dev_err(dev->mt76.dev, "invalid tx-rx stream\n");
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}
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static void mt76x0_set_temp_offset(struct mt76x0_dev *dev)
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static void mt76x0_set_temp_offset(struct mt76x02_dev *dev)
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{
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u8 val;
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val = mt76x02_eeprom_get(&dev->mt76, MT_EE_2G_TARGET_POWER) >> 8;
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if (mt76x02_field_valid(val))
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dev->caldata.temp_offset = mt76x02_sign_extend(val, 8);
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dev->cal.rx.temp_offset = mt76x02_sign_extend(val, 8);
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else
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dev->caldata.temp_offset = -10;
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dev->cal.rx.temp_offset = -10;
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}
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static void mt76x0_set_freq_offset(struct mt76x0_dev *dev)
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static void mt76x0_set_freq_offset(struct mt76x02_dev *dev)
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{
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struct mt76x0_caldata *caldata = &dev->caldata;
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struct mt76x02_rx_freq_cal *caldata = &dev->cal.rx;
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u8 val;
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val = mt76x02_eeprom_get(&dev->mt76, MT_EE_FREQ_OFFSET);
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@ -110,10 +110,10 @@ static void mt76x0_set_freq_offset(struct mt76x0_dev *dev)
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caldata->freq_offset -= mt76x02_sign_extend(val, 8);
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}
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void mt76x0_read_rx_gain(struct mt76x0_dev *dev)
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void mt76x0_read_rx_gain(struct mt76x02_dev *dev)
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{
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struct ieee80211_channel *chan = dev->mt76.chandef.chan;
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struct mt76x0_caldata *caldata = &dev->caldata;
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struct mt76x02_rx_freq_cal *caldata = &dev->cal.rx;
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s8 val, lna_5g[3], lna_2g;
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u16 rssi_offset;
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int i;
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@ -157,7 +157,7 @@ static s8 mt76x0_get_delta(struct mt76_dev *dev)
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return mt76x02_rate_power_val(val);
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}
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void mt76x0_get_tx_power_per_rate(struct mt76x0_dev *dev)
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void mt76x0_get_tx_power_per_rate(struct mt76x02_dev *dev)
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{
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struct ieee80211_channel *chan = dev->mt76.chandef.chan;
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bool is_2ghz = chan->band == NL80211_BAND_2GHZ;
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@ -216,7 +216,7 @@ void mt76x0_get_tx_power_per_rate(struct mt76x0_dev *dev)
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mt76x02_add_rate_power_offset(t, delta);
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}
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void mt76x0_get_power_info(struct mt76x0_dev *dev, u8 *info)
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void mt76x0_get_power_info(struct mt76x02_dev *dev, u8 *info)
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{
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struct mt76x0_chan_map {
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u8 chan;
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@ -277,7 +277,7 @@ void mt76x0_get_power_info(struct mt76x0_dev *dev, u8 *info)
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info[1] = 5;
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}
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static int mt76x0_check_eeprom(struct mt76x0_dev *dev)
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static int mt76x0_check_eeprom(struct mt76x02_dev *dev)
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{
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u16 val;
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@ -297,7 +297,7 @@ static int mt76x0_check_eeprom(struct mt76x0_dev *dev)
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}
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}
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static int mt76x0_load_eeprom(struct mt76x0_dev *dev)
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static int mt76x0_load_eeprom(struct mt76x02_dev *dev)
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{
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int found;
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@ -316,7 +316,7 @@ static int mt76x0_load_eeprom(struct mt76x0_dev *dev)
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MT76X0_EEPROM_SIZE, MT_EE_READ);
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}
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int mt76x0_eeprom_init(struct mt76x0_dev *dev)
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int mt76x0_eeprom_init(struct mt76x02_dev *dev)
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{
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u8 version, fae;
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u16 data;
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@ -18,23 +18,15 @@
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#include "../mt76x02_eeprom.h"
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struct mt76x0_dev;
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struct mt76x02_dev;
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#define MT76X0U_EE_MAX_VER 0x0c
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#define MT76X0_EEPROM_SIZE 512
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struct mt76x0_caldata {
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s8 rssi_offset[2];
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s8 lna_gain;
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s16 temp_offset;
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u8 freq_offset;
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};
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int mt76x0_eeprom_init(struct mt76x0_dev *dev);
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void mt76x0_read_rx_gain(struct mt76x0_dev *dev);
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void mt76x0_get_tx_power_per_rate(struct mt76x0_dev *dev);
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void mt76x0_get_power_info(struct mt76x0_dev *dev, u8 *info);
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int mt76x0_eeprom_init(struct mt76x02_dev *dev);
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void mt76x0_read_rx_gain(struct mt76x02_dev *dev);
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void mt76x0_get_tx_power_per_rate(struct mt76x02_dev *dev);
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void mt76x0_get_power_info(struct mt76x02_dev *dev, u8 *info);
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static inline s8 s6_to_s8(u32 val)
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{
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@ -42,7 +42,7 @@ static void mt76x0_vht_cap_mask(struct ieee80211_supported_band *sband)
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}
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static void
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mt76x0_set_wlan_state(struct mt76x0_dev *dev, u32 val, bool enable)
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mt76x0_set_wlan_state(struct mt76x02_dev *dev, u32 val, bool enable)
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{
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u32 mask = MT_CMB_CTRL_XTAL_RDY | MT_CMB_CTRL_PLL_LD;
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@ -69,7 +69,7 @@ mt76x0_set_wlan_state(struct mt76x0_dev *dev, u32 val, bool enable)
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dev_err(dev->mt76.dev, "PLL and XTAL check failed\n");
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}
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void mt76x0_chip_onoff(struct mt76x0_dev *dev, bool enable, bool reset)
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void mt76x0_chip_onoff(struct mt76x02_dev *dev, bool enable, bool reset)
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{
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u32 val;
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@ -97,7 +97,7 @@ void mt76x0_chip_onoff(struct mt76x0_dev *dev, bool enable, bool reset)
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}
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EXPORT_SYMBOL_GPL(mt76x0_chip_onoff);
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static void mt76x0_reset_csr_bbp(struct mt76x0_dev *dev)
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static void mt76x0_reset_csr_bbp(struct mt76x02_dev *dev)
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{
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mt76_wr(dev, MT_MAC_SYS_CTRL,
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MT_MAC_SYS_CTRL_RESET_CSR |
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@ -112,7 +112,7 @@ static void mt76x0_reset_csr_bbp(struct mt76x0_dev *dev)
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mt76_wr_rp(dev, MT_MCU_MEMMAP_WLAN, \
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tab, ARRAY_SIZE(tab))
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static int mt76x0_init_bbp(struct mt76x0_dev *dev)
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static int mt76x0_init_bbp(struct mt76x02_dev *dev)
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{
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int ret, i;
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@ -135,7 +135,7 @@ static int mt76x0_init_bbp(struct mt76x0_dev *dev)
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return 0;
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}
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static void mt76x0_init_mac_registers(struct mt76x0_dev *dev)
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static void mt76x0_init_mac_registers(struct mt76x02_dev *dev)
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{
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u32 reg;
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@ -170,7 +170,7 @@ static void mt76x0_init_mac_registers(struct mt76x0_dev *dev)
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mt76_wr(dev, MT_WMM_CTRL, reg);
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}
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static int mt76x0_init_wcid_mem(struct mt76x0_dev *dev)
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static int mt76x0_init_wcid_mem(struct mt76x02_dev *dev)
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{
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u32 *vals;
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int i;
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@ -189,14 +189,14 @@ static int mt76x0_init_wcid_mem(struct mt76x0_dev *dev)
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return 0;
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}
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static void mt76x0_init_key_mem(struct mt76x0_dev *dev)
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static void mt76x0_init_key_mem(struct mt76x02_dev *dev)
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{
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u32 vals[4] = {};
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mt76_wr_copy(dev, MT_SKEY_MODE_BASE_0, vals, ARRAY_SIZE(vals));
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}
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static int mt76x0_init_wcid_attr_mem(struct mt76x0_dev *dev)
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static int mt76x0_init_wcid_attr_mem(struct mt76x02_dev *dev)
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{
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u32 *vals;
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int i;
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@ -213,7 +213,7 @@ static int mt76x0_init_wcid_attr_mem(struct mt76x0_dev *dev)
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return 0;
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}
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static void mt76x0_reset_counters(struct mt76x0_dev *dev)
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static void mt76x0_reset_counters(struct mt76x02_dev *dev)
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{
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mt76_rr(dev, MT_RX_STAT_0);
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mt76_rr(dev, MT_RX_STAT_1);
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@ -223,7 +223,7 @@ static void mt76x0_reset_counters(struct mt76x0_dev *dev)
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mt76_rr(dev, MT_TX_STA_2);
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}
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int mt76x0_mac_start(struct mt76x0_dev *dev)
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int mt76x0_mac_start(struct mt76x02_dev *dev)
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{
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mt76_wr(dev, MT_MAC_SYS_CTRL, MT_MAC_SYS_CTRL_ENABLE_TX);
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@ -238,7 +238,7 @@ int mt76x0_mac_start(struct mt76x0_dev *dev)
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}
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EXPORT_SYMBOL_GPL(mt76x0_mac_start);
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void mt76x0_mac_stop(struct mt76x0_dev *dev)
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void mt76x0_mac_stop(struct mt76x02_dev *dev)
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{
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int i = 200, ok = 0;
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@ -271,7 +271,7 @@ void mt76x0_mac_stop(struct mt76x0_dev *dev)
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}
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EXPORT_SYMBOL_GPL(mt76x0_mac_stop);
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int mt76x0_init_hardware(struct mt76x0_dev *dev)
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int mt76x0_init_hardware(struct mt76x02_dev *dev)
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{
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int ret;
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@ -325,12 +325,12 @@ int mt76x0_init_hardware(struct mt76x0_dev *dev)
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}
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EXPORT_SYMBOL_GPL(mt76x0_init_hardware);
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struct mt76x0_dev *
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struct mt76x02_dev *
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mt76x0_alloc_device(struct device *pdev,
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const struct mt76_driver_ops *drv_ops,
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const struct ieee80211_ops *ops)
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{
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struct mt76x0_dev *dev;
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struct mt76x02_dev *dev;
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struct mt76_dev *mdev;
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mdev = mt76_alloc_device(sizeof(*dev), ops);
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@ -340,15 +340,15 @@ mt76x0_alloc_device(struct device *pdev,
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mdev->dev = pdev;
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mdev->drv = drv_ops;
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dev = container_of(mdev, struct mt76x0_dev, mt76);
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mutex_init(&dev->reg_atomic_mutex);
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dev = container_of(mdev, struct mt76x02_dev, mt76);
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mutex_init(&dev->phy_mutex);
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atomic_set(&dev->avg_ampdu_len, 1);
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return dev;
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}
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EXPORT_SYMBOL_GPL(mt76x0_alloc_device);
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int mt76x0_register_device(struct mt76x0_dev *dev)
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int mt76x0_register_device(struct mt76x02_dev *dev)
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{
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struct mt76_dev *mdev = &dev->mt76;
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struct ieee80211_hw *hw = mdev->hw;
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@ -18,8 +18,8 @@
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#include "../mt76x02_util.h"
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#include <linux/etherdevice.h>
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void mt76x0_mac_set_protection(struct mt76x0_dev *dev, bool legacy_prot,
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int ht_mode)
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void mt76x0_mac_set_protection(struct mt76x02_dev *dev, bool legacy_prot,
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int ht_mode)
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{
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int mode = ht_mode & IEEE80211_HT_OP_MODE_PROTECTION;
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bool non_gf = !!(ht_mode & IEEE80211_HT_OP_MODE_NON_GF_STA_PRSNT);
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@ -77,7 +77,7 @@ void mt76x0_mac_set_protection(struct mt76x0_dev *dev, bool legacy_prot,
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mt76_wr(dev, MT_CCK_PROT_CFG + i * 4, prot[i]);
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}
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void mt76x0_mac_set_short_preamble(struct mt76x0_dev *dev, bool short_preamb)
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void mt76x0_mac_set_short_preamble(struct mt76x02_dev *dev, bool short_preamb)
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{
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if (short_preamb)
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mt76_set(dev, MT_AUTO_RSP_CFG, MT_AUTO_RSP_PREAMB_SHORT);
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@ -85,7 +85,7 @@ void mt76x0_mac_set_short_preamble(struct mt76x0_dev *dev, bool short_preamb)
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mt76_clear(dev, MT_AUTO_RSP_CFG, MT_AUTO_RSP_PREAMB_SHORT);
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}
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void mt76x0_mac_config_tsf(struct mt76x0_dev *dev, bool enable, int interval)
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void mt76x0_mac_config_tsf(struct mt76x02_dev *dev, bool enable, int interval)
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{
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u32 val = mt76_rr(dev, MT_BEACON_TIME_CFG);
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@ -105,7 +105,7 @@ void mt76x0_mac_config_tsf(struct mt76x0_dev *dev, bool enable, int interval)
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MT_BEACON_TIME_CFG_TBTT_EN;
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}
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static void mt76x0_check_mac_err(struct mt76x0_dev *dev)
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static void mt76x0_check_mac_err(struct mt76x02_dev *dev)
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{
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u32 val = mt76_rr(dev, 0x10f4);
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@ -120,7 +120,7 @@ static void mt76x0_check_mac_err(struct mt76x0_dev *dev)
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}
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void mt76x0_mac_work(struct work_struct *work)
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{
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struct mt76x0_dev *dev = container_of(work, struct mt76x0_dev,
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struct mt76x02_dev *dev = container_of(work, struct mt76x02_dev,
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mac_work.work);
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struct {
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u32 addr_base;
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@ -171,7 +171,7 @@ void mt76x0_mac_work(struct work_struct *work)
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ieee80211_queue_delayed_work(dev->mt76.hw, &dev->mac_work, 10 * HZ);
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}
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void mt76x0_mac_set_ampdu_factor(struct mt76x0_dev *dev)
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void mt76x0_mac_set_ampdu_factor(struct mt76x02_dev *dev)
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{
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struct ieee80211_sta *sta;
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struct mt76_wcid *wcid;
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@ -196,7 +196,7 @@ void mt76x0_mac_set_ampdu_factor(struct mt76x0_dev *dev)
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FIELD_PREP(MT_MAX_LEN_CFG_AMPDU, min_factor));
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}
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u32 mt76x0_mac_process_rx(struct mt76x0_dev *dev, struct sk_buff *skb,
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u32 mt76x0_mac_process_rx(struct mt76x02_dev *dev, struct sk_buff *skb,
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void *rxi)
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{
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struct mt76_rx_status *status = (struct mt76_rx_status *) skb->cb;
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@ -15,6 +15,6 @@
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#ifndef __MT76_MAC_H
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#define __MT76_MAC_H
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u32 mt76x0_mac_process_rx(struct mt76x0_dev *dev, struct sk_buff *skb,
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void *rxi);
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u32 mt76x0_mac_process_rx(struct mt76x02_dev *dev, struct sk_buff *skb,
|
||||
void *rxi);
|
||||
#endif
|
||||
|
|
|
|||
|
|
@ -20,7 +20,7 @@
|
|||
|
||||
int mt76x0_config(struct ieee80211_hw *hw, u32 changed)
|
||||
{
|
||||
struct mt76x0_dev *dev = hw->priv;
|
||||
struct mt76x02_dev *dev = hw->priv;
|
||||
int ret = 0;
|
||||
|
||||
mutex_lock(&dev->mt76.mutex);
|
||||
|
|
@ -54,7 +54,7 @@ int mt76x0_config(struct ieee80211_hw *hw, u32 changed)
|
|||
EXPORT_SYMBOL_GPL(mt76x0_config);
|
||||
|
||||
static void
|
||||
mt76x0_addr_wr(struct mt76x0_dev *dev, const u32 offset, const u8 *addr)
|
||||
mt76x0_addr_wr(struct mt76x02_dev *dev, const u32 offset, const u8 *addr)
|
||||
{
|
||||
mt76_wr(dev, offset, get_unaligned_le32(addr));
|
||||
mt76_wr(dev, offset + 4, addr[4] | addr[5] << 8);
|
||||
|
|
@ -64,7 +64,7 @@ void mt76x0_bss_info_changed(struct ieee80211_hw *hw,
|
|||
struct ieee80211_vif *vif,
|
||||
struct ieee80211_bss_conf *info, u32 changed)
|
||||
{
|
||||
struct mt76x0_dev *dev = hw->priv;
|
||||
struct mt76x02_dev *dev = hw->priv;
|
||||
|
||||
mutex_lock(&dev->mt76.mutex);
|
||||
|
||||
|
|
@ -114,7 +114,7 @@ EXPORT_SYMBOL_GPL(mt76x0_bss_info_changed);
|
|||
void mt76x0_sw_scan(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
|
||||
const u8 *mac_addr)
|
||||
{
|
||||
struct mt76x0_dev *dev = hw->priv;
|
||||
struct mt76x02_dev *dev = hw->priv;
|
||||
|
||||
cancel_delayed_work_sync(&dev->cal_work);
|
||||
mt76x0_agc_save(dev);
|
||||
|
|
@ -125,7 +125,7 @@ EXPORT_SYMBOL_GPL(mt76x0_sw_scan);
|
|||
void mt76x0_sw_scan_complete(struct ieee80211_hw *hw,
|
||||
struct ieee80211_vif *vif)
|
||||
{
|
||||
struct mt76x0_dev *dev = hw->priv;
|
||||
struct mt76x02_dev *dev = hw->priv;
|
||||
|
||||
mt76x0_agc_restore(dev);
|
||||
clear_bit(MT76_SCANNING, &dev->mt76.state);
|
||||
|
|
@ -137,7 +137,7 @@ EXPORT_SYMBOL_GPL(mt76x0_sw_scan_complete);
|
|||
|
||||
int mt76x0_set_rts_threshold(struct ieee80211_hw *hw, u32 value)
|
||||
{
|
||||
struct mt76x0_dev *dev = hw->priv;
|
||||
struct mt76x02_dev *dev = hw->priv;
|
||||
|
||||
mt76_rmw_field(dev, MT_TX_RTS_CFG, MT_TX_RTS_CFG_THRESH, value);
|
||||
|
||||
|
|
|
|||
|
|
@ -17,7 +17,7 @@
|
|||
|
||||
#include "../mt76x02_mcu.h"
|
||||
|
||||
struct mt76x0_dev;
|
||||
struct mt76x02_dev;
|
||||
|
||||
#define MT_MCU_IVB_SIZE 0x40
|
||||
#define MT_MCU_DLM_OFFSET 0x80000
|
||||
|
|
@ -41,9 +41,9 @@ enum mcu_calibrate {
|
|||
MCU_CAL_TX_GROUP_DELAY,
|
||||
};
|
||||
|
||||
int mt76x0e_mcu_init(struct mt76x0_dev *dev);
|
||||
int mt76x0u_mcu_init(struct mt76x0_dev *dev);
|
||||
static inline int mt76x0_firmware_running(struct mt76x0_dev *dev)
|
||||
int mt76x0e_mcu_init(struct mt76x02_dev *dev);
|
||||
int mt76x0u_mcu_init(struct mt76x02_dev *dev);
|
||||
static inline int mt76x0_firmware_running(struct mt76x02_dev *dev)
|
||||
{
|
||||
return mt76_rr(dev, MT_MCU_COM_REG0) == 1;
|
||||
}
|
||||
|
|
|
|||
|
|
@ -28,93 +28,33 @@
|
|||
#include "../mt76.h"
|
||||
#include "../mt76x02_regs.h"
|
||||
#include "../mt76x02_mac.h"
|
||||
#include "../mt76x02_util.h"
|
||||
#include "eeprom.h"
|
||||
|
||||
#define MT_CALIBRATE_INTERVAL (4 * HZ)
|
||||
|
||||
#define MT_FREQ_CAL_INIT_DELAY (30 * HZ)
|
||||
#define MT_FREQ_CAL_CHECK_INTERVAL (10 * HZ)
|
||||
#define MT_FREQ_CAL_ADJ_INTERVAL (HZ / 2)
|
||||
|
||||
#define MT_BBP_REG_VERSION 0x00
|
||||
|
||||
#define MT_USB_AGGR_SIZE_LIMIT 21 /* * 1024B */
|
||||
#define MT_USB_AGGR_TIMEOUT 0x80 /* * 33ns */
|
||||
|
||||
struct mac_stats {
|
||||
u64 rx_stat[6];
|
||||
u64 tx_stat[6];
|
||||
u64 aggr_stat[2];
|
||||
u64 aggr_n[32];
|
||||
u64 zero_len_del[2];
|
||||
};
|
||||
|
||||
struct mt76x0_eeprom_params;
|
||||
|
||||
#define MT_EE_TEMPERATURE_SLOPE 39
|
||||
#define MT_FREQ_OFFSET_INVALID -128
|
||||
|
||||
/* addr req mask */
|
||||
#define MT_VEND_TYPE_EEPROM BIT(31)
|
||||
#define MT_VEND_TYPE_CFG BIT(30)
|
||||
#define MT_VEND_TYPE_MASK (MT_VEND_TYPE_EEPROM | MT_VEND_TYPE_CFG)
|
||||
|
||||
#define MT_VEND_ADDR(type, n) (MT_VEND_TYPE_##type | (n))
|
||||
|
||||
enum mt_bw {
|
||||
MT_BW_20,
|
||||
MT_BW_40,
|
||||
};
|
||||
|
||||
/**
|
||||
* struct mt76x0_dev - adapter structure
|
||||
* @lock: protects @wcid->tx_rate.
|
||||
* @mutex: ensures exclusive access from mac80211 callbacks.
|
||||
* @reg_atomic_mutex: ensures atomicity of indirect register accesses
|
||||
* (accesses to RF and BBP).
|
||||
*/
|
||||
struct mt76x0_dev {
|
||||
struct mt76_dev mt76; /* must be first */
|
||||
|
||||
struct delayed_work cal_work;
|
||||
struct delayed_work mac_work;
|
||||
|
||||
struct mt76x0_caldata caldata;
|
||||
|
||||
struct mutex reg_atomic_mutex;
|
||||
|
||||
atomic_t avg_ampdu_len;
|
||||
|
||||
u8 agc_save;
|
||||
|
||||
bool no_2ghz;
|
||||
|
||||
struct mac_stats stats;
|
||||
};
|
||||
|
||||
static inline bool is_mt7610e(struct mt76x0_dev *dev)
|
||||
static inline bool is_mt7610e(struct mt76x02_dev *dev)
|
||||
{
|
||||
/* TODO */
|
||||
return false;
|
||||
}
|
||||
|
||||
void mt76x0_init_debugfs(struct mt76x0_dev *dev);
|
||||
|
||||
/* Compatibility with mt76 */
|
||||
#define mt76_rmw_field(_dev, _reg, _field, _val) \
|
||||
mt76_rmw(_dev, _reg, _field, FIELD_PREP(_field, _val))
|
||||
void mt76x0_init_debugfs(struct mt76x02_dev *dev);
|
||||
|
||||
/* Init */
|
||||
struct mt76x0_dev *
|
||||
struct mt76x02_dev *
|
||||
mt76x0_alloc_device(struct device *pdev,
|
||||
const struct mt76_driver_ops *drv_ops,
|
||||
const struct ieee80211_ops *ops);
|
||||
int mt76x0_init_hardware(struct mt76x0_dev *dev);
|
||||
int mt76x0_register_device(struct mt76x0_dev *dev);
|
||||
void mt76x0_chip_onoff(struct mt76x0_dev *dev, bool enable, bool reset);
|
||||
int mt76x0_init_hardware(struct mt76x02_dev *dev);
|
||||
int mt76x0_register_device(struct mt76x02_dev *dev);
|
||||
void mt76x0_chip_onoff(struct mt76x02_dev *dev, bool enable, bool reset);
|
||||
|
||||
int mt76x0_mac_start(struct mt76x0_dev *dev);
|
||||
void mt76x0_mac_stop(struct mt76x0_dev *dev);
|
||||
int mt76x0_mac_start(struct mt76x02_dev *dev);
|
||||
void mt76x0_mac_stop(struct mt76x02_dev *dev);
|
||||
|
||||
int mt76x0_config(struct ieee80211_hw *hw, u32 changed);
|
||||
void mt76x0_bss_info_changed(struct ieee80211_hw *hw,
|
||||
|
|
@ -127,23 +67,23 @@ void mt76x0_sw_scan_complete(struct ieee80211_hw *hw,
|
|||
int mt76x0_set_rts_threshold(struct ieee80211_hw *hw, u32 value);
|
||||
|
||||
/* PHY */
|
||||
void mt76x0_phy_init(struct mt76x0_dev *dev);
|
||||
int mt76x0_wait_bbp_ready(struct mt76x0_dev *dev);
|
||||
void mt76x0_agc_save(struct mt76x0_dev *dev);
|
||||
void mt76x0_agc_restore(struct mt76x0_dev *dev);
|
||||
int mt76x0_phy_set_channel(struct mt76x0_dev *dev,
|
||||
void mt76x0_phy_init(struct mt76x02_dev *dev);
|
||||
int mt76x0_wait_bbp_ready(struct mt76x02_dev *dev);
|
||||
void mt76x0_agc_save(struct mt76x02_dev *dev);
|
||||
void mt76x0_agc_restore(struct mt76x02_dev *dev);
|
||||
int mt76x0_phy_set_channel(struct mt76x02_dev *dev,
|
||||
struct cfg80211_chan_def *chandef);
|
||||
void mt76x0_phy_recalibrate_after_assoc(struct mt76x0_dev *dev);
|
||||
int mt76x0_phy_get_rssi(struct mt76x0_dev *dev, struct mt76x02_rxwi *rxwi);
|
||||
void mt76x0_phy_set_txpower(struct mt76x0_dev *dev);
|
||||
void mt76x0_phy_recalibrate_after_assoc(struct mt76x02_dev *dev);
|
||||
int mt76x0_phy_get_rssi(struct mt76x02_dev *dev, struct mt76x02_rxwi *rxwi);
|
||||
void mt76x0_phy_set_txpower(struct mt76x02_dev *dev);
|
||||
|
||||
/* MAC */
|
||||
void mt76x0_mac_work(struct work_struct *work);
|
||||
void mt76x0_mac_set_protection(struct mt76x0_dev *dev, bool legacy_prot,
|
||||
void mt76x0_mac_set_protection(struct mt76x02_dev *dev, bool legacy_prot,
|
||||
int ht_mode);
|
||||
void mt76x0_mac_set_short_preamble(struct mt76x0_dev *dev, bool short_preamb);
|
||||
void mt76x0_mac_config_tsf(struct mt76x0_dev *dev, bool enable, int interval);
|
||||
void mt76x0_mac_set_ampdu_factor(struct mt76x0_dev *dev);
|
||||
void mt76x0_mac_set_short_preamble(struct mt76x02_dev *dev, bool short_preamb);
|
||||
void mt76x0_mac_config_tsf(struct mt76x02_dev *dev, bool enable, int interval);
|
||||
void mt76x0_mac_set_ampdu_factor(struct mt76x02_dev *dev);
|
||||
|
||||
/* TX */
|
||||
void mt76x0_tx(struct ieee80211_hw *hw, struct ieee80211_tx_control *control,
|
||||
|
|
|
|||
|
|
@ -25,7 +25,7 @@
|
|||
|
||||
static int mt76x0e_start(struct ieee80211_hw *hw)
|
||||
{
|
||||
struct mt76x0_dev *dev = hw->priv;
|
||||
struct mt76x02_dev *dev = hw->priv;
|
||||
|
||||
mutex_lock(&dev->mt76.mutex);
|
||||
|
||||
|
|
@ -41,7 +41,7 @@ static int mt76x0e_start(struct ieee80211_hw *hw)
|
|||
return 0;
|
||||
}
|
||||
|
||||
static void mt76x0e_stop_hw(struct mt76x0_dev *dev)
|
||||
static void mt76x0e_stop_hw(struct mt76x02_dev *dev)
|
||||
{
|
||||
cancel_delayed_work_sync(&dev->cal_work);
|
||||
cancel_delayed_work_sync(&dev->mac_work);
|
||||
|
|
@ -61,7 +61,7 @@ static void mt76x0e_stop_hw(struct mt76x0_dev *dev)
|
|||
|
||||
static void mt76x0e_stop(struct ieee80211_hw *hw)
|
||||
{
|
||||
struct mt76x0_dev *dev = hw->priv;
|
||||
struct mt76x02_dev *dev = hw->priv;
|
||||
|
||||
mutex_lock(&dev->mt76.mutex);
|
||||
clear_bit(MT76_STATE_RUNNING, &dev->mt76.state);
|
||||
|
|
@ -79,7 +79,7 @@ static const struct ieee80211_ops mt76x0e_ops = {
|
|||
.configure_filter = mt76x02_configure_filter,
|
||||
};
|
||||
|
||||
static int mt76x0e_register_device(struct mt76x0_dev *dev)
|
||||
static int mt76x0e_register_device(struct mt76x02_dev *dev)
|
||||
{
|
||||
int err;
|
||||
|
||||
|
|
@ -126,8 +126,8 @@ static int mt76x0e_register_device(struct mt76x0_dev *dev)
|
|||
static int
|
||||
mt76x0e_probe(struct pci_dev *pdev, const struct pci_device_id *id)
|
||||
{
|
||||
struct mt76x0_dev *dev;
|
||||
int ret = -ENODEV;
|
||||
struct mt76x02_dev *dev;
|
||||
int ret;
|
||||
|
||||
ret = pcim_enable_device(pdev);
|
||||
if (ret)
|
||||
|
|
@ -163,7 +163,7 @@ error:
|
|||
return ret;
|
||||
}
|
||||
|
||||
static void mt76x0e_cleanup(struct mt76x0_dev *dev)
|
||||
static void mt76x0e_cleanup(struct mt76x02_dev *dev)
|
||||
{
|
||||
clear_bit(MT76_STATE_INITIALIZED, &dev->mt76.state);
|
||||
mt76x0_chip_onoff(dev, false, false);
|
||||
|
|
@ -176,7 +176,7 @@ static void
|
|||
mt76x0e_remove(struct pci_dev *pdev)
|
||||
{
|
||||
struct mt76_dev *mdev = pci_get_drvdata(pdev);
|
||||
struct mt76x0_dev *dev = container_of(mdev, struct mt76x0_dev, mt76);
|
||||
struct mt76x02_dev *dev = container_of(mdev, struct mt76x02_dev, mt76);
|
||||
|
||||
mt76_unregister_device(mdev);
|
||||
mt76x0e_cleanup(dev);
|
||||
|
|
|
|||
|
|
@ -24,7 +24,7 @@
|
|||
|
||||
#define MT_MCU_IVB_ADDR (MT_MCU_ILM_ADDR + 0x54000 - MT_MCU_IVB_SIZE)
|
||||
|
||||
static int mt76x0e_load_firmware(struct mt76x0_dev *dev)
|
||||
static int mt76x0e_load_firmware(struct mt76x02_dev *dev)
|
||||
{
|
||||
bool is_combo_chip = mt76_chip(&dev->mt76) != 0x7610;
|
||||
u32 val, ilm_len, dlm_len, offset = 0;
|
||||
|
|
@ -126,7 +126,7 @@ out:
|
|||
return err;
|
||||
}
|
||||
|
||||
int mt76x0e_mcu_init(struct mt76x0_dev *dev)
|
||||
int mt76x0e_mcu_init(struct mt76x02_dev *dev)
|
||||
{
|
||||
static const struct mt76_mcu_ops mt76x0e_mcu_ops = {
|
||||
.mcu_msg_alloc = mt76x02_mcu_msg_alloc,
|
||||
|
|
|
|||
|
|
@ -26,7 +26,7 @@
|
|||
#include <linux/etherdevice.h>
|
||||
|
||||
static int
|
||||
mt76x0_rf_csr_wr(struct mt76x0_dev *dev, u32 offset, u8 value)
|
||||
mt76x0_rf_csr_wr(struct mt76x02_dev *dev, u32 offset, u8 value)
|
||||
{
|
||||
int ret = 0;
|
||||
u8 bank, reg;
|
||||
|
|
@ -40,7 +40,7 @@ mt76x0_rf_csr_wr(struct mt76x0_dev *dev, u32 offset, u8 value)
|
|||
if (WARN_ON_ONCE(reg > 64) || WARN_ON_ONCE(bank) > 8)
|
||||
return -EINVAL;
|
||||
|
||||
mutex_lock(&dev->reg_atomic_mutex);
|
||||
mutex_lock(&dev->phy_mutex);
|
||||
|
||||
if (!mt76_poll(dev, MT_RF_CSR_CFG, MT_RF_CSR_CFG_KICK, 0, 100)) {
|
||||
ret = -ETIMEDOUT;
|
||||
|
|
@ -55,7 +55,7 @@ mt76x0_rf_csr_wr(struct mt76x0_dev *dev, u32 offset, u8 value)
|
|||
MT_RF_CSR_CFG_KICK);
|
||||
trace_mt76x0_rf_write(&dev->mt76, bank, offset, value);
|
||||
out:
|
||||
mutex_unlock(&dev->reg_atomic_mutex);
|
||||
mutex_unlock(&dev->phy_mutex);
|
||||
|
||||
if (ret < 0)
|
||||
dev_err(dev->mt76.dev, "Error: RF write %d:%d failed:%d!!\n",
|
||||
|
|
@ -64,8 +64,7 @@ out:
|
|||
return ret;
|
||||
}
|
||||
|
||||
static int
|
||||
mt76x0_rf_csr_rr(struct mt76x0_dev *dev, u32 offset)
|
||||
static int mt76x0_rf_csr_rr(struct mt76x02_dev *dev, u32 offset)
|
||||
{
|
||||
int ret = -ETIMEDOUT;
|
||||
u32 val;
|
||||
|
|
@ -80,7 +79,7 @@ mt76x0_rf_csr_rr(struct mt76x0_dev *dev, u32 offset)
|
|||
if (WARN_ON_ONCE(reg > 64) || WARN_ON_ONCE(bank) > 8)
|
||||
return -EINVAL;
|
||||
|
||||
mutex_lock(&dev->reg_atomic_mutex);
|
||||
mutex_lock(&dev->phy_mutex);
|
||||
|
||||
if (!mt76_poll(dev, MT_RF_CSR_CFG, MT_RF_CSR_CFG_KICK, 0, 100))
|
||||
goto out;
|
||||
|
|
@ -100,7 +99,7 @@ mt76x0_rf_csr_rr(struct mt76x0_dev *dev, u32 offset)
|
|||
trace_mt76x0_rf_read(&dev->mt76, bank, offset, ret);
|
||||
}
|
||||
out:
|
||||
mutex_unlock(&dev->reg_atomic_mutex);
|
||||
mutex_unlock(&dev->phy_mutex);
|
||||
|
||||
if (ret < 0)
|
||||
dev_err(dev->mt76.dev, "Error: RF read %d:%d failed:%d!!\n",
|
||||
|
|
@ -110,7 +109,7 @@ out:
|
|||
}
|
||||
|
||||
static int
|
||||
rf_wr(struct mt76x0_dev *dev, u32 offset, u8 val)
|
||||
rf_wr(struct mt76x02_dev *dev, u32 offset, u8 val)
|
||||
{
|
||||
if (test_bit(MT76_STATE_MCU_RUNNING, &dev->mt76.state)) {
|
||||
struct mt76_reg_pair pair = {
|
||||
|
|
@ -126,7 +125,7 @@ rf_wr(struct mt76x0_dev *dev, u32 offset, u8 val)
|
|||
}
|
||||
|
||||
static int
|
||||
rf_rr(struct mt76x0_dev *dev, u32 offset)
|
||||
rf_rr(struct mt76x02_dev *dev, u32 offset)
|
||||
{
|
||||
int ret;
|
||||
u32 val;
|
||||
|
|
@ -147,7 +146,7 @@ rf_rr(struct mt76x0_dev *dev, u32 offset)
|
|||
}
|
||||
|
||||
static int
|
||||
rf_rmw(struct mt76x0_dev *dev, u32 offset, u8 mask, u8 val)
|
||||
rf_rmw(struct mt76x02_dev *dev, u32 offset, u8 mask, u8 val)
|
||||
{
|
||||
int ret;
|
||||
|
||||
|
|
@ -163,14 +162,14 @@ rf_rmw(struct mt76x0_dev *dev, u32 offset, u8 mask, u8 val)
|
|||
}
|
||||
|
||||
static int
|
||||
rf_set(struct mt76x0_dev *dev, u32 offset, u8 val)
|
||||
rf_set(struct mt76x02_dev *dev, u32 offset, u8 val)
|
||||
{
|
||||
return rf_rmw(dev, offset, 0, val);
|
||||
}
|
||||
|
||||
#if 0
|
||||
static int
|
||||
rf_clear(struct mt76x0_dev *dev, u32 offset, u8 mask)
|
||||
rf_clear(struct mt76x02_dev *dev, u32 offset, u8 mask)
|
||||
{
|
||||
return rf_rmw(dev, offset, mask, 0);
|
||||
}
|
||||
|
|
@ -180,7 +179,7 @@ rf_clear(struct mt76x0_dev *dev, u32 offset, u8 mask)
|
|||
mt76_wr_rp(dev, MT_MCU_MEMMAP_RF, \
|
||||
tab, ARRAY_SIZE(tab))
|
||||
|
||||
int mt76x0_wait_bbp_ready(struct mt76x0_dev *dev)
|
||||
int mt76x0_wait_bbp_ready(struct mt76x02_dev *dev)
|
||||
{
|
||||
int i = 20;
|
||||
u32 val;
|
||||
|
|
@ -201,7 +200,7 @@ int mt76x0_wait_bbp_ready(struct mt76x0_dev *dev)
|
|||
}
|
||||
|
||||
static void
|
||||
mt76x0_bbp_set_ctrlch(struct mt76x0_dev *dev, enum nl80211_chan_width width,
|
||||
mt76x0_bbp_set_ctrlch(struct mt76x02_dev *dev, enum nl80211_chan_width width,
|
||||
u8 ctrl)
|
||||
{
|
||||
int core_val, agc_val;
|
||||
|
|
@ -227,14 +226,14 @@ mt76x0_bbp_set_ctrlch(struct mt76x0_dev *dev, enum nl80211_chan_width width,
|
|||
mt76_rmw_field(dev, MT_BBP(TXBE, 0), MT_BBP_TXBE_R0_CTRL_CHAN, ctrl);
|
||||
}
|
||||
|
||||
int mt76x0_phy_get_rssi(struct mt76x0_dev *dev, struct mt76x02_rxwi *rxwi)
|
||||
int mt76x0_phy_get_rssi(struct mt76x02_dev *dev, struct mt76x02_rxwi *rxwi)
|
||||
{
|
||||
struct mt76x0_caldata *caldata = &dev->caldata;
|
||||
struct mt76x02_rx_freq_cal *caldata = &dev->cal.rx;
|
||||
|
||||
return rxwi->rssi[0] + caldata->rssi_offset[0] - caldata->lna_gain;
|
||||
}
|
||||
|
||||
static void mt76x0_vco_cal(struct mt76x0_dev *dev, u8 channel)
|
||||
static void mt76x0_vco_cal(struct mt76x02_dev *dev, u8 channel)
|
||||
{
|
||||
u8 val;
|
||||
|
||||
|
|
@ -291,14 +290,14 @@ static void mt76x0_vco_cal(struct mt76x0_dev *dev, u8 channel)
|
|||
}
|
||||
|
||||
static void
|
||||
mt76x0_mac_set_ctrlch(struct mt76x0_dev *dev, bool primary_upper)
|
||||
mt76x0_mac_set_ctrlch(struct mt76x02_dev *dev, bool primary_upper)
|
||||
{
|
||||
mt76_rmw_field(dev, MT_TX_BAND_CFG, MT_TX_BAND_CFG_UPPER_40M,
|
||||
primary_upper);
|
||||
}
|
||||
|
||||
static void
|
||||
mt76x0_phy_set_band(struct mt76x0_dev *dev, enum nl80211_band band)
|
||||
mt76x0_phy_set_band(struct mt76x02_dev *dev, enum nl80211_band band)
|
||||
{
|
||||
switch (band) {
|
||||
case NL80211_BAND_2GHZ:
|
||||
|
|
@ -331,7 +330,7 @@ mt76x0_phy_set_band(struct mt76x0_dev *dev, enum nl80211_band band)
|
|||
}
|
||||
|
||||
static void
|
||||
mt76x0_phy_set_chan_rf_params(struct mt76x0_dev *dev, u8 channel, u16 rf_bw_band)
|
||||
mt76x0_phy_set_chan_rf_params(struct mt76x02_dev *dev, u8 channel, u16 rf_bw_band)
|
||||
{
|
||||
u16 rf_band = rf_bw_band & 0xff00;
|
||||
u16 rf_bw = rf_bw_band & 0x00ff;
|
||||
|
|
@ -522,7 +521,7 @@ mt76x0_phy_set_chan_rf_params(struct mt76x0_dev *dev, u8 channel, u16 rf_bw_band
|
|||
}
|
||||
|
||||
static void
|
||||
mt76x0_phy_set_chan_bbp_params(struct mt76x0_dev *dev, u8 channel, u16 rf_bw_band)
|
||||
mt76x0_phy_set_chan_bbp_params(struct mt76x02_dev *dev, u8 channel, u16 rf_bw_band)
|
||||
{
|
||||
int i;
|
||||
|
||||
|
|
@ -538,7 +537,7 @@ mt76x0_phy_set_chan_bbp_params(struct mt76x0_dev *dev, u8 channel, u16 rf_bw_ban
|
|||
u8 gain;
|
||||
|
||||
gain = FIELD_GET(MT_BBP_AGC_GAIN, val);
|
||||
gain -= dev->caldata.lna_gain * 2;
|
||||
gain -= dev->cal.rx.lna_gain * 2;
|
||||
val &= ~MT_BBP_AGC_GAIN;
|
||||
val |= FIELD_PREP(MT_BBP_AGC_GAIN, gain);
|
||||
mt76_wr(dev, pair->reg, val);
|
||||
|
|
@ -548,7 +547,7 @@ mt76x0_phy_set_chan_bbp_params(struct mt76x0_dev *dev, u8 channel, u16 rf_bw_ban
|
|||
}
|
||||
}
|
||||
|
||||
static void mt76x0_ant_select(struct mt76x0_dev *dev)
|
||||
static void mt76x0_ant_select(struct mt76x02_dev *dev)
|
||||
{
|
||||
struct ieee80211_channel *chan = dev->mt76.chandef.chan;
|
||||
|
||||
|
|
@ -568,7 +567,7 @@ static void mt76x0_ant_select(struct mt76x0_dev *dev)
|
|||
}
|
||||
|
||||
static void
|
||||
mt76x0_bbp_set_bw(struct mt76x0_dev *dev, enum nl80211_chan_width width)
|
||||
mt76x0_bbp_set_bw(struct mt76x02_dev *dev, enum nl80211_chan_width width)
|
||||
{
|
||||
enum { BW_20 = 0, BW_40 = 1, BW_80 = 2, BW_10 = 4};
|
||||
int bw;
|
||||
|
|
@ -598,7 +597,7 @@ mt76x0_bbp_set_bw(struct mt76x0_dev *dev, enum nl80211_chan_width width)
|
|||
mt76x02_mcu_function_select(&dev->mt76, BW_SETTING, bw, false);
|
||||
}
|
||||
|
||||
void mt76x0_phy_set_txpower(struct mt76x0_dev *dev)
|
||||
void mt76x0_phy_set_txpower(struct mt76x02_dev *dev)
|
||||
{
|
||||
struct mt76_rate_power *t = &dev->mt76.rate_power;
|
||||
u8 info[2];
|
||||
|
|
@ -614,7 +613,7 @@ void mt76x0_phy_set_txpower(struct mt76x0_dev *dev)
|
|||
mt76x02_phy_set_txpower(&dev->mt76, info[0], info[1]);
|
||||
}
|
||||
|
||||
int mt76x0_phy_set_channel(struct mt76x0_dev *dev,
|
||||
int mt76x0_phy_set_channel(struct mt76x02_dev *dev,
|
||||
struct cfg80211_chan_def *chandef)
|
||||
{
|
||||
u32 ext_cca_chan[4] = {
|
||||
|
|
@ -712,7 +711,7 @@ int mt76x0_phy_set_channel(struct mt76x0_dev *dev,
|
|||
return 0;
|
||||
}
|
||||
|
||||
void mt76x0_phy_recalibrate_after_assoc(struct mt76x0_dev *dev)
|
||||
void mt76x0_phy_recalibrate_after_assoc(struct mt76x02_dev *dev)
|
||||
{
|
||||
u32 tx_alc, reg_val;
|
||||
u8 channel = dev->mt76.chandef.chan->hw_value;
|
||||
|
|
@ -748,18 +747,18 @@ void mt76x0_phy_recalibrate_after_assoc(struct mt76x0_dev *dev)
|
|||
mt76x02_mcu_calibrate(&dev->mt76, MCU_CAL_RXDCOC, 1, false);
|
||||
}
|
||||
|
||||
void mt76x0_agc_save(struct mt76x0_dev *dev)
|
||||
void mt76x0_agc_save(struct mt76x02_dev *dev)
|
||||
{
|
||||
/* Only one RX path */
|
||||
dev->agc_save = FIELD_GET(MT_BBP_AGC_GAIN, mt76_rr(dev, MT_BBP(AGC, 8)));
|
||||
}
|
||||
|
||||
void mt76x0_agc_restore(struct mt76x0_dev *dev)
|
||||
void mt76x0_agc_restore(struct mt76x02_dev *dev)
|
||||
{
|
||||
mt76_rmw_field(dev, MT_BBP(AGC, 8), MT_BBP_AGC_GAIN, dev->agc_save);
|
||||
}
|
||||
|
||||
static void mt76x0_temp_sensor(struct mt76x0_dev *dev)
|
||||
static void mt76x0_temp_sensor(struct mt76x02_dev *dev)
|
||||
{
|
||||
u8 rf_b7_73, rf_b0_66, rf_b0_67;
|
||||
int cycle, temp;
|
||||
|
|
@ -795,7 +794,7 @@ static void mt76x0_temp_sensor(struct mt76x0_dev *dev)
|
|||
else
|
||||
sval |= 0xffffff00; /* Negative */
|
||||
|
||||
temp = (35 * (sval - dev->caldata.temp_offset)) / 10 + 25;
|
||||
temp = (35 * (sval - dev->cal.rx.temp_offset)) / 10 + 25;
|
||||
|
||||
done:
|
||||
rf_wr(dev, MT_RF(7, 73), rf_b7_73);
|
||||
|
|
@ -803,7 +802,7 @@ done:
|
|||
rf_wr(dev, MT_RF(0, 73), rf_b0_67);
|
||||
}
|
||||
|
||||
static void mt76x0_dynamic_vga_tuning(struct mt76x0_dev *dev)
|
||||
static void mt76x0_dynamic_vga_tuning(struct mt76x02_dev *dev)
|
||||
{
|
||||
struct cfg80211_chan_def *chandef = &dev->mt76.chandef;
|
||||
u32 val, init_vga;
|
||||
|
|
@ -824,8 +823,8 @@ static void mt76x0_dynamic_vga_tuning(struct mt76x0_dev *dev)
|
|||
|
||||
static void mt76x0_phy_calibrate(struct work_struct *work)
|
||||
{
|
||||
struct mt76x0_dev *dev = container_of(work, struct mt76x0_dev,
|
||||
cal_work.work);
|
||||
struct mt76x02_dev *dev = container_of(work, struct mt76x02_dev,
|
||||
cal_work.work);
|
||||
|
||||
mt76x0_dynamic_vga_tuning(dev);
|
||||
mt76x0_temp_sensor(dev);
|
||||
|
|
@ -834,8 +833,7 @@ static void mt76x0_phy_calibrate(struct work_struct *work)
|
|||
MT_CALIBRATE_INTERVAL);
|
||||
}
|
||||
|
||||
static void
|
||||
mt76x0_rf_init(struct mt76x0_dev *dev)
|
||||
static void mt76x0_rf_init(struct mt76x02_dev *dev)
|
||||
{
|
||||
int i;
|
||||
u8 val;
|
||||
|
|
@ -868,7 +866,7 @@ mt76x0_rf_init(struct mt76x0_dev *dev)
|
|||
E2: B0.R21<0>: xo_cxo<0>, B0.R22<7:0>: xo_cxo<8:1>
|
||||
*/
|
||||
rf_wr(dev, MT_RF(0, 22),
|
||||
min_t(u8, dev->caldata.freq_offset, 0xbf));
|
||||
min_t(u8, dev->cal.rx.freq_offset, 0xbf));
|
||||
val = rf_rr(dev, MT_RF(0, 22));
|
||||
|
||||
/*
|
||||
|
|
@ -888,7 +886,7 @@ mt76x0_rf_init(struct mt76x0_dev *dev)
|
|||
rf_set(dev, MT_RF(0, 4), 0x80);
|
||||
}
|
||||
|
||||
void mt76x0_phy_init(struct mt76x0_dev *dev)
|
||||
void mt76x0_phy_init(struct mt76x02_dev *dev)
|
||||
{
|
||||
INIT_DELAYED_WORK(&dev->cal_work, mt76x0_phy_calibrate);
|
||||
|
||||
|
|
|
|||
|
|
@ -21,7 +21,7 @@ void mt76x0_tx(struct ieee80211_hw *hw, struct ieee80211_tx_control *control,
|
|||
struct sk_buff *skb)
|
||||
{
|
||||
struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
|
||||
struct mt76x0_dev *dev = hw->priv;
|
||||
struct mt76x02_dev *dev = hw->priv;
|
||||
struct ieee80211_vif *vif = info->control.vif;
|
||||
struct mt76_wcid *wcid = &dev->mt76.global_wcid;
|
||||
|
||||
|
|
@ -49,7 +49,7 @@ EXPORT_SYMBOL_GPL(mt76x0_tx);
|
|||
void mt76x0_queue_rx_skb(struct mt76_dev *mdev, enum mt76_rxq_id q,
|
||||
struct sk_buff *skb)
|
||||
{
|
||||
struct mt76x0_dev *dev = container_of(mdev, struct mt76x0_dev, mt76);
|
||||
struct mt76x02_dev *dev = container_of(mdev, struct mt76x02_dev, mt76);
|
||||
void *rxwi = skb->data;
|
||||
|
||||
skb_pull(skb, sizeof(struct mt76x02_rxwi));
|
||||
|
|
|
|||
|
|
@ -49,7 +49,7 @@ static struct usb_device_id mt76x0_device_table[] = {
|
|||
{ 0, }
|
||||
};
|
||||
|
||||
static void mt76x0_init_usb_dma(struct mt76x0_dev *dev)
|
||||
static void mt76x0_init_usb_dma(struct mt76x02_dev *dev)
|
||||
{
|
||||
u32 val;
|
||||
|
||||
|
|
@ -76,7 +76,7 @@ static void mt76x0_init_usb_dma(struct mt76x0_dev *dev)
|
|||
mt76_wr(dev, MT_USB_DMA_CFG, val);
|
||||
}
|
||||
|
||||
static void mt76x0u_cleanup(struct mt76x0_dev *dev)
|
||||
static void mt76x0u_cleanup(struct mt76x02_dev *dev)
|
||||
{
|
||||
clear_bit(MT76_STATE_INITIALIZED, &dev->mt76.state);
|
||||
mt76x0_chip_onoff(dev, false, false);
|
||||
|
|
@ -84,7 +84,7 @@ static void mt76x0u_cleanup(struct mt76x0_dev *dev)
|
|||
mt76u_mcu_deinit(&dev->mt76);
|
||||
}
|
||||
|
||||
static void mt76x0u_mac_stop(struct mt76x0_dev *dev)
|
||||
static void mt76x0u_mac_stop(struct mt76x02_dev *dev)
|
||||
{
|
||||
clear_bit(MT76_STATE_RUNNING, &dev->mt76.state);
|
||||
cancel_delayed_work_sync(&dev->cal_work);
|
||||
|
|
@ -109,7 +109,7 @@ static void mt76x0u_mac_stop(struct mt76x0_dev *dev)
|
|||
|
||||
static int mt76x0u_start(struct ieee80211_hw *hw)
|
||||
{
|
||||
struct mt76x0_dev *dev = hw->priv;
|
||||
struct mt76x02_dev *dev = hw->priv;
|
||||
int ret;
|
||||
|
||||
mutex_lock(&dev->mt76.mutex);
|
||||
|
|
@ -131,7 +131,7 @@ out:
|
|||
|
||||
static void mt76x0u_stop(struct ieee80211_hw *hw)
|
||||
{
|
||||
struct mt76x0_dev *dev = hw->priv;
|
||||
struct mt76x02_dev *dev = hw->priv;
|
||||
|
||||
mutex_lock(&dev->mt76.mutex);
|
||||
mt76x0u_mac_stop(dev);
|
||||
|
|
@ -159,7 +159,7 @@ static const struct ieee80211_ops mt76x0u_ops = {
|
|||
.wake_tx_queue = mt76_wake_tx_queue,
|
||||
};
|
||||
|
||||
static int mt76x0u_register_device(struct mt76x0_dev *dev)
|
||||
static int mt76x0u_register_device(struct mt76x02_dev *dev)
|
||||
{
|
||||
struct ieee80211_hw *hw = dev->mt76.hw;
|
||||
int err;
|
||||
|
|
@ -221,7 +221,7 @@ static int mt76x0u_probe(struct usb_interface *usb_intf,
|
|||
.rx_skb = mt76x0_queue_rx_skb,
|
||||
};
|
||||
struct usb_device *usb_dev = interface_to_usbdev(usb_intf);
|
||||
struct mt76x0_dev *dev;
|
||||
struct mt76x02_dev *dev;
|
||||
u32 asic_rev, mac_rev;
|
||||
int ret;
|
||||
|
||||
|
|
@ -277,7 +277,7 @@ err:
|
|||
|
||||
static void mt76x0_disconnect(struct usb_interface *usb_intf)
|
||||
{
|
||||
struct mt76x0_dev *dev = usb_get_intfdata(usb_intf);
|
||||
struct mt76x02_dev *dev = usb_get_intfdata(usb_intf);
|
||||
bool initalized = test_bit(MT76_STATE_INITIALIZED, &dev->mt76.state);
|
||||
|
||||
if (!initalized)
|
||||
|
|
@ -295,7 +295,7 @@ static void mt76x0_disconnect(struct usb_interface *usb_intf)
|
|||
static int __maybe_unused mt76x0_suspend(struct usb_interface *usb_intf,
|
||||
pm_message_t state)
|
||||
{
|
||||
struct mt76x0_dev *dev = usb_get_intfdata(usb_intf);
|
||||
struct mt76x02_dev *dev = usb_get_intfdata(usb_intf);
|
||||
struct mt76_usb *usb = &dev->mt76.usb;
|
||||
|
||||
mt76u_stop_queues(&dev->mt76);
|
||||
|
|
@ -307,7 +307,7 @@ static int __maybe_unused mt76x0_suspend(struct usb_interface *usb_intf,
|
|||
|
||||
static int __maybe_unused mt76x0_resume(struct usb_interface *usb_intf)
|
||||
{
|
||||
struct mt76x0_dev *dev = usb_get_intfdata(usb_intf);
|
||||
struct mt76x02_dev *dev = usb_get_intfdata(usb_intf);
|
||||
struct mt76_usb *usb = &dev->mt76.usb;
|
||||
int ret;
|
||||
|
||||
|
|
|
|||
|
|
@ -25,7 +25,7 @@
|
|||
#define MT7610U_FIRMWARE "mediatek/mt7610u.bin"
|
||||
|
||||
static int
|
||||
mt76x0u_upload_firmware(struct mt76x0_dev *dev,
|
||||
mt76x0u_upload_firmware(struct mt76x02_dev *dev,
|
||||
const struct mt76x02_fw_header *hdr)
|
||||
{
|
||||
u8 *fw_payload = (u8 *)(hdr + 1);
|
||||
|
|
@ -76,7 +76,7 @@ out:
|
|||
return err;
|
||||
}
|
||||
|
||||
static int mt76x0u_load_firmware(struct mt76x0_dev *dev)
|
||||
static int mt76x0u_load_firmware(struct mt76x02_dev *dev)
|
||||
{
|
||||
const struct firmware *fw;
|
||||
const struct mt76x02_fw_header *hdr;
|
||||
|
|
@ -160,7 +160,7 @@ err_inv_fw:
|
|||
return -ENOENT;
|
||||
}
|
||||
|
||||
int mt76x0u_mcu_init(struct mt76x0_dev *dev)
|
||||
int mt76x0u_mcu_init(struct mt76x02_dev *dev)
|
||||
{
|
||||
int ret;
|
||||
|
||||
|
|
|
|||
|
|
@ -23,12 +23,22 @@
|
|||
#include "mt76x02_mac.h"
|
||||
#include "mt76x02_dfs.h"
|
||||
|
||||
struct mt76x02_mac_stats {
|
||||
u64 rx_stat[6];
|
||||
u64 tx_stat[6];
|
||||
u64 aggr_stat[2];
|
||||
u64 aggr_n[32];
|
||||
u64 zero_len_del[2];
|
||||
};
|
||||
|
||||
#define MT_MAX_CHAINS 2
|
||||
struct mt76x02_rx_freq_cal {
|
||||
s8 high_gain[MT_MAX_CHAINS];
|
||||
s8 rssi_offset[MT_MAX_CHAINS];
|
||||
s8 lna_gain;
|
||||
u32 mcu_gain;
|
||||
s16 temp_offset;
|
||||
u8 freq_offset;
|
||||
};
|
||||
|
||||
struct mt76x02_calibration {
|
||||
|
|
@ -56,6 +66,7 @@ struct mt76x02_dev {
|
|||
|
||||
struct mac_address macaddr_list[8];
|
||||
|
||||
struct mutex phy_mutex;
|
||||
struct mutex mutex;
|
||||
|
||||
u8 txdone_seq;
|
||||
|
|
@ -68,6 +79,8 @@ struct mt76x02_dev {
|
|||
struct delayed_work cal_work;
|
||||
struct delayed_work mac_work;
|
||||
|
||||
struct mt76x02_mac_stats stats;
|
||||
atomic_t avg_ampdu_len;
|
||||
u32 aggr_stats[32];
|
||||
|
||||
struct sk_buff *beacons[8];
|
||||
|
|
@ -83,6 +96,10 @@ struct mt76x02_dev {
|
|||
s8 target_power_delta[2];
|
||||
bool enable_tpc;
|
||||
|
||||
bool no_2ghz;
|
||||
|
||||
u8 agc_save;
|
||||
|
||||
u8 coverage_class;
|
||||
u8 slottime;
|
||||
|
||||
|
|
|
|||
Loading…
Reference in a new issue