From b3115107e35d5803bfb796e9a0fd712d7839b30a Mon Sep 17 00:00:00 2001
From: Lijuan Gao <lijuang@qti.qualcomm.com>
Date: Mon, 28 Dec 2020 17:26:25 +0800
Subject: [PATCH] ARM: dts: msm: Add scm dt nodes for sdxnightjar

Add scm and scm pas device tree nodes for sdxnightjar target.
These are required for pil image authentication.

Change-Id: I066ca55d37aea8e248f4df88bba363a472bebabe
---
 qcom/sdxnightjar.dtsi | 17 +++++++++++++++++
 1 file changed, 17 insertions(+)

diff --git a/qcom/sdxnightjar.dtsi b/qcom/sdxnightjar.dtsi
index 8f86692b9b3a..caa3f6076413 100644
--- a/qcom/sdxnightjar.dtsi
+++ b/qcom/sdxnightjar.dtsi
@@ -51,6 +51,13 @@
 
 	aliases { };
 
+	firmware: firmware {
+		scm {
+			compatible = "qcom,scm";
+			qcom,dload-mode = <&tcsr 0x6100>;
+		};
+	};
+
 	cpus {
 		#size-cells = <0>;
 		#address-cells = <1>;
@@ -371,6 +378,11 @@
 		qcom,rmnet-ipa-ssr;
 	};
 
+	pil_scm_pas {
+		compatible = "qcom,pil-tz-scm-pas";
+		interconnects = <&pc_noc MASTER_CRYPTO_CORE_0 &bimc SLAVE_EBI_CH0>;
+	};
+
 	blsp1_uart1: serial@78af000 {
 		compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm";
 		reg = <0x78af000 0x200>;
@@ -445,6 +457,11 @@
 		#hwlock-cells = <1>;
 	};
 
+	tcsr: syscon@0x1937000 {
+		compatible = "syscon";
+		reg = <0x1937000 0x21000>;
+	};
+
 	apcs_glb: mailbox@0xb011008 {
 		compatible = "qcom,sdxnightjar-apcs-gcc";
 		reg = <0xb011008 0x4>;