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ARM: dts: msm: update irq latency for mdss irq on lahaina target

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Update irq latency node for lahaina target in SDE driver for
mdss irq.

Change-Id: Id19d3abd34454d1a8d1e43a7a0bc62daa750011c
This commit is contained in:
Dhaval Patel 2020-06-15 10:14:50 -07:00
commit b34cf56a83
2 changed files with 3 additions and 0 deletions
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2
bindings/sde.txt
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@ -473,6 +473,7 @@ Optional properties:
0xf represents 4 cpu cores. These cores can be
silver or gold or gold+.
- qcom,sde-qos-cpu-dma-latency: A u32 value indicating desired PM QoS CPU DMA latency in usec.
- qcom,sde-qos-cpu-irq-latency: A u32 value indicating desired PM QoS CPU irq latency in usec.
- qcom,sde-inline-rot-xin: An integer array of xin-ids related to inline
rotation.
- qcom,sde-inline-rot-xin-type: A string array indicating the type of xin,
@ -740,6 +741,7 @@ Example:
qcom,sde-qos-cpu-mask = <0x3>;
qcom,sde-qos-cpu-mask-performance = <0xf>;
qcom,sde-qos-cpu-dma-latency = <300>;
qcom,sde-qos-cpu-irq-latency = <300>;
qcom,sde-vbif-off = <0 0>;
qcom,sde-vbif-id = <0 1>;

1
display/lahaina-sde.dtsi
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@ -232,6 +232,7 @@
qcom,sde-qos-cpu-mask = <0x3>;
qcom,sde-qos-cpu-dma-latency = <300>;
qcom,sde-qos-cpu-irq-latency = <300>;
/* offsets are relative to "mdp_phys + qcom,sde-off */