mirror of
https://github.com/BobTheBlinker/android_kernel_motorola_sm6375.git
synced 2026-10-28 10:41:38 -04:00
power management changes for omap and imx
A significant part of the changes for these two platforms went into power management, so they are split out into a separate branch. -----BEGIN PGP SIGNATURE----- Version: GnuPG v1.4.11 (GNU/Linux) iQIVAwUATwtaEmCrR//JCVInAQIUqBAAkqKDGCyKmC2nDfz5ejYNUvugkDxgYv5I fl9UUfBc2cLDVyOynzjH9SLTphVAI8jZa0KZAlvB8/+4Wcg7XNhUFPDH868zlPzP mSsPPTnb3WJTqb1PLKi7oTbA7CfsX/srRaAtrEX7Nng7uGTZZq+5RL6mOR/bqHyR F/VuV5U9HkDjgM7T7NtcNMqP9ysHDSrcNDse62yKh8FLot59rqXEEXZWTIYZphbI v+BURp4EHs5Wm5AVJbpGmWhk4+NgRCLE0ZKZlfxnJctFz5+bW11TX/85ua+UXtmt Fnij44jSmAzbQ1o0VLbN760iBsbPN/JElYWXwIqR6v5M+Hd2UDRm3a6Bc1xqUNx0 0C8DEoo78XebhldAsN1TL/V94j1ojuNyWC7qkn9VBZLTiVYPyV/oeIdxtR19u1lB QctpXeUPCfdDyD+wAWbqid0MExayP3TAwJ5vK8Tw+ssIv3A19RkUI6kdGaW4RqyL 5n5o7Ze4CGOzrthWuyfw5flKbjRUrmtLO6TTgPZKCwxeiQh3G1GJcCL6lKbGbH3M Z8jNWzEMMExZU+55P8hRrtNgnx6rqn2bWi/3cCSmuKB6KHBUWXfKJw3rmTcWOsLB aNSXqYoWtTK9hJ0zo1xIAGmnJlfrO9I66abCuHHjDKVh1W5j7zmZwrj4ErUuS/dO UHOmrQN/GOY= =P4kO -----END PGP SIGNATURE----- Merge tag 'pm' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc power management changes for omap and imx A significant part of the changes for these two platforms went into power management, so they are split out into a separate branch. * tag 'pm' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (65 commits) ARM: imx6: remove __CPUINIT annotation from v7_invalidate_l1 ARM: imx6: fix v7_invalidate_l1 by adding I-Cache invalidation ARM: imx6q: resume PL310 only when CACHE_L2X0 defined ARM: imx6q: build pm code only when CONFIG_PM selected ARM: mx5: use generic irq chip pm interface for pm functions on ARM: omap: pass minimal SoC/board data for UART from dt arm/dts: Add minimal device tree support for omap2420 and omap2430 omap-serial: Add minimal device tree support omap-serial: Use default clock speed (48Mhz) if not specified omap-serial: Get rid of all pdev->id usage ARM: OMAP2+: hwmod: Add a new flag to handle hwmods left enabled at init ARM: OMAP4: PRM: use PRCM interrupt handler ARM: OMAP3: pm: use prcm chain handler ARM: OMAP: hwmod: add support for selecting mpu_irq for each wakeup pad ARM: OMAP2+: mux: add support for PAD wakeup interrupts ARM: OMAP: PRCM: add suspend prepare / finish support ARM: OMAP: PRCM: add support for chain interrupt handler ARM: OMAP3/4: PRM: add functions to read pending IRQs, PRM barrier ARM: OMAP2+: hwmod: Add API to enable IO ring wakeup ARM: OMAP2+: mux: add wakeup-capable hwmod mux entries to dynamic list ...
This commit is contained in:
Linus Torvalds
commit
b3c3752292
59 changed files with 3871 additions and 1180 deletions
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@ -37,17 +37,24 @@
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#include <linux/clk.h>
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#include <linux/serial_core.h>
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#include <linux/irq.h>
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#include <linux/pm_runtime.h>
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#include <linux/of.h>
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#include <plat/dma.h>
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#include <plat/dmtimer.h>
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#include <plat/omap-serial.h>
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#define DEFAULT_CLK_SPEED 48000000 /* 48Mhz*/
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static struct uart_omap_port *ui[OMAP_MAX_HSUART_PORTS];
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/* Forward declaration of functions */
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static void uart_tx_dma_callback(int lch, u16 ch_status, void *data);
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static void serial_omap_rx_timeout(unsigned long uart_no);
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static void serial_omap_rxdma_poll(unsigned long uart_no);
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static int serial_omap_start_rxdma(struct uart_omap_port *up);
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static void serial_omap_mdr1_errataset(struct uart_omap_port *up, u8 mdr1);
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static struct workqueue_struct *serial_omap_uart_wq;
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static inline unsigned int serial_in(struct uart_omap_port *up, int offset)
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{
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@ -102,6 +109,8 @@ static void serial_omap_stop_rxdma(struct uart_omap_port *up)
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omap_free_dma(up->uart_dma.rx_dma_channel);
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up->uart_dma.rx_dma_channel = OMAP_UART_DMA_CH_FREE;
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up->uart_dma.rx_dma_used = false;
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pm_runtime_mark_last_busy(&up->pdev->dev);
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pm_runtime_put_autosuspend(&up->pdev->dev);
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}
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}
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@ -109,9 +118,12 @@ static void serial_omap_enable_ms(struct uart_port *port)
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{
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struct uart_omap_port *up = (struct uart_omap_port *)port;
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dev_dbg(up->port.dev, "serial_omap_enable_ms+%d\n", up->pdev->id);
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dev_dbg(up->port.dev, "serial_omap_enable_ms+%d\n", up->port.line);
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pm_runtime_get_sync(&up->pdev->dev);
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up->ier |= UART_IER_MSI;
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serial_out(up, UART_IER, up->ier);
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pm_runtime_put(&up->pdev->dev);
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}
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static void serial_omap_stop_tx(struct uart_port *port)
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@ -129,30 +141,40 @@ static void serial_omap_stop_tx(struct uart_port *port)
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omap_stop_dma(up->uart_dma.tx_dma_channel);
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omap_free_dma(up->uart_dma.tx_dma_channel);
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up->uart_dma.tx_dma_channel = OMAP_UART_DMA_CH_FREE;
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pm_runtime_mark_last_busy(&up->pdev->dev);
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pm_runtime_put_autosuspend(&up->pdev->dev);
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}
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pm_runtime_get_sync(&up->pdev->dev);
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if (up->ier & UART_IER_THRI) {
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up->ier &= ~UART_IER_THRI;
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serial_out(up, UART_IER, up->ier);
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}
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pm_runtime_mark_last_busy(&up->pdev->dev);
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pm_runtime_put_autosuspend(&up->pdev->dev);
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}
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static void serial_omap_stop_rx(struct uart_port *port)
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{
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struct uart_omap_port *up = (struct uart_omap_port *)port;
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pm_runtime_get_sync(&up->pdev->dev);
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if (up->use_dma)
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serial_omap_stop_rxdma(up);
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up->ier &= ~UART_IER_RLSI;
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up->port.read_status_mask &= ~UART_LSR_DR;
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serial_out(up, UART_IER, up->ier);
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pm_runtime_mark_last_busy(&up->pdev->dev);
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pm_runtime_put_autosuspend(&up->pdev->dev);
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}
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static inline void receive_chars(struct uart_omap_port *up, int *status)
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static inline void receive_chars(struct uart_omap_port *up,
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unsigned int *status)
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{
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struct tty_struct *tty = up->port.state->port.tty;
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unsigned int flag;
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unsigned char ch, lsr = *status;
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unsigned int flag, lsr = *status;
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unsigned char ch = 0;
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int max_count = 256;
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do {
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@ -262,7 +284,10 @@ static void serial_omap_start_tx(struct uart_port *port)
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int ret = 0;
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if (!up->use_dma) {
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pm_runtime_get_sync(&up->pdev->dev);
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serial_omap_enable_ier_thri(up);
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pm_runtime_mark_last_busy(&up->pdev->dev);
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pm_runtime_put_autosuspend(&up->pdev->dev);
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return;
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}
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@ -272,6 +297,7 @@ static void serial_omap_start_tx(struct uart_port *port)
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xmit = &up->port.state->xmit;
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if (up->uart_dma.tx_dma_channel == OMAP_UART_DMA_CH_FREE) {
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pm_runtime_get_sync(&up->pdev->dev);
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ret = omap_request_dma(up->uart_dma.uart_dma_tx,
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"UART Tx DMA",
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(void *)uart_tx_dma_callback, up,
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@ -354,9 +380,13 @@ static inline irqreturn_t serial_omap_irq(int irq, void *dev_id)
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unsigned int iir, lsr;
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unsigned long flags;
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pm_runtime_get_sync(&up->pdev->dev);
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iir = serial_in(up, UART_IIR);
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if (iir & UART_IIR_NO_INT)
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if (iir & UART_IIR_NO_INT) {
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pm_runtime_mark_last_busy(&up->pdev->dev);
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pm_runtime_put_autosuspend(&up->pdev->dev);
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return IRQ_NONE;
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}
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spin_lock_irqsave(&up->port.lock, flags);
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lsr = serial_in(up, UART_LSR);
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@ -378,6 +408,9 @@ static inline irqreturn_t serial_omap_irq(int irq, void *dev_id)
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transmit_chars(up);
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spin_unlock_irqrestore(&up->port.lock, flags);
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pm_runtime_mark_last_busy(&up->pdev->dev);
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pm_runtime_put_autosuspend(&up->pdev->dev);
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up->port_activity = jiffies;
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return IRQ_HANDLED;
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}
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@ -388,11 +421,12 @@ static unsigned int serial_omap_tx_empty(struct uart_port *port)
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unsigned long flags = 0;
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unsigned int ret = 0;
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dev_dbg(up->port.dev, "serial_omap_tx_empty+%d\n", up->pdev->id);
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pm_runtime_get_sync(&up->pdev->dev);
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dev_dbg(up->port.dev, "serial_omap_tx_empty+%d\n", up->port.line);
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spin_lock_irqsave(&up->port.lock, flags);
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ret = serial_in(up, UART_LSR) & UART_LSR_TEMT ? TIOCSER_TEMT : 0;
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spin_unlock_irqrestore(&up->port.lock, flags);
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pm_runtime_put(&up->pdev->dev);
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return ret;
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}
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@ -402,8 +436,11 @@ static unsigned int serial_omap_get_mctrl(struct uart_port *port)
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unsigned int status;
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unsigned int ret = 0;
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pm_runtime_get_sync(&up->pdev->dev);
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status = check_modem_status(up);
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dev_dbg(up->port.dev, "serial_omap_get_mctrl+%d\n", up->pdev->id);
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pm_runtime_put(&up->pdev->dev);
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dev_dbg(up->port.dev, "serial_omap_get_mctrl+%d\n", up->port.line);
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if (status & UART_MSR_DCD)
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ret |= TIOCM_CAR;
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@ -421,7 +458,7 @@ static void serial_omap_set_mctrl(struct uart_port *port, unsigned int mctrl)
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struct uart_omap_port *up = (struct uart_omap_port *)port;
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unsigned char mcr = 0;
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dev_dbg(up->port.dev, "serial_omap_set_mctrl+%d\n", up->pdev->id);
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dev_dbg(up->port.dev, "serial_omap_set_mctrl+%d\n", up->port.line);
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if (mctrl & TIOCM_RTS)
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mcr |= UART_MCR_RTS;
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if (mctrl & TIOCM_DTR)
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@ -433,8 +470,11 @@ static void serial_omap_set_mctrl(struct uart_port *port, unsigned int mctrl)
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if (mctrl & TIOCM_LOOP)
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mcr |= UART_MCR_LOOP;
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mcr |= up->mcr;
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serial_out(up, UART_MCR, mcr);
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pm_runtime_get_sync(&up->pdev->dev);
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up->mcr = serial_in(up, UART_MCR);
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up->mcr |= mcr;
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serial_out(up, UART_MCR, up->mcr);
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pm_runtime_put(&up->pdev->dev);
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}
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static void serial_omap_break_ctl(struct uart_port *port, int break_state)
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@ -442,7 +482,8 @@ static void serial_omap_break_ctl(struct uart_port *port, int break_state)
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struct uart_omap_port *up = (struct uart_omap_port *)port;
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unsigned long flags = 0;
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dev_dbg(up->port.dev, "serial_omap_break_ctl+%d\n", up->pdev->id);
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dev_dbg(up->port.dev, "serial_omap_break_ctl+%d\n", up->port.line);
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pm_runtime_get_sync(&up->pdev->dev);
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spin_lock_irqsave(&up->port.lock, flags);
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if (break_state == -1)
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up->lcr |= UART_LCR_SBC;
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@ -450,6 +491,7 @@ static void serial_omap_break_ctl(struct uart_port *port, int break_state)
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up->lcr &= ~UART_LCR_SBC;
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serial_out(up, UART_LCR, up->lcr);
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spin_unlock_irqrestore(&up->port.lock, flags);
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pm_runtime_put(&up->pdev->dev);
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}
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static int serial_omap_startup(struct uart_port *port)
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@ -466,8 +508,9 @@ static int serial_omap_startup(struct uart_port *port)
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if (retval)
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return retval;
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dev_dbg(up->port.dev, "serial_omap_startup+%d\n", up->pdev->id);
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dev_dbg(up->port.dev, "serial_omap_startup+%d\n", up->port.line);
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pm_runtime_get_sync(&up->pdev->dev);
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/*
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* Clear the FIFO buffers and disable them.
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* (they will be reenabled in set_termios())
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@ -505,8 +548,8 @@ static int serial_omap_startup(struct uart_port *port)
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(dma_addr_t *)&(up->uart_dma.tx_buf_dma_phys),
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0);
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init_timer(&(up->uart_dma.rx_timer));
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up->uart_dma.rx_timer.function = serial_omap_rx_timeout;
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up->uart_dma.rx_timer.data = up->pdev->id;
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up->uart_dma.rx_timer.function = serial_omap_rxdma_poll;
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up->uart_dma.rx_timer.data = up->port.line;
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/* Currently the buffer size is 4KB. Can increase it */
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up->uart_dma.rx_buf = dma_alloc_coherent(NULL,
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up->uart_dma.rx_buf_size,
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@ -523,6 +566,8 @@ static int serial_omap_startup(struct uart_port *port)
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/* Enable module level wake up */
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serial_out(up, UART_OMAP_WER, OMAP_UART_WER_MOD_WKUP);
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pm_runtime_mark_last_busy(&up->pdev->dev);
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pm_runtime_put_autosuspend(&up->pdev->dev);
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up->port_activity = jiffies;
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return 0;
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}
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@ -532,7 +577,9 @@ static void serial_omap_shutdown(struct uart_port *port)
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struct uart_omap_port *up = (struct uart_omap_port *)port;
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unsigned long flags = 0;
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dev_dbg(up->port.dev, "serial_omap_shutdown+%d\n", up->pdev->id);
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dev_dbg(up->port.dev, "serial_omap_shutdown+%d\n", up->port.line);
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pm_runtime_get_sync(&up->pdev->dev);
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/*
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* Disable interrupts from this port
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*/
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@ -566,6 +613,8 @@ static void serial_omap_shutdown(struct uart_port *port)
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up->uart_dma.rx_buf_dma_phys);
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up->uart_dma.rx_buf = NULL;
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}
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pm_runtime_put(&up->pdev->dev);
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free_irq(up->port.irq, up);
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}
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@ -573,8 +622,6 @@ static inline void
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serial_omap_configure_xonxoff
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(struct uart_omap_port *up, struct ktermios *termios)
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{
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unsigned char efr = 0;
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up->lcr = serial_in(up, UART_LCR);
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serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B);
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up->efr = serial_in(up, UART_EFR);
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@ -584,8 +631,7 @@ serial_omap_configure_xonxoff
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serial_out(up, UART_XOFF1, termios->c_cc[VSTOP]);
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/* clear SW control mode bits */
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efr = up->efr;
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efr &= OMAP_UART_SW_CLR;
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up->efr &= OMAP_UART_SW_CLR;
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/*
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* IXON Flag:
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@ -593,7 +639,7 @@ serial_omap_configure_xonxoff
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* Transmit XON1, XOFF1
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*/
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if (termios->c_iflag & IXON)
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efr |= OMAP_UART_SW_TX;
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up->efr |= OMAP_UART_SW_TX;
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/*
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* IXOFF Flag:
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@ -601,7 +647,7 @@ serial_omap_configure_xonxoff
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* Receiver compares XON1, XOFF1.
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*/
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if (termios->c_iflag & IXOFF)
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efr |= OMAP_UART_SW_RX;
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up->efr |= OMAP_UART_SW_RX;
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serial_out(up, UART_EFR, up->efr | UART_EFR_ECB);
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serial_out(up, UART_LCR, UART_LCR_CONF_MODE_A);
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@ -624,13 +670,21 @@ serial_omap_configure_xonxoff
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* load the new software flow control mode IXON or IXOFF
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* and restore the UARTi.EFR_REG[4] ENHANCED_EN value.
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*/
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serial_out(up, UART_EFR, efr | UART_EFR_SCD);
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serial_out(up, UART_EFR, up->efr | UART_EFR_SCD);
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serial_out(up, UART_LCR, UART_LCR_CONF_MODE_A);
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serial_out(up, UART_MCR, up->mcr & ~UART_MCR_TCRTLR);
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serial_out(up, UART_LCR, up->lcr);
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}
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static void serial_omap_uart_qos_work(struct work_struct *work)
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{
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struct uart_omap_port *up = container_of(work, struct uart_omap_port,
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qos_work);
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pm_qos_update_request(&up->pm_qos_request, up->latency);
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}
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static void
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serial_omap_set_termios(struct uart_port *port, struct ktermios *termios,
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struct ktermios *old)
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@ -671,6 +725,16 @@ serial_omap_set_termios(struct uart_port *port, struct ktermios *termios,
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baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/13);
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quot = serial_omap_get_divisor(port, baud);
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/* calculate wakeup latency constraint */
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up->calc_latency = (1000000 * up->port.fifosize) /
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||||
(1000 * baud / 8);
|
||||
up->latency = up->calc_latency;
|
||||
schedule_work(&up->qos_work);
|
||||
|
||||
up->dll = quot & 0xff;
|
||||
up->dlh = quot >> 8;
|
||||
up->mdr1 = UART_OMAP_MDR1_DISABLE;
|
||||
|
||||
up->fcr = UART_FCR_R_TRIG_01 | UART_FCR_T_TRIG_01 |
|
||||
UART_FCR_ENABLE_FIFO;
|
||||
if (up->use_dma)
|
||||
|
|
@ -680,6 +744,7 @@ serial_omap_set_termios(struct uart_port *port, struct ktermios *termios,
|
|||
* Ok, we're now changing the port state. Do it with
|
||||
* interrupts disabled.
|
||||
*/
|
||||
pm_runtime_get_sync(&up->pdev->dev);
|
||||
spin_lock_irqsave(&up->port.lock, flags);
|
||||
|
||||
/*
|
||||
|
|
@ -723,6 +788,8 @@ serial_omap_set_termios(struct uart_port *port, struct ktermios *termios,
|
|||
up->ier |= UART_IER_MSI;
|
||||
serial_out(up, UART_IER, up->ier);
|
||||
serial_out(up, UART_LCR, cval); /* reset DLAB */
|
||||
up->lcr = cval;
|
||||
up->scr = OMAP_UART_SCR_TX_EMPTY;
|
||||
|
||||
/* FIFOs and DMA Settings */
|
||||
|
||||
|
|
@ -749,17 +816,22 @@ serial_omap_set_termios(struct uart_port *port, struct ktermios *termios,
|
|||
|
||||
if (up->use_dma) {
|
||||
serial_out(up, UART_TI752_TLR, 0);
|
||||
serial_out(up, UART_OMAP_SCR,
|
||||
(UART_FCR_TRIGGER_4 | UART_FCR_TRIGGER_8));
|
||||
up->scr |= (UART_FCR_TRIGGER_4 | UART_FCR_TRIGGER_8);
|
||||
}
|
||||
|
||||
serial_out(up, UART_OMAP_SCR, up->scr);
|
||||
|
||||
serial_out(up, UART_EFR, up->efr);
|
||||
serial_out(up, UART_LCR, UART_LCR_CONF_MODE_A);
|
||||
serial_out(up, UART_MCR, up->mcr);
|
||||
|
||||
/* Protocol, Baud Rate, and Interrupt Settings */
|
||||
|
||||
serial_out(up, UART_OMAP_MDR1, UART_OMAP_MDR1_DISABLE);
|
||||
if (up->errata & UART_ERRATA_i202_MDR1_ACCESS)
|
||||
serial_omap_mdr1_errataset(up, up->mdr1);
|
||||
else
|
||||
serial_out(up, UART_OMAP_MDR1, up->mdr1);
|
||||
|
||||
serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B);
|
||||
|
||||
up->efr = serial_in(up, UART_EFR);
|
||||
|
|
@ -769,8 +841,8 @@ serial_omap_set_termios(struct uart_port *port, struct ktermios *termios,
|
|||
serial_out(up, UART_IER, 0);
|
||||
serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B);
|
||||
|
||||
serial_out(up, UART_DLL, quot & 0xff); /* LS of divisor */
|
||||
serial_out(up, UART_DLM, quot >> 8); /* MS of divisor */
|
||||
serial_out(up, UART_DLL, up->dll); /* LS of divisor */
|
||||
serial_out(up, UART_DLM, up->dlh); /* MS of divisor */
|
||||
|
||||
serial_out(up, UART_LCR, 0);
|
||||
serial_out(up, UART_IER, up->ier);
|
||||
|
|
@ -780,9 +852,14 @@ serial_omap_set_termios(struct uart_port *port, struct ktermios *termios,
|
|||
serial_out(up, UART_LCR, cval);
|
||||
|
||||
if (baud > 230400 && baud != 3000000)
|
||||
serial_out(up, UART_OMAP_MDR1, UART_OMAP_MDR1_13X_MODE);
|
||||
up->mdr1 = UART_OMAP_MDR1_13X_MODE;
|
||||
else
|
||||
serial_out(up, UART_OMAP_MDR1, UART_OMAP_MDR1_16X_MODE);
|
||||
up->mdr1 = UART_OMAP_MDR1_16X_MODE;
|
||||
|
||||
if (up->errata & UART_ERRATA_i202_MDR1_ACCESS)
|
||||
serial_omap_mdr1_errataset(up, up->mdr1);
|
||||
else
|
||||
serial_out(up, UART_OMAP_MDR1, up->mdr1);
|
||||
|
||||
/* Hardware Flow Control Configuration */
|
||||
|
||||
|
|
@ -809,7 +886,8 @@ serial_omap_set_termios(struct uart_port *port, struct ktermios *termios,
|
|||
serial_omap_configure_xonxoff(up, termios);
|
||||
|
||||
spin_unlock_irqrestore(&up->port.lock, flags);
|
||||
dev_dbg(up->port.dev, "serial_omap_set_termios+%d\n", up->pdev->id);
|
||||
pm_runtime_put(&up->pdev->dev);
|
||||
dev_dbg(up->port.dev, "serial_omap_set_termios+%d\n", up->port.line);
|
||||
}
|
||||
|
||||
static void
|
||||
|
|
@ -819,7 +897,9 @@ serial_omap_pm(struct uart_port *port, unsigned int state,
|
|||
struct uart_omap_port *up = (struct uart_omap_port *)port;
|
||||
unsigned char efr;
|
||||
|
||||
dev_dbg(up->port.dev, "serial_omap_pm+%d\n", up->pdev->id);
|
||||
dev_dbg(up->port.dev, "serial_omap_pm+%d\n", up->port.line);
|
||||
|
||||
pm_runtime_get_sync(&up->pdev->dev);
|
||||
serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B);
|
||||
efr = serial_in(up, UART_EFR);
|
||||
serial_out(up, UART_EFR, efr | UART_EFR_ECB);
|
||||
|
|
@ -829,6 +909,15 @@ serial_omap_pm(struct uart_port *port, unsigned int state,
|
|||
serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B);
|
||||
serial_out(up, UART_EFR, efr);
|
||||
serial_out(up, UART_LCR, 0);
|
||||
|
||||
if (!device_may_wakeup(&up->pdev->dev)) {
|
||||
if (!state)
|
||||
pm_runtime_forbid(&up->pdev->dev);
|
||||
else
|
||||
pm_runtime_allow(&up->pdev->dev);
|
||||
}
|
||||
|
||||
pm_runtime_put(&up->pdev->dev);
|
||||
}
|
||||
|
||||
static void serial_omap_release_port(struct uart_port *port)
|
||||
|
|
@ -847,7 +936,7 @@ static void serial_omap_config_port(struct uart_port *port, int flags)
|
|||
struct uart_omap_port *up = (struct uart_omap_port *)port;
|
||||
|
||||
dev_dbg(up->port.dev, "serial_omap_config_port+%d\n",
|
||||
up->pdev->id);
|
||||
up->port.line);
|
||||
up->port.type = PORT_OMAP;
|
||||
}
|
||||
|
||||
|
|
@ -864,7 +953,7 @@ serial_omap_type(struct uart_port *port)
|
|||
{
|
||||
struct uart_omap_port *up = (struct uart_omap_port *)port;
|
||||
|
||||
dev_dbg(up->port.dev, "serial_omap_type+%d\n", up->pdev->id);
|
||||
dev_dbg(up->port.dev, "serial_omap_type+%d\n", up->port.line);
|
||||
return up->name;
|
||||
}
|
||||
|
||||
|
|
@ -906,19 +995,26 @@ static inline void wait_for_xmitr(struct uart_omap_port *up)
|
|||
static void serial_omap_poll_put_char(struct uart_port *port, unsigned char ch)
|
||||
{
|
||||
struct uart_omap_port *up = (struct uart_omap_port *)port;
|
||||
|
||||
pm_runtime_get_sync(&up->pdev->dev);
|
||||
wait_for_xmitr(up);
|
||||
serial_out(up, UART_TX, ch);
|
||||
pm_runtime_put(&up->pdev->dev);
|
||||
}
|
||||
|
||||
static int serial_omap_poll_get_char(struct uart_port *port)
|
||||
{
|
||||
struct uart_omap_port *up = (struct uart_omap_port *)port;
|
||||
unsigned int status = serial_in(up, UART_LSR);
|
||||
unsigned int status;
|
||||
|
||||
pm_runtime_get_sync(&up->pdev->dev);
|
||||
status = serial_in(up, UART_LSR);
|
||||
if (!(status & UART_LSR_DR))
|
||||
return NO_POLL_CHAR;
|
||||
|
||||
return serial_in(up, UART_RX);
|
||||
status = serial_in(up, UART_RX);
|
||||
pm_runtime_put(&up->pdev->dev);
|
||||
return status;
|
||||
}
|
||||
|
||||
#endif /* CONFIG_CONSOLE_POLL */
|
||||
|
|
@ -946,6 +1042,8 @@ serial_omap_console_write(struct console *co, const char *s,
|
|||
unsigned int ier;
|
||||
int locked = 1;
|
||||
|
||||
pm_runtime_get_sync(&up->pdev->dev);
|
||||
|
||||
local_irq_save(flags);
|
||||
if (up->port.sysrq)
|
||||
locked = 0;
|
||||
|
|
@ -978,6 +1076,8 @@ serial_omap_console_write(struct console *co, const char *s,
|
|||
if (up->msr_saved_flags)
|
||||
check_modem_status(up);
|
||||
|
||||
pm_runtime_mark_last_busy(&up->pdev->dev);
|
||||
pm_runtime_put_autosuspend(&up->pdev->dev);
|
||||
if (locked)
|
||||
spin_unlock(&up->port.lock);
|
||||
local_irq_restore(flags);
|
||||
|
|
@ -1014,7 +1114,7 @@ static struct console serial_omap_console = {
|
|||
|
||||
static void serial_omap_add_console_port(struct uart_omap_port *up)
|
||||
{
|
||||
serial_omap_console_ports[up->pdev->id] = up;
|
||||
serial_omap_console_ports[up->port.line] = up;
|
||||
}
|
||||
|
||||
#define OMAP_CONSOLE (&serial_omap_console)
|
||||
|
|
@ -1060,26 +1160,30 @@ static struct uart_driver serial_omap_reg = {
|
|||
.cons = OMAP_CONSOLE,
|
||||
};
|
||||
|
||||
static int
|
||||
serial_omap_suspend(struct platform_device *pdev, pm_message_t state)
|
||||
#ifdef CONFIG_SUSPEND
|
||||
static int serial_omap_suspend(struct device *dev)
|
||||
{
|
||||
struct uart_omap_port *up = platform_get_drvdata(pdev);
|
||||
struct uart_omap_port *up = dev_get_drvdata(dev);
|
||||
|
||||
if (up)
|
||||
if (up) {
|
||||
uart_suspend_port(&serial_omap_reg, &up->port);
|
||||
flush_work_sync(&up->qos_work);
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int serial_omap_resume(struct platform_device *dev)
|
||||
static int serial_omap_resume(struct device *dev)
|
||||
{
|
||||
struct uart_omap_port *up = platform_get_drvdata(dev);
|
||||
struct uart_omap_port *up = dev_get_drvdata(dev);
|
||||
|
||||
if (up)
|
||||
uart_resume_port(&serial_omap_reg, &up->port);
|
||||
return 0;
|
||||
}
|
||||
#endif
|
||||
|
||||
static void serial_omap_rx_timeout(unsigned long uart_no)
|
||||
static void serial_omap_rxdma_poll(unsigned long uart_no)
|
||||
{
|
||||
struct uart_omap_port *up = ui[uart_no];
|
||||
unsigned int curr_dma_pos, curr_transmitted_size;
|
||||
|
|
@ -1089,9 +1193,9 @@ static void serial_omap_rx_timeout(unsigned long uart_no)
|
|||
if ((curr_dma_pos == up->uart_dma.prev_rx_dma_pos) ||
|
||||
(curr_dma_pos == 0)) {
|
||||
if (jiffies_to_msecs(jiffies - up->port_activity) <
|
||||
RX_TIMEOUT) {
|
||||
up->uart_dma.rx_timeout) {
|
||||
mod_timer(&up->uart_dma.rx_timer, jiffies +
|
||||
usecs_to_jiffies(up->uart_dma.rx_timeout));
|
||||
usecs_to_jiffies(up->uart_dma.rx_poll_rate));
|
||||
} else {
|
||||
serial_omap_stop_rxdma(up);
|
||||
up->ier |= (UART_IER_RDI | UART_IER_RLSI);
|
||||
|
|
@ -1120,7 +1224,7 @@ static void serial_omap_rx_timeout(unsigned long uart_no)
|
|||
}
|
||||
} else {
|
||||
mod_timer(&up->uart_dma.rx_timer, jiffies +
|
||||
usecs_to_jiffies(up->uart_dma.rx_timeout));
|
||||
usecs_to_jiffies(up->uart_dma.rx_poll_rate));
|
||||
}
|
||||
up->port_activity = jiffies;
|
||||
}
|
||||
|
|
@ -1135,6 +1239,7 @@ static int serial_omap_start_rxdma(struct uart_omap_port *up)
|
|||
int ret = 0;
|
||||
|
||||
if (up->uart_dma.rx_dma_channel == -1) {
|
||||
pm_runtime_get_sync(&up->pdev->dev);
|
||||
ret = omap_request_dma(up->uart_dma.uart_dma_rx,
|
||||
"UART Rx DMA",
|
||||
(void *)uart_rx_dma_callback, up,
|
||||
|
|
@ -1158,7 +1263,7 @@ static int serial_omap_start_rxdma(struct uart_omap_port *up)
|
|||
/* FIXME: Cache maintenance needed here? */
|
||||
omap_start_dma(up->uart_dma.rx_dma_channel);
|
||||
mod_timer(&up->uart_dma.rx_timer, jiffies +
|
||||
usecs_to_jiffies(up->uart_dma.rx_timeout));
|
||||
usecs_to_jiffies(up->uart_dma.rx_poll_rate));
|
||||
up->uart_dma.rx_dma_used = true;
|
||||
return ret;
|
||||
}
|
||||
|
|
@ -1221,6 +1326,19 @@ static void uart_tx_dma_callback(int lch, u16 ch_status, void *data)
|
|||
return;
|
||||
}
|
||||
|
||||
static struct omap_uart_port_info *of_get_uart_port_info(struct device *dev)
|
||||
{
|
||||
struct omap_uart_port_info *omap_up_info;
|
||||
|
||||
omap_up_info = devm_kzalloc(dev, sizeof(*omap_up_info), GFP_KERNEL);
|
||||
if (!omap_up_info)
|
||||
return NULL; /* out of memory */
|
||||
|
||||
of_property_read_u32(dev->of_node, "clock-frequency",
|
||||
&omap_up_info->uartclk);
|
||||
return omap_up_info;
|
||||
}
|
||||
|
||||
static int serial_omap_probe(struct platform_device *pdev)
|
||||
{
|
||||
struct uart_omap_port *up;
|
||||
|
|
@ -1228,6 +1346,9 @@ static int serial_omap_probe(struct platform_device *pdev)
|
|||
struct omap_uart_port_info *omap_up_info = pdev->dev.platform_data;
|
||||
int ret = -ENOSPC;
|
||||
|
||||
if (pdev->dev.of_node)
|
||||
omap_up_info = of_get_uart_port_info(&pdev->dev);
|
||||
|
||||
mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
|
||||
if (!mem) {
|
||||
dev_err(&pdev->dev, "no mem resource?\n");
|
||||
|
|
@ -1263,7 +1384,6 @@ static int serial_omap_probe(struct platform_device *pdev)
|
|||
ret = -ENOMEM;
|
||||
goto do_release_region;
|
||||
}
|
||||
sprintf(up->name, "OMAP UART%d", pdev->id);
|
||||
up->pdev = pdev;
|
||||
up->port.dev = &pdev->dev;
|
||||
up->port.type = PORT_OMAP;
|
||||
|
|
@ -1273,34 +1393,74 @@ static int serial_omap_probe(struct platform_device *pdev)
|
|||
up->port.regshift = 2;
|
||||
up->port.fifosize = 64;
|
||||
up->port.ops = &serial_omap_pops;
|
||||
up->port.line = pdev->id;
|
||||
|
||||
up->port.membase = omap_up_info->membase;
|
||||
up->port.mapbase = omap_up_info->mapbase;
|
||||
if (pdev->dev.of_node)
|
||||
up->port.line = of_alias_get_id(pdev->dev.of_node, "serial");
|
||||
else
|
||||
up->port.line = pdev->id;
|
||||
|
||||
if (up->port.line < 0) {
|
||||
dev_err(&pdev->dev, "failed to get alias/pdev id, errno %d\n",
|
||||
up->port.line);
|
||||
ret = -ENODEV;
|
||||
goto err;
|
||||
}
|
||||
|
||||
sprintf(up->name, "OMAP UART%d", up->port.line);
|
||||
up->port.mapbase = mem->start;
|
||||
up->port.membase = ioremap(mem->start, resource_size(mem));
|
||||
if (!up->port.membase) {
|
||||
dev_err(&pdev->dev, "can't ioremap UART\n");
|
||||
ret = -ENOMEM;
|
||||
goto err;
|
||||
}
|
||||
|
||||
up->port.flags = omap_up_info->flags;
|
||||
up->port.irqflags = omap_up_info->irqflags;
|
||||
up->port.uartclk = omap_up_info->uartclk;
|
||||
if (!up->port.uartclk) {
|
||||
up->port.uartclk = DEFAULT_CLK_SPEED;
|
||||
dev_warn(&pdev->dev, "No clock speed specified: using default:"
|
||||
"%d\n", DEFAULT_CLK_SPEED);
|
||||
}
|
||||
up->uart_dma.uart_base = mem->start;
|
||||
up->errata = omap_up_info->errata;
|
||||
|
||||
if (omap_up_info->dma_enabled) {
|
||||
up->uart_dma.uart_dma_tx = dma_tx->start;
|
||||
up->uart_dma.uart_dma_rx = dma_rx->start;
|
||||
up->use_dma = 1;
|
||||
up->uart_dma.rx_buf_size = 4096;
|
||||
up->uart_dma.rx_timeout = 2;
|
||||
up->uart_dma.rx_buf_size = omap_up_info->dma_rx_buf_size;
|
||||
up->uart_dma.rx_timeout = omap_up_info->dma_rx_timeout;
|
||||
up->uart_dma.rx_poll_rate = omap_up_info->dma_rx_poll_rate;
|
||||
spin_lock_init(&(up->uart_dma.tx_lock));
|
||||
spin_lock_init(&(up->uart_dma.rx_lock));
|
||||
up->uart_dma.tx_dma_channel = OMAP_UART_DMA_CH_FREE;
|
||||
up->uart_dma.rx_dma_channel = OMAP_UART_DMA_CH_FREE;
|
||||
}
|
||||
|
||||
ui[pdev->id] = up;
|
||||
up->latency = PM_QOS_CPU_DMA_LAT_DEFAULT_VALUE;
|
||||
up->calc_latency = PM_QOS_CPU_DMA_LAT_DEFAULT_VALUE;
|
||||
pm_qos_add_request(&up->pm_qos_request,
|
||||
PM_QOS_CPU_DMA_LATENCY, up->latency);
|
||||
serial_omap_uart_wq = create_singlethread_workqueue(up->name);
|
||||
INIT_WORK(&up->qos_work, serial_omap_uart_qos_work);
|
||||
|
||||
pm_runtime_use_autosuspend(&pdev->dev);
|
||||
pm_runtime_set_autosuspend_delay(&pdev->dev,
|
||||
omap_up_info->autosuspend_timeout);
|
||||
|
||||
pm_runtime_irq_safe(&pdev->dev);
|
||||
pm_runtime_enable(&pdev->dev);
|
||||
pm_runtime_get_sync(&pdev->dev);
|
||||
|
||||
ui[up->port.line] = up;
|
||||
serial_omap_add_console_port(up);
|
||||
|
||||
ret = uart_add_one_port(&serial_omap_reg, &up->port);
|
||||
if (ret != 0)
|
||||
goto do_release_region;
|
||||
|
||||
pm_runtime_put(&pdev->dev);
|
||||
platform_set_drvdata(pdev, up);
|
||||
return 0;
|
||||
err:
|
||||
|
|
@ -1315,22 +1475,168 @@ static int serial_omap_remove(struct platform_device *dev)
|
|||
{
|
||||
struct uart_omap_port *up = platform_get_drvdata(dev);
|
||||
|
||||
platform_set_drvdata(dev, NULL);
|
||||
if (up) {
|
||||
pm_runtime_disable(&up->pdev->dev);
|
||||
uart_remove_one_port(&serial_omap_reg, &up->port);
|
||||
pm_qos_remove_request(&up->pm_qos_request);
|
||||
|
||||
kfree(up);
|
||||
}
|
||||
|
||||
platform_set_drvdata(dev, NULL);
|
||||
return 0;
|
||||
}
|
||||
|
||||
/*
|
||||
* Work Around for Errata i202 (2430, 3430, 3630, 4430 and 4460)
|
||||
* The access to uart register after MDR1 Access
|
||||
* causes UART to corrupt data.
|
||||
*
|
||||
* Need a delay =
|
||||
* 5 L4 clock cycles + 5 UART functional clock cycle (@48MHz = ~0.2uS)
|
||||
* give 10 times as much
|
||||
*/
|
||||
static void serial_omap_mdr1_errataset(struct uart_omap_port *up, u8 mdr1)
|
||||
{
|
||||
u8 timeout = 255;
|
||||
|
||||
serial_out(up, UART_OMAP_MDR1, mdr1);
|
||||
udelay(2);
|
||||
serial_out(up, UART_FCR, up->fcr | UART_FCR_CLEAR_XMIT |
|
||||
UART_FCR_CLEAR_RCVR);
|
||||
/*
|
||||
* Wait for FIFO to empty: when empty, RX_FIFO_E bit is 0 and
|
||||
* TX_FIFO_E bit is 1.
|
||||
*/
|
||||
while (UART_LSR_THRE != (serial_in(up, UART_LSR) &
|
||||
(UART_LSR_THRE | UART_LSR_DR))) {
|
||||
timeout--;
|
||||
if (!timeout) {
|
||||
/* Should *never* happen. we warn and carry on */
|
||||
dev_crit(&up->pdev->dev, "Errata i202: timedout %x\n",
|
||||
serial_in(up, UART_LSR));
|
||||
break;
|
||||
}
|
||||
udelay(1);
|
||||
}
|
||||
}
|
||||
|
||||
static void serial_omap_restore_context(struct uart_omap_port *up)
|
||||
{
|
||||
if (up->errata & UART_ERRATA_i202_MDR1_ACCESS)
|
||||
serial_omap_mdr1_errataset(up, UART_OMAP_MDR1_DISABLE);
|
||||
else
|
||||
serial_out(up, UART_OMAP_MDR1, UART_OMAP_MDR1_DISABLE);
|
||||
|
||||
serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B); /* Config B mode */
|
||||
serial_out(up, UART_EFR, UART_EFR_ECB);
|
||||
serial_out(up, UART_LCR, 0x0); /* Operational mode */
|
||||
serial_out(up, UART_IER, 0x0);
|
||||
serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B); /* Config B mode */
|
||||
serial_out(up, UART_DLL, up->dll);
|
||||
serial_out(up, UART_DLM, up->dlh);
|
||||
serial_out(up, UART_LCR, 0x0); /* Operational mode */
|
||||
serial_out(up, UART_IER, up->ier);
|
||||
serial_out(up, UART_FCR, up->fcr);
|
||||
serial_out(up, UART_LCR, UART_LCR_CONF_MODE_A);
|
||||
serial_out(up, UART_MCR, up->mcr);
|
||||
serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B); /* Config B mode */
|
||||
serial_out(up, UART_OMAP_SCR, up->scr);
|
||||
serial_out(up, UART_EFR, up->efr);
|
||||
serial_out(up, UART_LCR, up->lcr);
|
||||
if (up->errata & UART_ERRATA_i202_MDR1_ACCESS)
|
||||
serial_omap_mdr1_errataset(up, up->mdr1);
|
||||
else
|
||||
serial_out(up, UART_OMAP_MDR1, up->mdr1);
|
||||
}
|
||||
|
||||
#ifdef CONFIG_PM_RUNTIME
|
||||
static int serial_omap_runtime_suspend(struct device *dev)
|
||||
{
|
||||
struct uart_omap_port *up = dev_get_drvdata(dev);
|
||||
struct omap_uart_port_info *pdata = dev->platform_data;
|
||||
|
||||
if (!up)
|
||||
return -EINVAL;
|
||||
|
||||
if (!pdata || !pdata->enable_wakeup)
|
||||
return 0;
|
||||
|
||||
if (pdata->get_context_loss_count)
|
||||
up->context_loss_cnt = pdata->get_context_loss_count(dev);
|
||||
|
||||
if (device_may_wakeup(dev)) {
|
||||
if (!up->wakeups_enabled) {
|
||||
pdata->enable_wakeup(up->pdev, true);
|
||||
up->wakeups_enabled = true;
|
||||
}
|
||||
} else {
|
||||
if (up->wakeups_enabled) {
|
||||
pdata->enable_wakeup(up->pdev, false);
|
||||
up->wakeups_enabled = false;
|
||||
}
|
||||
}
|
||||
|
||||
/* Errata i291 */
|
||||
if (up->use_dma && pdata->set_forceidle &&
|
||||
(up->errata & UART_ERRATA_i291_DMA_FORCEIDLE))
|
||||
pdata->set_forceidle(up->pdev);
|
||||
|
||||
up->latency = PM_QOS_CPU_DMA_LAT_DEFAULT_VALUE;
|
||||
schedule_work(&up->qos_work);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int serial_omap_runtime_resume(struct device *dev)
|
||||
{
|
||||
struct uart_omap_port *up = dev_get_drvdata(dev);
|
||||
struct omap_uart_port_info *pdata = dev->platform_data;
|
||||
|
||||
if (up) {
|
||||
if (pdata->get_context_loss_count) {
|
||||
u32 loss_cnt = pdata->get_context_loss_count(dev);
|
||||
|
||||
if (up->context_loss_cnt != loss_cnt)
|
||||
serial_omap_restore_context(up);
|
||||
}
|
||||
|
||||
/* Errata i291 */
|
||||
if (up->use_dma && pdata->set_noidle &&
|
||||
(up->errata & UART_ERRATA_i291_DMA_FORCEIDLE))
|
||||
pdata->set_noidle(up->pdev);
|
||||
|
||||
up->latency = up->calc_latency;
|
||||
schedule_work(&up->qos_work);
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
#endif
|
||||
|
||||
static const struct dev_pm_ops serial_omap_dev_pm_ops = {
|
||||
SET_SYSTEM_SLEEP_PM_OPS(serial_omap_suspend, serial_omap_resume)
|
||||
SET_RUNTIME_PM_OPS(serial_omap_runtime_suspend,
|
||||
serial_omap_runtime_resume, NULL)
|
||||
};
|
||||
|
||||
#if defined(CONFIG_OF)
|
||||
static const struct of_device_id omap_serial_of_match[] = {
|
||||
{ .compatible = "ti,omap2-uart" },
|
||||
{ .compatible = "ti,omap3-uart" },
|
||||
{ .compatible = "ti,omap4-uart" },
|
||||
{},
|
||||
};
|
||||
MODULE_DEVICE_TABLE(of, omap_serial_of_match);
|
||||
#endif
|
||||
|
||||
static struct platform_driver serial_omap_driver = {
|
||||
.probe = serial_omap_probe,
|
||||
.remove = serial_omap_remove,
|
||||
|
||||
.suspend = serial_omap_suspend,
|
||||
.resume = serial_omap_resume,
|
||||
.driver = {
|
||||
.name = DRIVER_NAME,
|
||||
.pm = &serial_omap_dev_pm_ops,
|
||||
.of_match_table = of_match_ptr(omap_serial_of_match),
|
||||
},
|
||||
};
|
||||
|
||||
|
|
|
|||
Loading…
Reference in a new issue