From b407f2238bb338bc58088fc18474e9ac5e90f40f Mon Sep 17 00:00:00 2001 From: Veera Vegivada Date: Tue, 11 May 2021 13:58:12 +0530 Subject: [PATCH] dt-bindings: clock: update dt-bindings for QCS404 Add new bindings GCC_BIAS_PLL_MISC_RESET_CLK, GCC_BIAS_PLL_AHB_CLK, GCC_BIAS_PLL_AON_CLK, GCC_BIAS_PLL_BCR. Change-Id: If81baec4fc90a3b5fa0ae7ace2e4b2639bc84113 Signed-off-by: Veera Vegivada --- include/dt-bindings/clock/qcom,gcc-qcs404.h | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/include/dt-bindings/clock/qcom,gcc-qcs404.h b/include/dt-bindings/clock/qcom,gcc-qcs404.h index bc3051543347..cdaaf804bdc7 100644 --- a/include/dt-bindings/clock/qcom,gcc-qcs404.h +++ b/include/dt-bindings/clock/qcom,gcc-qcs404.h @@ -1,6 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0 */ /* - * Copyright (c) 2018, The Linux Foundation. All rights reserved. + * Copyright (c) 2018, 2021, The Linux Foundation. All rights reserved. */ #ifndef _DT_BINDINGS_CLK_QCOM_GCC_QCS404_H @@ -152,6 +152,9 @@ #define GCC_BIMC_CDSP_CLK 144 #define GCC_CDSP_TBU_CLK 145 #define GCC_CDSP_BIMC_CLK_SRC 146 +#define GCC_BIAS_PLL_MISC_RESET_CLK 147 +#define GCC_BIAS_PLL_AHB_CLK 148 +#define GCC_BIAS_PLL_AON_CLK 149 #define GCC_GENI_IR_BCR 0 #define GCC_USB_HS_BCR 1 @@ -176,5 +179,6 @@ #define GCC_PCIE_0_SLEEP_ARES 20 #define GCC_PCIE_0_PIPE_ARES 21 #define GCC_WDSP_RESTART 22 +#define GCC_BIAS_PLL_BCR 23 #endif