mirror of
https://github.com/BobTheBlinker/android_kernel_motorola_sm6375.git
synced 2026-10-12 07:37:31 -04:00
Merge "ARM: dts: msm: Enable pil and dload support for Monaco"
This commit is contained in:
qctecmdr
Gerrit - the friendly Code Review server
commit
b443d0ff1f
1 changed files with 147 additions and 27 deletions
174
qcom/monaco.dtsi
174
qcom/monaco.dtsi
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@ -5,6 +5,7 @@
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#include <dt-bindings/clock/qcom,gpucc-monaco.h>
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#include <dt-bindings/interconnect/qcom,monaco.h>
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#include <dt-bindings/interconnect/qcom,icc.h>
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#include <dt-bindings/regulator/qcom,rpmh-regulator-levels.h>
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/ {
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@ -22,6 +23,8 @@
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hsuart0 = &qupv3_se5_4uart;
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};
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firmware: firmware {};
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cpus {
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#address-cells = <2>;
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#size-cells = <0>;
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@ -127,27 +130,8 @@
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soc: soc { };
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firmware: firmware {
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android {
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compatible = "android,firmware";
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vbmeta {
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compatible="android,vbmeta";
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parts = "vbmeta,boot,system,vendor,dtbo,recovery";
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};
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fstab {
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compatible = "android,fstab";
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vendor {
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compatible = "android,vendor";
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dev =
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"/dev/block/platform/soc/4744000.sdhci/by-name/vendor";
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type = "ext4";
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mnt_flags = "ro,barrier=1,discard";
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fsmgr_flags = "wait,slotselect,avb";
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status = "ok"
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};
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};
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};
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chosen {
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bootargs = "rcupdate.rcu_expedited=1 rcu_nocbs=0-7";
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};
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reserved-memory {
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@ -260,9 +244,33 @@
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linux,cma-default;
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};
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};
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};
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chosen {
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bootargs = "rcupdate.rcu_expedited=1 rcu_nocbs=0-7";
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&firmware {
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scm {
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compatible = "qcom,scm";
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qcom,dload-mode = <&tcsr 0x13000>;
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};
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android {
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compatible = "android,firmware";
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vbmeta {
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compatible="android,vbmeta";
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parts = "vbmeta,boot,system,vendor,dtbo,recovery";
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};
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fstab {
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compatible = "android,fstab";
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vendor {
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compatible = "android,vendor";
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dev =
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"/dev/block/platform/soc/4744000.sdhci/by-name/vendor";
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type = "ext4";
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mnt_flags = "ro,barrier=1,discard";
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fsmgr_flags = "wait,slotselect,avb";
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status = "ok"
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};
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};
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};
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};
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@ -406,10 +414,8 @@
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};
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};
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restart@440b000 {
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compatible = "qcom,pshold";
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reg = <0x440b000 0x4>, <0x03d3000 0x4>;
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reg-names = "pshold-base", "tcsr-boot-misc-detect";
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dload_mode {
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compatible = "qcom,dload-mode";
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};
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qcom,mpm2-slepp-counter@4403000 {
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@ -444,6 +450,23 @@
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qcom,wakeup-enable;
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};
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eud: qcom,msm-eud@1610000 {
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compatible = "qcom,msm-eud";
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interrupt-names = "eud_irq";
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interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>;
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reg = <0x1610000 0x2000>,
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<0x1612000 0x1000>,
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<0x3E5018 0x4>;
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reg-names = "eud_base", "eud_mode_mgr2",
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"eud_tcsr_check_reg";
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qcom,secure-eud-en;
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qcom,eud-tcsr-check-enable;
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qcom,eud-clock-vote-req;
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clocks = <&gcc GCC_AHB2PHY_USB_CLK>;
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clock-names = "eud_ahb2phy_clk";
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status = "ok"
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};
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qcom,sps {
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compatible = "qcom,msm-sps-4k";
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qcom,pipe-attr-ee;
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@ -542,6 +565,98 @@
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};
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};
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pil_scm_pas {
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compatible = "qcom,pil-tz-scm-pas";
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interconnects = <&clk_virt MASTER_CRYPTO_CORE0 &bimc SLAVE_EBI_CH0>;
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};
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qcom,lpass@ab00000 {
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compatible = "qcom,pil-tz-generic";
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reg = <0xab00000 0x00100>;
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clocks = <&rpmcc RPM_SMD_XO_CLK_SRC>;
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clock-names = "xo";
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qcom,proxy-clock-names = "xo";
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vdd_lpi_cx-supply = <&VDD_LPI_CX_LEVEL>;
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qcom,vdd_lpi_cx-uV-uA = <RPMH_REGULATOR_LEVEL_TURBO 0>;
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vdd_lpi_mx-supply = <&VDD_LPI_MX_LEVEL>;
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qcom,vdd_lpi_mx-uV-uA = <RPMH_REGULATOR_LEVEL_TURBO 0>;
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qcom,proxy-reg-names = "vdd_lpi_cx", "vdd_lpi_mx";
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qcom,firmware-name = "adsp";
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memory-region = <&pil_adsp_mem>;
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qcom,proxy-timeout-ms = <10000>;
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qcom,sysmon-id = <1>;
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qcom,minidump-id = <5>;
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qcom,ssctl-instance-id = <0x14>;
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qcom,pas-id = <1>;
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qcom,smem-id = <423>;
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qcom,complete-ramdump;
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qcom,minidump-as-elf32;
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/* Inputs from lpass */
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interrupts-extended = <&intc 0 282 IRQ_TYPE_LEVEL_HIGH>,
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<&adsp_smp2p_in 0 0>,
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<&adsp_smp2p_in 2 0>,
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<&adsp_smp2p_in 1 0>,
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<&adsp_smp2p_in 3 0>;
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interrupt-names = "qcom,wdog",
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"qcom,err-fatal",
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"qcom,proxy-unvote",
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"qcom,err-ready",
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"qcom,stop-ack";
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/* Outputs to lpass */
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qcom,smem-states = <&adsp_smp2p_out 0>;
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qcom,smem-state-names = "qcom,force-stop";
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};
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pil_modem: qcom,mss@6080000 {
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compatible = "qcom,pil-tz-generic";
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reg = <0x6080000 0x100>;
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clocks = <&rpmcc RPM_SMD_XO_CLK_SRC>;
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clock-names = "xo";
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qcom,proxy-clock-names = "xo";
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vdd_cx-supply = <&VDD_CX_LEVEL>;
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qcom,vdd_cx-uV-uA = <RPMH_REGULATOR_LEVEL_TURBO 100000>;
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qcom,proxy-reg-names = "vdd_cx";
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qcom,firmware-name = "modem";
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memory-region = <&pil_modem_mem>;
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qcom,proxy-timeout-ms = <10000>;
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qcom,sysmon-id = <0>;
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qcom,ssctl-instance-id = <0x12>;
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qcom,pas-id = <4>;
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qcom,smem-id = <421>;
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qcom,minidump-id = <3>;
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qcom,aux-minidump-ids = <4>;
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qcom,complete-ramdump;
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qcom,sequential-fw-load;
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/* Inputs from mss */
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interrupts-extended = <&intc 0 307 1>,
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<&modem_smp2p_in 0 0>,
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<&modem_smp2p_in 2 0>,
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<&modem_smp2p_in 1 0>,
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<&modem_smp2p_in 3 0>,
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<&modem_smp2p_in 7 0>;
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interrupt-names = "qcom,wdog",
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"qcom,err-fatal",
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"qcom,proxy-unvote",
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"qcom,err-ready",
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"qcom,stop-ack",
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"qcom,shutdown-ack";
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/* Outputs to mss */
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qcom,smem-states = <&modem_smp2p_out 0>;
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qcom,smem-state-names = "qcom,force-stop";
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};
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clocks {
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xo_board: xo-board {
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compatible = "fixed-clock";
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@ -654,6 +769,11 @@
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#hwlock-cells = <1>;
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};
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tcsr: syscon@03c0000 {
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compatible = "syscon";
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reg = <0x03c0000 0x30000>;
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};
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smem: qcom,smem {
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compatible = "qcom,smem";
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memory-region = <&smem_region>;
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