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qcacld-3.0: Remove spinlocks from ce_enable_msi
ce_enable_msi should happen before interupts are enabled. Therefore we should be single threaded here and don't need to protect access with a spin lock. Change-Id: I24feec02003bdb402201d71d1cd5254dacae0b72 CRs-Fixed: 941355
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1 changed files with 11 additions and 3 deletions
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@ -1610,6 +1610,17 @@ bool ce_check_rx_pending(struct ol_softc *scn, int ce_id)
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else
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return false;
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}
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/**
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* ce_enable_msi(): write the msi configuration to the target
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* @scn: hif context
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* @CE_id: which copy engine will be configured for msi interupts
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* @msi_addr_lo: Hardware will write to this address to generate an interrupt
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* @msi_addr_hi: Hardware will write to this address to generate an interrupt
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* @msi_data: Hardware will write this data to generate an interrupt
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*
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* should be done in the initialization sequence so no locking would be needed
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*/
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void ce_enable_msi(struct ol_softc *scn, unsigned int CE_id,
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uint32_t msi_addr_lo, uint32_t msi_addr_hi,
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uint32_t msi_data)
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@ -1620,11 +1631,9 @@ void ce_enable_msi(struct ol_softc *scn, unsigned int CE_id,
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u_int32_t ctrl_addr;
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uint32_t tmp;
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adf_os_spin_lock(&scn->target_lock);
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CE_state = scn->ce_id_to_state[CE_id];
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if (!CE_state) {
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HIF_ERROR("%s: error - CE_state = NULL", __func__);
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adf_os_spin_unlock(&scn->target_lock);
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return;
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}
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targid = TARGID(sc);
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@ -1635,7 +1644,6 @@ void ce_enable_msi(struct ol_softc *scn, unsigned int CE_id,
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tmp = CE_CTRL_REGISTER1_GET(scn, ctrl_addr);
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tmp |= (1 << CE_MSI_ENABLE_BIT);
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CE_CTRL_REGISTER1_SET(scn, ctrl_addr, tmp);
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adf_os_spin_unlock(&scn->target_lock);
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#endif
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}
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