From f40938d8ffd641725aad47f5a9bc00103113e06d Mon Sep 17 00:00:00 2001
From: Veera Vegivada <vvegivad@qti.qualcomm.com>
Date: Tue, 6 Oct 2020 14:40:04 +0530
Subject: [PATCH] ARM: dts: msm: Add AOPCC for SM6150

Add aopcc node to facilitate clients to request
and operate on clocks.

Change-Id: Icca62a90b022d7d1f605dc85d736d60ab5854d9a
---
 qcom/sm6150.dtsi | 8 ++++++++
 1 file changed, 8 insertions(+)

diff --git a/qcom/sm6150.dtsi b/qcom/sm6150.dtsi
index 83f3abf9cf12..84627ecdbace 100644
--- a/qcom/sm6150.dtsi
+++ b/qcom/sm6150.dtsi
@@ -1,5 +1,6 @@
 #include <dt-bindings/interrupt-controller/arm-gic.h>
 #include <dt-bindings/clock/qcom,rpmh.h>
+#include <dt-bindings/clock/qcom,aop-qmp.h>
 #include <dt-bindings/clock/qcom,camcc-sm6150.h>
 #include <dt-bindings/clock/qcom,dispcc-sm6150.h>
 #include <dt-bindings/clock/qcom,gpucc-sm6150.h>
@@ -761,6 +762,13 @@
 				  <CONTROL_TCS 0>;
 	};
 
+	aopcc: qcom,aopcc@0 {
+		compatible = "qcom,aop-qmp-clk";
+		mboxes = <&qmp_aop 0>;
+		mbox-names = "qdss_clk";
+		#clock-cells = <1>;
+	};
+
 	gcc: clock-controller@100000 {
 		compatible = "qcom,sm6150-gcc", "syscon";
 		reg = <0x100000 0x1f0000>;