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Merge "ARM: dts: msm: Add Shima trustedVM device configuration"

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qctecmdr 2020-08-28 10:46:00 -07:00 • committed by Gerrit - the friendly Code Review server
commit b57ff7276b
19 changed files with 326 additions and 9 deletions
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13
qcom/Makefile
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@ -141,7 +141,9 @@ endif
ifeq ($(CONFIG_ARCH_LAHAINA), y)
ifeq ($(CONFIG_ARCH_QTI_VM), y)
dtb-$(CONFIG_ARCH_QTI_VM) += trustedvm.dtb
dtb-$(CONFIG_ARCH_QTI_VM) += lahaina-vm-mtp.dtb \
lahaina-vm-cdp.dtb \
lahaina-vm-qrd.dtb
endif
endif
@ -149,6 +151,15 @@ dtb-$(CONFIG_ARCH_SDXLEMUR) += sdxlemur-rumi.dtb \
sdxlemur-cdp.dtb \
sdxlemur-mtp.dtb
ifeq ($(CONFIG_ARCH_SHIMA), y)
ifeq ($(CONFIG_ARCH_QTI_VM), y)
dtb-$(CONFIG_ARCH_QTI_VM) += shima-vm-rumi.dtb \
shima-vm-atp.dtb \
shima-vm-idp.dtb \
shima-vm-qrd.dtb
endif
endif
always := $(dtb-y)
subdir-y := $(dts-dirs)
clean-files := *.dtb *.dtbo

10
qcom/lahaina-vm-cdp.dts Normal file
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@ -0,0 +1,10 @@
/dts-v1/;
#include "lahaina-vm.dtsi"
#include "lahaina-vm-cdp.dtsi"
/ {
model = "Qualcomm Technologies, Inc. Lahaina SVM CDP";
compatible = "qcom,lahaina-cdp", "qcom,lahaina", "qcom,cdp";
qcom,board-id = <0x10001 0>;
};

1
qcom/lahaina-vm-cdp.dtsi Normal file
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@ -0,0 +1 @@
/*#include "display/lahaina-sde-display-cdp.dtsi"*/

0
qcom/trustedvm-ion.dtsi → qcom/lahaina-vm-ion.dtsi
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10
qcom/lahaina-vm-mtp.dts Normal file
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@ -0,0 +1,10 @@
/dts-v1/;
#include "lahaina-vm.dtsi"
#include "lahaina-vm-mtp.dtsi"
/ {
model = "Qualcomm Technologies, Inc. Lahaina SVM MTP";
compatible = "qcom,lahaina-mtp", "qcom,lahaina", "qcom,mtp";
qcom,board-id = <0x10008 0>;
};

1
qcom/lahaina-vm-mtp.dtsi Normal file
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@ -0,0 +1 @@
/*#include "display/lahaina-sde-display-mtp.dtsi"*/

10
qcom/lahaina-vm-qrd.dts Normal file
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@ -0,0 +1,10 @@
/dts-v1/;
#include "lahaina-vm.dtsi"
#include "lahaina-vm-qrd.dtsi"
/ {
model = "Qualcomm Technologies, Inc. Lahaina SVM QRD";
compatible = "qcom,lahaina-qrd", "qcom,lahaina", "qcom,qrd";
qcom,board-id = <0x1000B 0>;
};

1
qcom/lahaina-vm-qrd.dtsi Normal file
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@ -0,0 +1 @@
/*#include "display/lahaina-sde-display-qrd.dtsi"*/

3
qcom/trustedvm.dtsi → qcom/lahaina-vm.dtsi
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@ -6,6 +6,7 @@
/ {
#address-cells = <0x2>;
#size-cells = <0x2>;
qcom,msm-id = <415 0x10000>;
interrupt-parent = <&vgic>;
qcom-mem-buf {
@ -321,7 +322,7 @@
};
};
#include "trustedvm-ion.dtsi"
#include "lahaina-vm-ion.dtsi"
#include "display/trustedvm-lahaina-sde.dtsi"
#include "display/trustedvm-lahaina-sde-display.dtsi"
#include "display/dsi-panel-sw43404-amoled-dsc-wqhd-cmd.dtsi"

10
qcom/shima-vm-atp.dts Normal file
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@ -0,0 +1,10 @@
/dts-v1/;
#include "shima-vm.dtsi"
#include "shima-vm-atp.dtsi"
/ {
model = "Qualcomm Technologies, Inc. Shima VM ATP";
compatible = "qcom,shima-atp", "qcom,shima", "qcom,atp";
qcom,board-id = <0x10021 0>;
};

2
qcom/shima-vm-atp.dtsi Normal file
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@ -0,0 +1,2 @@
&soc {
};

10
qcom/shima-vm-idp.dts Normal file
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@ -0,0 +1,10 @@
/dts-v1/;
#include "shima-vm.dtsi"
#include "shima-vm-idp.dtsi"
/ {
model = "Qualcomm Technologies, Inc. Shima VM IDP";
compatible = "qcom,shima-idp", "qcom,shima", "qcom,idp";
qcom,board-id = <34 0>;
};

2
qcom/shima-vm-idp.dtsi Normal file
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@ -0,0 +1,2 @@
&soc {
};

10
qcom/shima-vm-qrd.dts Normal file
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@ -0,0 +1,10 @@
/dts-v1/;
#include "shima-vm.dtsi"
#include "shima-vm-qrd.dtsi"
/ {
model = "Qualcomm Technologies, Inc. Shima VM QRD";
compatible = "qcom,shima-qrd", "qcom,shima", "qcom,qrd";
qcom,board-id = <0x1000B 0>;
};

2
qcom/shima-vm-qrd.dtsi Normal file
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@ -0,0 +1,2 @@
&soc {
};

11
qcom/shima-vm-rumi.dts Normal file
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@ -0,0 +1,11 @@
/dts-v1/;
/memreserve/ 0x90000000 0x00000100;
#include "shima-vm.dtsi"
#include "shima-vm-rumi.dtsi"
/ {
model = "Qualcomm Technologies, Inc. Shima SVM RUMI";
compatible = "qcom,shima-rumi", "qcom,shima", "qcom,rumi";
qcom,board-id = <0x1000f 0>;
};

5
qcom/shima-vm-rumi.dtsi Normal file
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@ -0,0 +1,5 @@
&soc {
timer {
clock-frequency = <5000000>;
};
};

227
qcom/shima-vm.dtsi Normal file
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@ -0,0 +1,227 @@
#include <dt-bindings/interrupt-controller/arm-gic.h>
/ {
#address-cells = <0x2>;
#size-cells = <0x2>;
qcom,msm-id = <450 0x10000>;
interrupt-parent = <&vgic>;
qcom-mem-buf {
compatible = "qcom,mem-buf";
qcom,mem-buf-capabilities = "consumer";
};
chosen {
bootargs = "nokaslr no_console_suspend root=/dev/ram rw init=/init console=hvc0 loglevel=8";
linux,initrd-start = <0x2a900000>;
linux,initrd-end = <0x2b100000>; /* 8 MB */
kaslr-seed = <0xfeedbeef 0xc0def00d>;
};
cpus {
#address-cells = <0x2>;
#size-cells = <0x0>;
CPU0: cpu@0 {
compatible = "arm,armv8";
reg = <0x0 0x0>;
device_type = "cpu";
enable-method = "psci";
cpu-idle-states = <&CPU_PWR_DWN>;
};
CPU1: cpu@100 {
compatible = "arm,armv8";
reg = <0x0 0x100>;
device_type = "cpu";
enable-method = "psci";
cpu-idle-states = <&CPU_PWR_DWN>;
};
};
idle-states {
CPU_PWR_DWN: c4 { /* Using Gold C4 latencies */
compatible = "arm,idle-state";
idle-state-name = "rail-pc";
entry-latency-us = <702>;
exit-latency-us = <1061>;
min-residency-us = <4488>;
arm,psci-suspend-param = <0x40000004>;
local-timer-stop;
};
};
neuron-client-block {
compatible = "qcom,neuron-service";
#address-cells = <1>;
#size-cells = <0>;
protocol {
compatible = "qcom,neuron-protocol-block";
processes = "client";
};
application {
compatible = "qcom,neuron-block-client";
};
channel@0 {
reg = <0>;
compatible = "qcom,neuron-channel-haven-shmem";
class = "message-queue";
direction = "send";
max-size = <0 65536>;
haven-label = <1>;
};
channel@1 {
reg = <1>;
compatible = "qcom,neuron-channel-haven-shmem";
class = "message-queue";
direction = "receive";
max-size = <0 65536>;
haven-label = <2>;
};
};
qrtr-haven {
compatible = "qcom,qrtr-haven";
haven-label = <3>;
};
qcom,vm-config {
compatible = "qcom,vm-1.0";
vm-type = "aarch64-guest";
boot-config = "fdt,unified";
os-type = "linux";
kernel-entry-segment = "kernel";
kernel-entry-offset = <0x0 0x0>;
vendor = "Qualcomm Technologies, Inc.";
image-name = "qcom,trustedvm";
qcom,pasid = <0x0 0x1c>;
iomemory-ranges = <0x0 0x92c000 0x0 0x92c000 0x0 0x4000 0x0
0x0 0xc400000 0x0 0xc400000 0x0 0x30000 0x1
0x0 0xc440000 0x0 0xc440000 0x0 0x10000 0x1
0x0 0xc600000 0x0 0xc600000 0x0 0x2000000 0x1
0x0 0xe600000 0x0 0xe600000 0x0 0x100000 0x1
0x0 0xe700000 0x0 0xe700000 0x0 0xa0000 0x1
0x0 0xae8f000 0x0 0xae8f000 0x0 0x1000 0x0>;
gic-irq-ranges = <283 283>; /* PVM->SVM IRQ transfer */
memory {
#address-cells = <0x2>;
#size-cells = <0x0>;
base-address = <0x0 0xD0800000>;
size-min = <0x0 0x76f7000>; /* 118 MB */
};
segments {
ramdisk = <2>; /* 8MB */
};
vcpus {
config = "/cpus";
affinity = "static";
affinity-map = <0x4 0x5>;
sched-priority = <0>; /* relative to PVM */
sched-timeslice = <2000>; /* in ms */
};
interrupts {
config = &vgic;
};
vdevices {
generate = "/hypervisor";
rm-rpc {
vdevice-type = "rm-rpc";
generate = "/hypervisor/qcom,resource-mgr";
console-dev;
message-size = <0x000000f0>;
queue-depth = <0x00000008>;
qcom,label = <0x1>;
};
mem-buf-message-queue-pair {
vdevice-type = "message-queue-pair";
generate = "/hypervisor/membuf-msgq-pair";
message-size = <0x000000f0>;
queue-depth = <0x00000008>;
peer-default;
qcom,label = <0x0000001>;
};
neuron-ch1-shm {
vdevice-type = "shm-doorbell";
generate = "/hypervisor/neuron-ch1-shm";
push-compatible = "qcom,neuron-channel-haven-shmem-gen";
peer-default;
memory {
qcom,label = <0x1>;
allocate-base;
};
};
neuron-ch2-shm {
vdevice-type = "shm-doorbell";
generate = "/hypervisor/neuron-ch2-shm";
push-compatible = "qcom,neuron-channel-haven-shmem-gen";
peer-default;
memory {
qcom,label = <0x2>;
allocate-base;
};
};
qrtr-shm {
vdevice-type = "shm-doorbell";
generate = "/hypervisor/qrtr-shm";
push-compatible = "qcom,qrtr-haven-gen";
peer-default;
memory {
qcom,label = <0x3>;
allocate-base;
};
};
};
};
firmware: firmware {
scm {
compatible = "qcom,scm";
};
};
soc: soc { };
};
&soc {
#address-cells = <1>;
#size-cells = <1>;
ranges = <0 0 0 0xffffffff>;
compatible = "simple-bus";
psci {
compatible = "arm,psci-1.0";
method = "smc";
};
vgic: interrupt-controller@17a00000 {
compatible = "arm,gic-v3";
interrupt-controller;
#interrupt-cells = <0x3>;
reg = <0x17a00000 0x10000>, /* GICD */
<0x17a60000 0x100000>; /* GICR * 8 */
};
arch_timer: timer {
compatible = "arm,armv8-timer";
always-on;
interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>,
<GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>,
<GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>,
<GIC_PPI 12 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>;
};
};

7
qcom/trustedvm.dts
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@ -1,7 +0,0 @@
/dts-v1/;
#include "trustedvm.dtsi"
/ {
model = "Qualcomm Technologies, Inc. Secondary Virtual Machine";
};