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ARM: dts: msm: Remove interconnect phandles from clock nodes

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Clock optionally votes for interconnect in runtime_resume and
runtime_suspend to ensure access to its configuration registers.
However, interconnect also votes for clocks when configuring QoS. This
can lead to deadlocks between the clock and interconnect frameworks.

Voting for interconnects isn't strictly necessary for register access
currently, since the required bus (CNOC) is always on when HLOS is
running. Voting may become necessary in the future, but until then
remove the interconnect phandles to prevent the deadlocks.

Change-Id: If4392361a394b7ace52cb95a0ac2184bf64a7882
This commit is contained in:
Mike Tipton 2020-09-25 12:03:32 -07:00
commit b607012878
1 changed files with 0 additions and 3 deletions
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3
qcom/lahaina.dtsi
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@ -2347,7 +2347,6 @@
reg-name = "cc_base";
vdd_mm-supply = <&VDD_MM_LEVEL>;
vdd_mx-supply = <&VDD_MXA_LEVEL>;
interconnects = <&gem_noc MASTER_APPSS_PROC &config_noc SLAVE_VENUS_CFG>;
clocks = <&clock_gcc GCC_VIDEO_AHB_CLK>;
clock-names = "iface";
#clock-cells = <1>;
@ -2360,7 +2359,6 @@
reg-names = "cc_base";
vdd_mm-supply = <&VDD_MM_LEVEL>;
vdd_mx-supply = <&VDD_MXA_LEVEL>;
interconnects = <&gem_noc MASTER_APPSS_PROC &config_noc SLAVE_CAMERA_CFG>;
clocks = <&clock_gcc GCC_CAMERA_AHB_CLK>;
clock-names = "iface";
#clock-cells = <1>;
@ -2372,7 +2370,6 @@
reg = <0xaf00000 0x20000>;
reg-name = "cc_base";
vdd_mm-supply = <&VDD_MM_LEVEL>;
interconnects = <&gem_noc MASTER_APPSS_PROC &config_noc SLAVE_DISPLAY_CFG>;
clocks = <&clock_gcc GCC_DISP_AHB_CLK>;
clock-names = "iface";
#clock-cells = <1>;